Configure V5
This commit is contained in:
jonny
parent
747995010b
commit
d109215710
File diff suppressed because one or more lines are too long
@ -59,7 +59,7 @@
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/* #define HAL_QSPI_MODULE_ENABLED */
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/* #define HAL_QSPI_MODULE_ENABLED */
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/* #define HAL_RNG_MODULE_ENABLED */
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/* #define HAL_RNG_MODULE_ENABLED */
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/* #define HAL_RTC_MODULE_ENABLED */
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/* #define HAL_RTC_MODULE_ENABLED */
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/* #define HAL_SAI_MODULE_ENABLED */
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#define HAL_SAI_MODULE_ENABLED
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/* #define HAL_SD_MODULE_ENABLED */
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/* #define HAL_SD_MODULE_ENABLED */
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/* #define HAL_MMC_MODULE_ENABLED */
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/* #define HAL_MMC_MODULE_ENABLED */
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/* #define HAL_SPDIFRX_MODULE_ENABLED */
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/* #define HAL_SPDIFRX_MODULE_ENABLED */
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@ -53,6 +53,7 @@ void BusFault_Handler(void);
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void UsageFault_Handler(void);
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void UsageFault_Handler(void);
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void DebugMon_Handler(void);
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void DebugMon_Handler(void);
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void TIM8_TRG_COM_TIM14_IRQHandler(void);
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void TIM8_TRG_COM_TIM14_IRQHandler(void);
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void DMA2_Stream4_IRQHandler(void);
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void OTG_FS_IRQHandler(void);
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void OTG_FS_IRQHandler(void);
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/* USER CODE BEGIN EFP */
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/* USER CODE BEGIN EFP */
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@ -74,8 +74,12 @@
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/* Private variables ---------------------------------------------------------*/
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/* Private variables ---------------------------------------------------------*/
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I2C_HandleTypeDef hi2c1;
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I2C_HandleTypeDef hi2c3;
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I2C_HandleTypeDef hi2c3;
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SAI_HandleTypeDef hsai_BlockA2;
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DMA_HandleTypeDef hdma_sai2_a;
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UART_HandleTypeDef huart6;
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UART_HandleTypeDef huart6;
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SRAM_HandleTypeDef hsram2;
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SRAM_HandleTypeDef hsram2;
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@ -89,9 +93,12 @@ char Namen[] = "Jonas Schoenberger, Moritz Rambold";
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/* Private function prototypes -----------------------------------------------*/
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/* Private function prototypes -----------------------------------------------*/
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void SystemClock_Config(void);
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void SystemClock_Config(void);
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static void MX_GPIO_Init(void);
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static void MX_GPIO_Init(void);
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static void MX_DMA_Init(void);
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static void MX_USART6_UART_Init(void);
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static void MX_USART6_UART_Init(void);
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static void MX_FMC_Init(void);
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static void MX_FMC_Init(void);
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static void MX_I2C3_Init(void);
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static void MX_I2C3_Init(void);
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static void MX_I2C1_Init(void);
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static void MX_SAI2_Init(void);
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void StartDefaultTask(void const * argument);
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void StartDefaultTask(void const * argument);
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/* USER CODE BEGIN PFP */
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/* USER CODE BEGIN PFP */
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@ -371,10 +378,13 @@ int main(void)
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/* Initialize all configured peripherals */
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/* Initialize all configured peripherals */
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MX_GPIO_Init();
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MX_GPIO_Init();
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MX_DMA_Init();
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MX_USART6_UART_Init();
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MX_USART6_UART_Init();
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MX_FMC_Init();
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MX_FMC_Init();
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MX_I2C3_Init();
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MX_I2C3_Init();
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MX_FATFS_Init();
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MX_FATFS_Init();
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MX_I2C1_Init();
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MX_SAI2_Init();
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/* USER CODE BEGIN 2 */
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/* USER CODE BEGIN 2 */
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Usage_Init();
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Usage_Init();
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@ -519,6 +529,54 @@ void SystemClock_Config(void)
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}
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}
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}
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}
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/**
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* @brief I2C1 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_I2C1_Init(void)
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{
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/* USER CODE BEGIN I2C1_Init 0 */
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/* USER CODE END I2C1_Init 0 */
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/* USER CODE BEGIN I2C1_Init 1 */
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/* USER CODE END I2C1_Init 1 */
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hi2c1.Instance = I2C1;
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hi2c1.Init.Timing = 0x20404768;
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hi2c1.Init.OwnAddress1 = 0;
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hi2c1.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT;
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hi2c1.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE;
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hi2c1.Init.OwnAddress2 = 0;
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hi2c1.Init.OwnAddress2Masks = I2C_OA2_NOMASK;
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hi2c1.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE;
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hi2c1.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE;
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if (HAL_I2C_Init(&hi2c1) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Analogue filter
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*/
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if (HAL_I2CEx_ConfigAnalogFilter(&hi2c1, I2C_ANALOGFILTER_ENABLE) != HAL_OK)
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{
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Error_Handler();
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}
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/** Configure Digital filter
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*/
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if (HAL_I2CEx_ConfigDigitalFilter(&hi2c1, 0) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN I2C1_Init 2 */
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/* USER CODE END I2C1_Init 2 */
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}
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/**
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/**
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* @brief I2C3 Initialization Function
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* @brief I2C3 Initialization Function
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* @param None
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* @param None
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@ -567,6 +625,55 @@ static void MX_I2C3_Init(void)
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}
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}
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/**
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* @brief SAI2 Initialization Function
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* @param None
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* @retval None
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*/
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static void MX_SAI2_Init(void)
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{
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/* USER CODE BEGIN SAI2_Init 0 */
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/* USER CODE END SAI2_Init 0 */
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/* USER CODE BEGIN SAI2_Init 1 */
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/* USER CODE END SAI2_Init 1 */
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hsai_BlockA2.Instance = SAI2_Block_A;
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hsai_BlockA2.Init.Protocol = SAI_FREE_PROTOCOL;
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hsai_BlockA2.Init.AudioMode = SAI_MODEMASTER_TX;
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hsai_BlockA2.Init.DataSize = SAI_DATASIZE_16;
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hsai_BlockA2.Init.FirstBit = SAI_FIRSTBIT_MSB;
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hsai_BlockA2.Init.ClockStrobing = SAI_CLOCKSTROBING_FALLINGEDGE;
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hsai_BlockA2.Init.Synchro = SAI_ASYNCHRONOUS;
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hsai_BlockA2.Init.OutputDrive = SAI_OUTPUTDRIVE_DISABLE;
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hsai_BlockA2.Init.NoDivider = SAI_MASTERDIVIDER_ENABLE;
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hsai_BlockA2.Init.FIFOThreshold = SAI_FIFOTHRESHOLD_EMPTY;
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hsai_BlockA2.Init.AudioFrequency = SAI_AUDIO_FREQUENCY_192K;
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hsai_BlockA2.Init.SynchroExt = SAI_SYNCEXT_DISABLE;
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hsai_BlockA2.Init.MonoStereoMode = SAI_STEREOMODE;
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hsai_BlockA2.Init.CompandingMode = SAI_NOCOMPANDING;
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hsai_BlockA2.Init.TriState = SAI_OUTPUT_NOTRELEASED;
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hsai_BlockA2.FrameInit.FrameLength = 16;
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hsai_BlockA2.FrameInit.ActiveFrameLength = 1;
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hsai_BlockA2.FrameInit.FSDefinition = SAI_FS_STARTFRAME;
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hsai_BlockA2.FrameInit.FSPolarity = SAI_FS_ACTIVE_LOW;
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hsai_BlockA2.FrameInit.FSOffset = SAI_FS_FIRSTBIT;
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hsai_BlockA2.SlotInit.FirstBitOffset = 0;
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hsai_BlockA2.SlotInit.SlotSize = SAI_SLOTSIZE_DATASIZE;
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hsai_BlockA2.SlotInit.SlotNumber = 1;
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hsai_BlockA2.SlotInit.SlotActive = 0x00000000;
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if (HAL_SAI_Init(&hsai_BlockA2) != HAL_OK)
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{
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Error_Handler();
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}
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/* USER CODE BEGIN SAI2_Init 2 */
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/* USER CODE END SAI2_Init 2 */
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}
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/**
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/**
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* @brief USART6 Initialization Function
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* @brief USART6 Initialization Function
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* @param None
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* @param None
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@ -602,6 +709,22 @@ static void MX_USART6_UART_Init(void)
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}
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}
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/**
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* Enable DMA controller clock
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*/
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static void MX_DMA_Init(void)
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{
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/* DMA controller clock enable */
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__HAL_RCC_DMA2_CLK_ENABLE();
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/* DMA interrupt init */
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/* DMA2_Stream4_IRQn interrupt configuration */
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HAL_NVIC_SetPriority(DMA2_Stream4_IRQn, 5, 0);
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HAL_NVIC_EnableIRQ(DMA2_Stream4_IRQn);
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}
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/* FMC initialization function */
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/* FMC initialization function */
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static void MX_FMC_Init(void)
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static void MX_FMC_Init(void)
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{
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{
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@ -722,14 +845,6 @@ static void MX_GPIO_Init(void)
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GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
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GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(QSPI_D2_GPIO_Port, &GPIO_InitStruct);
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HAL_GPIO_Init(QSPI_D2_GPIO_Port, &GPIO_InitStruct);
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/*Configure GPIO pins : SAI2_I2C1_SCL_Pin SAI2_I2C1_SDA_Pin */
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GPIO_InitStruct.Pin = SAI2_I2C1_SCL_Pin|SAI2_I2C1_SDA_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/*Configure GPIO pins : ARD_D11_TIM3_CH2_SPI1_MOSI_Pin ARD_D12_SPI1_MISO_Pin */
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/*Configure GPIO pins : ARD_D11_TIM3_CH2_SPI1_MOSI_Pin ARD_D12_SPI1_MISO_Pin */
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GPIO_InitStruct.Pin = ARD_D11_TIM3_CH2_SPI1_MOSI_Pin|ARD_D12_SPI1_MISO_Pin;
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GPIO_InitStruct.Pin = ARD_D11_TIM3_CH2_SPI1_MOSI_Pin|ARD_D12_SPI1_MISO_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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@ -783,14 +898,6 @@ static void MX_GPIO_Init(void)
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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HAL_GPIO_Init(SAI2_INT_GPIO_Port, &GPIO_InitStruct);
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HAL_GPIO_Init(SAI2_INT_GPIO_Port, &GPIO_InitStruct);
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/*Configure GPIO pin : SAI2_SD_B_Pin */
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GPIO_InitStruct.Pin = SAI2_SD_B_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF10_SAI2;
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HAL_GPIO_Init(SAI2_SD_B_GPIO_Port, &GPIO_InitStruct);
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/*Configure GPIO pins : WIFI_GPIO_2_Pin WIFI_CH_PD_Pin */
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/*Configure GPIO pins : WIFI_GPIO_2_Pin WIFI_CH_PD_Pin */
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GPIO_InitStruct.Pin = WIFI_GPIO_2_Pin|WIFI_CH_PD_Pin;
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GPIO_InitStruct.Pin = WIFI_GPIO_2_Pin|WIFI_CH_PD_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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@ -813,14 +920,6 @@ static void MX_GPIO_Init(void)
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GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
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GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI;
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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HAL_GPIO_Init(GPIOC, &GPIO_InitStruct);
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/*Configure GPIO pins : SAI2_FS_A_Pin SAI2_SD_A_Pin SAI2_SCK_A_Pin SAI2_MCLK_A_Pin */
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GPIO_InitStruct.Pin = SAI2_FS_A_Pin|SAI2_SD_A_Pin|SAI2_SCK_A_Pin|SAI2_MCLK_A_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
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GPIO_InitStruct.Alternate = GPIO_AF10_SAI2;
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HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
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/*Configure GPIO pins : PMOD_SPI2_MOSI_Pin PMOD_SPI2_MISO_Pin PI10 */
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/*Configure GPIO pins : PMOD_SPI2_MOSI_Pin PMOD_SPI2_MISO_Pin PI10 */
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GPIO_InitStruct.Pin = PMOD_SPI2_MOSI_Pin|PMOD_SPI2_MISO_Pin|GPIO_PIN_10;
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GPIO_InitStruct.Pin = PMOD_SPI2_MOSI_Pin|PMOD_SPI2_MISO_Pin|GPIO_PIN_10;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP;
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{
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{
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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GPIO_InitTypeDef GPIO_InitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
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if(hi2c->Instance==I2C3)
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if(hi2c->Instance==I2C1)
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{
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/* USER CODE BEGIN I2C1_MspInit 0 */
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/* USER CODE END I2C1_MspInit 0 */
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/** Initializes the peripherals clock
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*/
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PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2C1;
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PeriphClkInitStruct.I2c1ClockSelection = RCC_I2C1CLKSOURCE_PCLK1;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
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{
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Error_Handler();
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}
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__HAL_RCC_GPIOB_CLK_ENABLE();
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/**I2C1 GPIO Configuration
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PB8 ------> I2C1_SCL
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PB9 ------> I2C1_SDA
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*/
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GPIO_InitStruct.Pin = SAI2_I2C1_SCL_Pin|SAI2_I2C1_SDA_Pin;
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GPIO_InitStruct.Mode = GPIO_MODE_AF_OD;
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GPIO_InitStruct.Pull = GPIO_NOPULL;
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GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH;
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GPIO_InitStruct.Alternate = GPIO_AF4_I2C1;
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HAL_GPIO_Init(GPIOB, &GPIO_InitStruct);
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/* Peripheral clock enable */
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__HAL_RCC_I2C1_CLK_ENABLE();
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/* USER CODE BEGIN I2C1_MspInit 1 */
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/* USER CODE END I2C1_MspInit 1 */
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}
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else if(hi2c->Instance==I2C3)
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{
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{
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/* USER CODE BEGIN I2C3_MspInit 0 */
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/* USER CODE BEGIN I2C3_MspInit 0 */
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@ -129,7 +162,6 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
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/* USER CODE BEGIN I2C3_MspInit 1 */
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/* USER CODE BEGIN I2C3_MspInit 1 */
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/* USER CODE END I2C3_MspInit 1 */
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/* USER CODE END I2C3_MspInit 1 */
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}
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}
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}
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}
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@ -142,7 +174,27 @@ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c)
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*/
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*/
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void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
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void HAL_I2C_MspDeInit(I2C_HandleTypeDef* hi2c)
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{
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{
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if(hi2c->Instance==I2C3)
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if(hi2c->Instance==I2C1)
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{
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/* USER CODE BEGIN I2C1_MspDeInit 0 */
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/* USER CODE END I2C1_MspDeInit 0 */
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/* Peripheral clock disable */
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__HAL_RCC_I2C1_CLK_DISABLE();
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/**I2C1 GPIO Configuration
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PB8 ------> I2C1_SCL
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PB9 ------> I2C1_SDA
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*/
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HAL_GPIO_DeInit(SAI2_I2C1_SCL_GPIO_Port, SAI2_I2C1_SCL_Pin);
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|
|
||||||
|
HAL_GPIO_DeInit(SAI2_I2C1_SDA_GPIO_Port, SAI2_I2C1_SDA_Pin);
|
||||||
|
|
||||||
|
/* USER CODE BEGIN I2C1_MspDeInit 1 */
|
||||||
|
|
||||||
|
/* USER CODE END I2C1_MspDeInit 1 */
|
||||||
|
}
|
||||||
|
else if(hi2c->Instance==I2C3)
|
||||||
{
|
{
|
||||||
/* USER CODE BEGIN I2C3_MspDeInit 0 */
|
/* USER CODE BEGIN I2C3_MspDeInit 0 */
|
||||||
|
|
||||||
@ -445,6 +497,115 @@ void HAL_SRAM_MspDeInit(SRAM_HandleTypeDef* hsram){
|
|||||||
/* USER CODE END SRAM_MspDeInit 1 */
|
/* USER CODE END SRAM_MspDeInit 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
extern DMA_HandleTypeDef hdma_sai2_a;
|
||||||
|
|
||||||
|
static uint32_t SAI2_client =0;
|
||||||
|
|
||||||
|
void HAL_SAI_MspInit(SAI_HandleTypeDef* hsai)
|
||||||
|
{
|
||||||
|
|
||||||
|
GPIO_InitTypeDef GPIO_InitStruct;
|
||||||
|
RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0};
|
||||||
|
/* SAI2 */
|
||||||
|
if(hsai->Instance==SAI2_Block_A)
|
||||||
|
{
|
||||||
|
/* Peripheral clock enable */
|
||||||
|
|
||||||
|
/** Initializes the peripherals clock
|
||||||
|
*/
|
||||||
|
PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_SAI2;
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIN = 192;
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIQ = 2;
|
||||||
|
PeriphClkInitStruct.PLLSAI.PLLSAIP = RCC_PLLSAIP_DIV2;
|
||||||
|
PeriphClkInitStruct.PLLSAIDivQ = 1;
|
||||||
|
PeriphClkInitStruct.Sai2ClockSelection = RCC_SAI2CLKSOURCE_PLLSAI;
|
||||||
|
if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
if (SAI2_client == 0)
|
||||||
|
{
|
||||||
|
__HAL_RCC_SAI2_CLK_ENABLE();
|
||||||
|
}
|
||||||
|
SAI2_client ++;
|
||||||
|
|
||||||
|
/**SAI2_A_Block_A GPIO Configuration
|
||||||
|
PG10 ------> SAI2_SD_B
|
||||||
|
PI7 ------> SAI2_FS_A
|
||||||
|
PI6 ------> SAI2_SD_A
|
||||||
|
PI5 ------> SAI2_SCK_A
|
||||||
|
PI4 ------> SAI2_MCLK_A
|
||||||
|
*/
|
||||||
|
GPIO_InitStruct.Pin = SAI2_SD_B_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF10_SAI2;
|
||||||
|
HAL_GPIO_Init(SAI2_SD_B_GPIO_Port, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
GPIO_InitStruct.Pin = SAI2_FS_A_Pin|SAI2_SD_A_Pin|SAI2_SCK_A_Pin|SAI2_MCLK_A_Pin;
|
||||||
|
GPIO_InitStruct.Mode = GPIO_MODE_AF_PP;
|
||||||
|
GPIO_InitStruct.Pull = GPIO_NOPULL;
|
||||||
|
GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW;
|
||||||
|
GPIO_InitStruct.Alternate = GPIO_AF10_SAI2;
|
||||||
|
HAL_GPIO_Init(GPIOI, &GPIO_InitStruct);
|
||||||
|
|
||||||
|
/* Peripheral DMA init*/
|
||||||
|
|
||||||
|
hdma_sai2_a.Instance = DMA2_Stream4;
|
||||||
|
hdma_sai2_a.Init.Channel = DMA_CHANNEL_3;
|
||||||
|
hdma_sai2_a.Init.Direction = DMA_MEMORY_TO_PERIPH;
|
||||||
|
hdma_sai2_a.Init.PeriphInc = DMA_PINC_DISABLE;
|
||||||
|
hdma_sai2_a.Init.MemInc = DMA_MINC_ENABLE;
|
||||||
|
hdma_sai2_a.Init.PeriphDataAlignment = DMA_PDATAALIGN_HALFWORD;
|
||||||
|
hdma_sai2_a.Init.MemDataAlignment = DMA_MDATAALIGN_HALFWORD;
|
||||||
|
hdma_sai2_a.Init.Mode = DMA_CIRCULAR;
|
||||||
|
hdma_sai2_a.Init.Priority = DMA_PRIORITY_LOW;
|
||||||
|
hdma_sai2_a.Init.FIFOMode = DMA_FIFOMODE_DISABLE;
|
||||||
|
if (HAL_DMA_Init(&hdma_sai2_a) != HAL_OK)
|
||||||
|
{
|
||||||
|
Error_Handler();
|
||||||
|
}
|
||||||
|
|
||||||
|
/* Several peripheral DMA handle pointers point to the same DMA handle.
|
||||||
|
Be aware that there is only one stream to perform all the requested DMAs. */
|
||||||
|
__HAL_LINKDMA(hsai,hdmarx,hdma_sai2_a);
|
||||||
|
|
||||||
|
__HAL_LINKDMA(hsai,hdmatx,hdma_sai2_a);
|
||||||
|
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
void HAL_SAI_MspDeInit(SAI_HandleTypeDef* hsai)
|
||||||
|
{
|
||||||
|
/* SAI2 */
|
||||||
|
if(hsai->Instance==SAI2_Block_A)
|
||||||
|
{
|
||||||
|
SAI2_client --;
|
||||||
|
if (SAI2_client == 0)
|
||||||
|
{
|
||||||
|
/* Peripheral clock disable */
|
||||||
|
__HAL_RCC_SAI2_CLK_DISABLE();
|
||||||
|
}
|
||||||
|
|
||||||
|
/**SAI2_A_Block_A GPIO Configuration
|
||||||
|
PG10 ------> SAI2_SD_B
|
||||||
|
PI7 ------> SAI2_FS_A
|
||||||
|
PI6 ------> SAI2_SD_A
|
||||||
|
PI5 ------> SAI2_SCK_A
|
||||||
|
PI4 ------> SAI2_MCLK_A
|
||||||
|
*/
|
||||||
|
HAL_GPIO_DeInit(SAI2_SD_B_GPIO_Port, SAI2_SD_B_Pin);
|
||||||
|
|
||||||
|
HAL_GPIO_DeInit(GPIOI, SAI2_FS_A_Pin|SAI2_SD_A_Pin|SAI2_SCK_A_Pin|SAI2_MCLK_A_Pin);
|
||||||
|
|
||||||
|
/* SAI2 DMA Deinit */
|
||||||
|
HAL_DMA_DeInit(hsai->hdmarx);
|
||||||
|
HAL_DMA_DeInit(hsai->hdmatx);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
/* USER CODE BEGIN 1 */
|
/* USER CODE BEGIN 1 */
|
||||||
|
|
||||||
/* USER CODE END 1 */
|
/* USER CODE END 1 */
|
||||||
|
|||||||
@ -56,6 +56,7 @@
|
|||||||
|
|
||||||
/* External variables --------------------------------------------------------*/
|
/* External variables --------------------------------------------------------*/
|
||||||
extern HCD_HandleTypeDef hhcd_USB_OTG_FS;
|
extern HCD_HandleTypeDef hhcd_USB_OTG_FS;
|
||||||
|
extern DMA_HandleTypeDef hdma_sai2_a;
|
||||||
extern TIM_HandleTypeDef htim14;
|
extern TIM_HandleTypeDef htim14;
|
||||||
|
|
||||||
/* USER CODE BEGIN EV */
|
/* USER CODE BEGIN EV */
|
||||||
@ -174,6 +175,20 @@ void TIM8_TRG_COM_TIM14_IRQHandler(void)
|
|||||||
/* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */
|
/* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief This function handles DMA2 stream4 global interrupt.
|
||||||
|
*/
|
||||||
|
void DMA2_Stream4_IRQHandler(void)
|
||||||
|
{
|
||||||
|
/* USER CODE BEGIN DMA2_Stream4_IRQn 0 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA2_Stream4_IRQn 0 */
|
||||||
|
HAL_DMA_IRQHandler(&hdma_sai2_a);
|
||||||
|
/* USER CODE BEGIN DMA2_Stream4_IRQn 1 */
|
||||||
|
|
||||||
|
/* USER CODE END DMA2_Stream4_IRQn 1 */
|
||||||
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* @brief This function handles USB On The Go FS global interrupt.
|
* @brief This function handles USB On The Go FS global interrupt.
|
||||||
*/
|
*/
|
||||||
|
|||||||
879
Versuch5/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sai.h
Normal file
879
Versuch5/Drivers/STM32F7xx_HAL_Driver/Inc/stm32f7xx_hal_sai.h
Normal file
@ -0,0 +1,879 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f7xx_hal_sai.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of SAI HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F7xx_HAL_SAI_H
|
||||||
|
#define __STM32F7xx_HAL_SAI_H
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
extern "C" {
|
||||||
|
#endif
|
||||||
|
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f7xx_hal_def.h"
|
||||||
|
|
||||||
|
/** @addtogroup STM32F7xx_HAL_Driver
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup SAI
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/** @defgroup SAI_Exported_Types SAI Exported Types
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief HAL State structures definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_SAI_STATE_RESET = 0x00U, /*!< SAI not yet initialized or disabled */
|
||||||
|
HAL_SAI_STATE_READY = 0x01U, /*!< SAI initialized and ready for use */
|
||||||
|
HAL_SAI_STATE_BUSY = 0x02U, /*!< SAI internal process is ongoing */
|
||||||
|
HAL_SAI_STATE_BUSY_TX = 0x12U, /*!< Data transmission process is ongoing */
|
||||||
|
HAL_SAI_STATE_BUSY_RX = 0x22U, /*!< Data reception process is ongoing */
|
||||||
|
} HAL_SAI_StateTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SAI Callback prototype
|
||||||
|
*/
|
||||||
|
typedef void (*SAIcallback)(void);
|
||||||
|
|
||||||
|
/** @defgroup SAI_Init_Structure_definition SAI Init Structure definition
|
||||||
|
* @brief SAI Init Structure definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t AudioMode; /*!< Specifies the SAI Block audio Mode.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Mode */
|
||||||
|
|
||||||
|
uint32_t Synchro; /*!< Specifies SAI Block synchronization
|
||||||
|
This parameter can be a value of @ref SAI_Block_Synchronization */
|
||||||
|
|
||||||
|
uint32_t SynchroExt; /*!< Specifies SAI external output synchronization, this setup is common
|
||||||
|
for BlockA and BlockB
|
||||||
|
This parameter can be a value of @ref SAI_Block_SyncExt
|
||||||
|
@note: If both audio blocks of same SAI are used, this parameter has
|
||||||
|
to be set to the same value for each audio block */
|
||||||
|
|
||||||
|
uint32_t OutputDrive; /*!< Specifies when SAI Block outputs are driven.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Output_Drive
|
||||||
|
@note this value has to be set before enabling the audio block
|
||||||
|
but after the audio block configuration. */
|
||||||
|
|
||||||
|
uint32_t NoDivider; /*!< Specifies whether master clock will be divided or not.
|
||||||
|
This parameter can be a value of @ref SAI_Block_NoDivider
|
||||||
|
@note: If bit NODIV in the SAI_xCR1 register is cleared, the frame length
|
||||||
|
should be aligned to a number equal to a power of 2, from 8 to 256.
|
||||||
|
If bit NODIV in the SAI_xCR1 register is set, the frame length can
|
||||||
|
take any of the values without constraint since the input clock of
|
||||||
|
the audio block should be equal to the bit clock.
|
||||||
|
There is no MCLK_x clock which can be output. */
|
||||||
|
|
||||||
|
uint32_t FIFOThreshold; /*!< Specifies SAI Block FIFO threshold.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Fifo_Threshold */
|
||||||
|
|
||||||
|
uint32_t AudioFrequency; /*!< Specifies the audio frequency sampling.
|
||||||
|
This parameter can be a value of @ref SAI_Audio_Frequency */
|
||||||
|
|
||||||
|
uint32_t Mckdiv; /*!< Specifies the master clock divider.
|
||||||
|
This parameter must be a number between Min_Data = 0 and Max_Data = 15.
|
||||||
|
@note This parameter is used only if AudioFrequency is set to
|
||||||
|
SAI_AUDIO_FREQUENCY_MCKDIV otherwise it is internally computed. */
|
||||||
|
|
||||||
|
uint32_t MonoStereoMode; /*!< Specifies if the mono or stereo mode is selected.
|
||||||
|
This parameter can be a value of @ref SAI_Mono_Stereo_Mode */
|
||||||
|
|
||||||
|
uint32_t CompandingMode; /*!< Specifies the companding mode type.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Companding_Mode */
|
||||||
|
|
||||||
|
uint32_t TriState; /*!< Specifies the companding mode type.
|
||||||
|
This parameter can be a value of @ref SAI_TRIState_Management */
|
||||||
|
|
||||||
|
/* This part of the structure is automatically filled if your are using the high level initialisation
|
||||||
|
function HAL_SAI_InitProtocol */
|
||||||
|
|
||||||
|
uint32_t Protocol; /*!< Specifies the SAI Block protocol.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Protocol */
|
||||||
|
|
||||||
|
uint32_t DataSize; /*!< Specifies the SAI Block data size.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Data_Size */
|
||||||
|
|
||||||
|
uint32_t FirstBit; /*!< Specifies whether data transfers start from MSB or LSB bit.
|
||||||
|
This parameter can be a value of @ref SAI_Block_MSB_LSB_transmission */
|
||||||
|
|
||||||
|
uint32_t ClockStrobing; /*!< Specifies the SAI Block clock strobing edge sensitivity.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Clock_Strobing */
|
||||||
|
} SAI_InitTypeDef;
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Frame_Structure_definition SAI Frame Structure definition
|
||||||
|
* @brief SAI Frame Init structure definition
|
||||||
|
* @note For SPDIF and AC97 protocol, these parameters are not used (set by hardware).
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
|
||||||
|
uint32_t FrameLength; /*!< Specifies the Frame length, the number of SCK clocks for each audio frame.
|
||||||
|
This parameter must be a number between Min_Data = 8 and Max_Data = 256.
|
||||||
|
@note: If master clock MCLK_x pin is declared as an output, the frame length
|
||||||
|
should be aligned to a number equal to power of 2 in order to keep
|
||||||
|
in an audio frame, an integer number of MCLK pulses by bit Clock. */
|
||||||
|
|
||||||
|
uint32_t ActiveFrameLength; /*!< Specifies the Frame synchronization active level length.
|
||||||
|
This Parameter specifies the length in number of bit clock (SCK + 1)
|
||||||
|
of the active level of FS signal in audio frame.
|
||||||
|
This parameter must be a number between Min_Data = 1 and Max_Data = 128 */
|
||||||
|
|
||||||
|
uint32_t FSDefinition; /*!< Specifies the Frame synchronization definition.
|
||||||
|
This parameter can be a value of @ref SAI_Block_FS_Definition */
|
||||||
|
|
||||||
|
uint32_t FSPolarity; /*!< Specifies the Frame synchronization Polarity.
|
||||||
|
This parameter can be a value of @ref SAI_Block_FS_Polarity */
|
||||||
|
|
||||||
|
uint32_t FSOffset; /*!< Specifies the Frame synchronization Offset.
|
||||||
|
This parameter can be a value of @ref SAI_Block_FS_Offset */
|
||||||
|
|
||||||
|
} SAI_FrameInitTypeDef;
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Slot_Structure_definition SAI Slot Structure definition
|
||||||
|
* @brief SAI Block Slot Init Structure definition
|
||||||
|
* @note For SPDIF protocol, these parameters are not used (set by hardware).
|
||||||
|
* @note For AC97 protocol, only SlotActive parameter is used (the others are set by hardware).
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct
|
||||||
|
{
|
||||||
|
uint32_t FirstBitOffset; /*!< Specifies the position of first data transfer bit in the slot.
|
||||||
|
This parameter must be a number between Min_Data = 0 and Max_Data = 24 */
|
||||||
|
|
||||||
|
uint32_t SlotSize; /*!< Specifies the Slot Size.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Slot_Size */
|
||||||
|
|
||||||
|
uint32_t SlotNumber; /*!< Specifies the number of slot in the audio frame.
|
||||||
|
This parameter must be a number between Min_Data = 1 and Max_Data = 16 */
|
||||||
|
|
||||||
|
uint32_t SlotActive; /*!< Specifies the slots in audio frame that will be activated.
|
||||||
|
This parameter can be a value of @ref SAI_Block_Slot_Active */
|
||||||
|
} SAI_SlotInitTypeDef;
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Handle_Structure_definition SAI Handle Structure definition
|
||||||
|
* @brief SAI handle Structure definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
typedef struct __SAI_HandleTypeDef
|
||||||
|
{
|
||||||
|
SAI_Block_TypeDef *Instance; /*!< SAI Blockx registers base address */
|
||||||
|
|
||||||
|
SAI_InitTypeDef Init; /*!< SAI communication parameters */
|
||||||
|
|
||||||
|
SAI_FrameInitTypeDef FrameInit; /*!< SAI Frame configuration parameters */
|
||||||
|
|
||||||
|
SAI_SlotInitTypeDef SlotInit; /*!< SAI Slot configuration parameters */
|
||||||
|
|
||||||
|
uint8_t *pBuffPtr; /*!< Pointer to SAI transfer Buffer */
|
||||||
|
|
||||||
|
uint16_t XferSize; /*!< SAI transfer size */
|
||||||
|
|
||||||
|
uint16_t XferCount; /*!< SAI transfer counter */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmatx; /*!< SAI Tx DMA handle parameters */
|
||||||
|
|
||||||
|
DMA_HandleTypeDef *hdmarx; /*!< SAI Rx DMA handle parameters */
|
||||||
|
|
||||||
|
SAIcallback mutecallback; /*!< SAI mute callback */
|
||||||
|
|
||||||
|
void (*InterruptServiceRoutine)(struct __SAI_HandleTypeDef *hsai); /* function pointer for IRQ handler */
|
||||||
|
|
||||||
|
HAL_LockTypeDef Lock; /*!< SAI locking object */
|
||||||
|
|
||||||
|
__IO HAL_SAI_StateTypeDef State; /*!< SAI communication state */
|
||||||
|
|
||||||
|
__IO uint32_t ErrorCode; /*!< SAI Error code */
|
||||||
|
|
||||||
|
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||||
|
void (*RxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive complete callback */
|
||||||
|
void (*RxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI receive half complete callback */
|
||||||
|
void (*TxCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit complete callback */
|
||||||
|
void (*TxHalfCpltCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI transmit half complete callback */
|
||||||
|
void (*ErrorCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI error callback */
|
||||||
|
void (*MspInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP init callback */
|
||||||
|
void (*MspDeInitCallback)(struct __SAI_HandleTypeDef *hsai); /*!< SAI MSP de-init callback */
|
||||||
|
#endif
|
||||||
|
} SAI_HandleTypeDef;
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||||
|
/**
|
||||||
|
* @brief SAI callback ID enumeration definition
|
||||||
|
*/
|
||||||
|
typedef enum
|
||||||
|
{
|
||||||
|
HAL_SAI_RX_COMPLETE_CB_ID = 0x00U, /*!< SAI receive complete callback ID */
|
||||||
|
HAL_SAI_RX_HALFCOMPLETE_CB_ID = 0x01U, /*!< SAI receive half complete callback ID */
|
||||||
|
HAL_SAI_TX_COMPLETE_CB_ID = 0x02U, /*!< SAI transmit complete callback ID */
|
||||||
|
HAL_SAI_TX_HALFCOMPLETE_CB_ID = 0x03U, /*!< SAI transmit half complete callback ID */
|
||||||
|
HAL_SAI_ERROR_CB_ID = 0x04U, /*!< SAI error callback ID */
|
||||||
|
HAL_SAI_MSPINIT_CB_ID = 0x05U, /*!< SAI MSP init callback ID */
|
||||||
|
HAL_SAI_MSPDEINIT_CB_ID = 0x06U /*!< SAI MSP de-init callback ID */
|
||||||
|
} HAL_SAI_CallbackIDTypeDef;
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @brief SAI callback pointer definition
|
||||||
|
*/
|
||||||
|
typedef void (*pSAI_CallbackTypeDef)(SAI_HandleTypeDef *hsai);
|
||||||
|
#endif
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Exported_Constants SAI Exported Constants
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Error_Code SAI Error Code
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define HAL_SAI_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
|
||||||
|
#define HAL_SAI_ERROR_OVR ((uint32_t)0x00000001U) /*!< Overrun Error */
|
||||||
|
#define HAL_SAI_ERROR_UDR ((uint32_t)0x00000002U) /*!< Underrun error */
|
||||||
|
#define HAL_SAI_ERROR_AFSDET ((uint32_t)0x00000004U) /*!< Anticipated Frame synchronisation detection */
|
||||||
|
#define HAL_SAI_ERROR_LFSDET ((uint32_t)0x00000008U) /*!< Late Frame synchronisation detection */
|
||||||
|
#define HAL_SAI_ERROR_CNREADY ((uint32_t)0x00000010U) /*!< codec not ready */
|
||||||
|
#define HAL_SAI_ERROR_WCKCFG ((uint32_t)0x00000020U) /*!< Wrong clock configuration */
|
||||||
|
#define HAL_SAI_ERROR_TIMEOUT ((uint32_t)0x00000040U) /*!< Timeout error */
|
||||||
|
#define HAL_SAI_ERROR_DMA ((uint32_t)0x00000080U) /*!< DMA error */
|
||||||
|
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||||
|
#define HAL_SAI_ERROR_INVALID_CALLBACK 0x00000100U /*!< Invalid callback error */
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_SyncExt SAI External synchronisation
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_SYNCEXT_DISABLE 0
|
||||||
|
#define SAI_SYNCEXT_OUTBLOCKA_ENABLE 1
|
||||||
|
#define SAI_SYNCEXT_OUTBLOCKB_ENABLE 2
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Protocol SAI Supported protocol
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_I2S_STANDARD 0
|
||||||
|
#define SAI_I2S_MSBJUSTIFIED 1
|
||||||
|
#define SAI_I2S_LSBJUSTIFIED 2
|
||||||
|
#define SAI_PCM_LONG 3
|
||||||
|
#define SAI_PCM_SHORT 4
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Protocol_DataSize SAI protocol data size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_PROTOCOL_DATASIZE_16BIT 0
|
||||||
|
#define SAI_PROTOCOL_DATASIZE_16BITEXTENDED 1
|
||||||
|
#define SAI_PROTOCOL_DATASIZE_24BIT 2
|
||||||
|
#define SAI_PROTOCOL_DATASIZE_32BIT 3
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Audio_Frequency SAI Audio Frequency
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_AUDIO_FREQUENCY_192K ((uint32_t)192000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_96K ((uint32_t)96000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_48K ((uint32_t)48000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_44K ((uint32_t)44100U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_32K ((uint32_t)32000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_22K ((uint32_t)22050U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_16K ((uint32_t)16000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_11K ((uint32_t)11025U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_8K ((uint32_t)8000U)
|
||||||
|
#define SAI_AUDIO_FREQUENCY_MCKDIV ((uint32_t)0U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Mode SAI Block Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_MODEMASTER_TX ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_MODEMASTER_RX ((uint32_t)SAI_xCR1_MODE_0)
|
||||||
|
#define SAI_MODESLAVE_TX ((uint32_t)SAI_xCR1_MODE_1)
|
||||||
|
#define SAI_MODESLAVE_RX ((uint32_t)(SAI_xCR1_MODE_1 | SAI_xCR1_MODE_0))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Protocol SAI Block Protocol
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FREE_PROTOCOL ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_SPDIF_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_0)
|
||||||
|
#define SAI_AC97_PROTOCOL ((uint32_t)SAI_xCR1_PRTCFG_1)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Data_Size SAI Block Data Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_DATASIZE_8 ((uint32_t)SAI_xCR1_DS_1)
|
||||||
|
#define SAI_DATASIZE_10 ((uint32_t)(SAI_xCR1_DS_1 | SAI_xCR1_DS_0))
|
||||||
|
#define SAI_DATASIZE_16 ((uint32_t)SAI_xCR1_DS_2)
|
||||||
|
#define SAI_DATASIZE_20 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_0))
|
||||||
|
#define SAI_DATASIZE_24 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1))
|
||||||
|
#define SAI_DATASIZE_32 ((uint32_t)(SAI_xCR1_DS_2 | SAI_xCR1_DS_1 | SAI_xCR1_DS_0))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_MSB_LSB_transmission SAI Block MSB LSB transmission
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FIRSTBIT_MSB ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FIRSTBIT_LSB ((uint32_t)SAI_xCR1_LSBFIRST)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Clock_Strobing SAI Block Clock Strobing
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_CLOCKSTROBING_FALLINGEDGE 0
|
||||||
|
#define SAI_CLOCKSTROBING_RISINGEDGE 1
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Synchronization SAI Block Synchronization
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_ASYNCHRONOUS 0 /*!< Asynchronous */
|
||||||
|
#define SAI_SYNCHRONOUS 1 /*!< Synchronous with other block of same SAI */
|
||||||
|
#define SAI_SYNCHRONOUS_EXT_SAI1 2 /*!< Synchronous with other SAI, SAI1 */
|
||||||
|
#define SAI_SYNCHRONOUS_EXT_SAI2 3 /*!< Synchronous with other SAI, SAI2 */
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Output_Drive SAI Block Output Drive
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_OUTPUTDRIVE_DISABLE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_OUTPUTDRIVE_ENABLE ((uint32_t)SAI_xCR1_OUTDRIV)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_NoDivider SAI Block NoDivider
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_MASTERDIVIDER_ENABLE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_MASTERDIVIDER_DISABLE ((uint32_t)SAI_xCR1_NODIV)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_FS_Definition SAI Block FS Definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FS_STARTFRAME ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FS_CHANNEL_IDENTIFICATION ((uint32_t)SAI_xFRCR_FSDEF)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_FS_Polarity SAI Block FS Polarity
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FS_ACTIVE_LOW ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FS_ACTIVE_HIGH ((uint32_t)SAI_xFRCR_FSPOL)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_FS_Offset SAI Block FS Offset
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FS_FIRSTBIT ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FS_BEFOREFIRSTBIT ((uint32_t)SAI_xFRCR_FSOFF)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Slot_Size SAI Block Slot Size
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_SLOTSIZE_DATASIZE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_SLOTSIZE_16B ((uint32_t)SAI_xSLOTR_SLOTSZ_0)
|
||||||
|
#define SAI_SLOTSIZE_32B ((uint32_t)SAI_xSLOTR_SLOTSZ_1)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Slot_Active SAI Block Slot Active
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_SLOT_NOTACTIVE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_SLOTACTIVE_0 ((uint32_t)0x00000001U)
|
||||||
|
#define SAI_SLOTACTIVE_1 ((uint32_t)0x00000002U)
|
||||||
|
#define SAI_SLOTACTIVE_2 ((uint32_t)0x00000004U)
|
||||||
|
#define SAI_SLOTACTIVE_3 ((uint32_t)0x00000008U)
|
||||||
|
#define SAI_SLOTACTIVE_4 ((uint32_t)0x00000010U)
|
||||||
|
#define SAI_SLOTACTIVE_5 ((uint32_t)0x00000020U)
|
||||||
|
#define SAI_SLOTACTIVE_6 ((uint32_t)0x00000040U)
|
||||||
|
#define SAI_SLOTACTIVE_7 ((uint32_t)0x00000080U)
|
||||||
|
#define SAI_SLOTACTIVE_8 ((uint32_t)0x00000100U)
|
||||||
|
#define SAI_SLOTACTIVE_9 ((uint32_t)0x00000200U)
|
||||||
|
#define SAI_SLOTACTIVE_10 ((uint32_t)0x00000400U)
|
||||||
|
#define SAI_SLOTACTIVE_11 ((uint32_t)0x00000800U)
|
||||||
|
#define SAI_SLOTACTIVE_12 ((uint32_t)0x00001000U)
|
||||||
|
#define SAI_SLOTACTIVE_13 ((uint32_t)0x00002000U)
|
||||||
|
#define SAI_SLOTACTIVE_14 ((uint32_t)0x00004000U)
|
||||||
|
#define SAI_SLOTACTIVE_15 ((uint32_t)0x00008000U)
|
||||||
|
#define SAI_SLOTACTIVE_ALL ((uint32_t)0x0000FFFFU)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Mono_Stereo_Mode SAI Mono Stereo Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_STEREOMODE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_MONOMODE ((uint32_t)SAI_xCR1_MONO)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_TRIState_Management SAI TRIState Management
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_OUTPUT_NOTRELEASED ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_OUTPUT_RELEASED ((uint32_t)SAI_xCR2_TRIS)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Fifo_Threshold SAI Block Fifo Threshold
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FIFOTHRESHOLD_EMPTY ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FIFOTHRESHOLD_1QF ((uint32_t)(SAI_xCR2_FTH_0))
|
||||||
|
#define SAI_FIFOTHRESHOLD_HF ((uint32_t)(SAI_xCR2_FTH_1))
|
||||||
|
#define SAI_FIFOTHRESHOLD_3QF ((uint32_t)(SAI_xCR2_FTH_1 | SAI_xCR2_FTH_0))
|
||||||
|
#define SAI_FIFOTHRESHOLD_FULL ((uint32_t)(SAI_xCR2_FTH_2))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Companding_Mode SAI Block Companding Mode
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_NOCOMPANDING ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_ULAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1))
|
||||||
|
#define SAI_ALAW_1CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0))
|
||||||
|
#define SAI_ULAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_CPL))
|
||||||
|
#define SAI_ALAW_2CPL_COMPANDING ((uint32_t)(SAI_xCR2_COMP_1 | SAI_xCR2_COMP_0 | SAI_xCR2_CPL))
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Mute_Value SAI Block Mute Value
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_ZERO_VALUE ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_LAST_SENT_VALUE ((uint32_t)SAI_xCR2_MUTEVAL)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Interrupts_Definition SAI Block Interrupts Definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_IT_OVRUDR ((uint32_t)SAI_xIMR_OVRUDRIE)
|
||||||
|
#define SAI_IT_MUTEDET ((uint32_t)SAI_xIMR_MUTEDETIE)
|
||||||
|
#define SAI_IT_WCKCFG ((uint32_t)SAI_xIMR_WCKCFGIE)
|
||||||
|
#define SAI_IT_FREQ ((uint32_t)SAI_xIMR_FREQIE)
|
||||||
|
#define SAI_IT_CNRDY ((uint32_t)SAI_xIMR_CNRDYIE)
|
||||||
|
#define SAI_IT_AFSDET ((uint32_t)SAI_xIMR_AFSDETIE)
|
||||||
|
#define SAI_IT_LFSDET ((uint32_t)SAI_xIMR_LFSDETIE)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Flags_Definition SAI Block Flags Definition
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FLAG_OVRUDR ((uint32_t)SAI_xSR_OVRUDR)
|
||||||
|
#define SAI_FLAG_MUTEDET ((uint32_t)SAI_xSR_MUTEDET)
|
||||||
|
#define SAI_FLAG_WCKCFG ((uint32_t)SAI_xSR_WCKCFG)
|
||||||
|
#define SAI_FLAG_FREQ ((uint32_t)SAI_xSR_FREQ)
|
||||||
|
#define SAI_FLAG_CNRDY ((uint32_t)SAI_xSR_CNRDY)
|
||||||
|
#define SAI_FLAG_AFSDET ((uint32_t)SAI_xSR_AFSDET)
|
||||||
|
#define SAI_FLAG_LFSDET ((uint32_t)SAI_xSR_LFSDET)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @defgroup SAI_Block_Fifo_Status_Level SAI Block Fifo Status Level
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define SAI_FIFOSTATUS_EMPTY ((uint32_t)0x00000000U)
|
||||||
|
#define SAI_FIFOSTATUS_LESS1QUARTERFULL ((uint32_t)0x00010000U)
|
||||||
|
#define SAI_FIFOSTATUS_1QUARTERFULL ((uint32_t)0x00020000U)
|
||||||
|
#define SAI_FIFOSTATUS_HALFFULL ((uint32_t)0x00030000U)
|
||||||
|
#define SAI_FIFOSTATUS_3QUARTERFULL ((uint32_t)0x00040000U)
|
||||||
|
#define SAI_FIFOSTATUS_FULL ((uint32_t)0x00050000U)
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported macro ------------------------------------------------------------*/
|
||||||
|
/** @defgroup SAI_Exported_Macros SAI Exported Macros
|
||||||
|
* @brief macros to handle interrupts and specific configurations
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @brief Reset SAI handle state.
|
||||||
|
* @param __HANDLE__ specifies the SAI Handle.
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||||
|
#define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) do{ \
|
||||||
|
(__HANDLE__)->State = HAL_SAI_STATE_RESET; \
|
||||||
|
(__HANDLE__)->MspInitCallback = NULL; \
|
||||||
|
(__HANDLE__)->MspDeInitCallback = NULL; \
|
||||||
|
} while(0U)
|
||||||
|
#else
|
||||||
|
#define __HAL_SAI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SAI_STATE_RESET)
|
||||||
|
#endif /* USE_HAL_SAI_REGISTER_CALLBACKS */
|
||||||
|
|
||||||
|
/** @brief Enable or disable the specified SAI interrupts.
|
||||||
|
* @param __HANDLE__ specifies the SAI Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the interrupt source to enable or disable.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
|
||||||
|
* @arg SAI_IT_MUTEDET: Mute detection interrupt enable
|
||||||
|
* @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
|
||||||
|
* @arg SAI_IT_FREQ: FIFO request interrupt enable
|
||||||
|
* @arg SAI_IT_CNRDY: Codec not ready interrupt enable
|
||||||
|
* @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
|
||||||
|
* @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_SAI_ENABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR |= (__INTERRUPT__))
|
||||||
|
#define __HAL_SAI_DISABLE_IT(__HANDLE__, __INTERRUPT__) ((__HANDLE__)->Instance->IMR &= (~(__INTERRUPT__)))
|
||||||
|
|
||||||
|
/** @brief Check whether the specified SAI interrupt source is enabled or not.
|
||||||
|
* @param __HANDLE__ specifies the SAI Handle.
|
||||||
|
* @param __INTERRUPT__ specifies the SAI interrupt source to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg SAI_IT_OVRUDR: Overrun underrun interrupt enable
|
||||||
|
* @arg SAI_IT_MUTEDET: Mute detection interrupt enable
|
||||||
|
* @arg SAI_IT_WCKCFG: Wrong Clock Configuration interrupt enable
|
||||||
|
* @arg SAI_IT_FREQ: FIFO request interrupt enable
|
||||||
|
* @arg SAI_IT_CNRDY: Codec not ready interrupt enable
|
||||||
|
* @arg SAI_IT_AFSDET: Anticipated frame synchronization detection interrupt enable
|
||||||
|
* @arg SAI_IT_LFSDET: Late frame synchronization detection interrupt enable
|
||||||
|
* @retval The new state of __INTERRUPT__ (TRUE or FALSE).
|
||||||
|
*/
|
||||||
|
#define __HAL_SAI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->IMR & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
|
||||||
|
|
||||||
|
/** @brief Check whether the specified SAI flag is set or not.
|
||||||
|
* @param __HANDLE__ specifies the SAI Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to check.
|
||||||
|
* This parameter can be one of the following values:
|
||||||
|
* @arg SAI_FLAG_OVRUDR: Overrun underrun flag.
|
||||||
|
* @arg SAI_FLAG_MUTEDET: Mute detection flag.
|
||||||
|
* @arg SAI_FLAG_WCKCFG: Wrong Clock Configuration flag.
|
||||||
|
* @arg SAI_FLAG_FREQ: FIFO request flag.
|
||||||
|
* @arg SAI_FLAG_CNRDY: Codec not ready flag.
|
||||||
|
* @arg SAI_FLAG_AFSDET: Anticipated frame synchronization detection flag.
|
||||||
|
* @arg SAI_FLAG_LFSDET: Late frame synchronization detection flag.
|
||||||
|
* @retval The new state of __FLAG__ (TRUE or FALSE).
|
||||||
|
*/
|
||||||
|
#define __HAL_SAI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
|
||||||
|
|
||||||
|
/** @brief Clear the specified SAI pending flag.
|
||||||
|
* @param __HANDLE__ specifies the SAI Handle.
|
||||||
|
* @param __FLAG__ specifies the flag to check.
|
||||||
|
* This parameter can be any combination of the following values:
|
||||||
|
* @arg SAI_FLAG_OVRUDR: Clear Overrun underrun
|
||||||
|
* @arg SAI_FLAG_MUTEDET: Clear Mute detection
|
||||||
|
* @arg SAI_FLAG_WCKCFG: Clear Wrong Clock Configuration
|
||||||
|
* @arg SAI_FLAG_FREQ: Clear FIFO request
|
||||||
|
* @arg SAI_FLAG_CNRDY: Clear Codec not ready
|
||||||
|
* @arg SAI_FLAG_AFSDET: Clear Anticipated frame synchronization detection
|
||||||
|
* @arg SAI_FLAG_LFSDET: Clear Late frame synchronization detection
|
||||||
|
*
|
||||||
|
* @retval None
|
||||||
|
*/
|
||||||
|
#define __HAL_SAI_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->CLRFR = (__FLAG__))
|
||||||
|
|
||||||
|
#define __HAL_SAI_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= SAI_xCR1_SAIEN)
|
||||||
|
#define __HAL_SAI_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~SAI_xCR1_SAIEN)
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/** @addtogroup SAI_Exported_Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Initialization/de-initialization functions ********************************/
|
||||||
|
/** @addtogroup SAI_Exported_Functions_Group1
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
HAL_StatusTypeDef HAL_SAI_InitProtocol(SAI_HandleTypeDef *hsai, uint32_t protocol, uint32_t datasize, uint32_t nbslot);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Init(SAI_HandleTypeDef *hsai);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DeInit(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_MspInit(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_MspDeInit(SAI_HandleTypeDef *hsai);
|
||||||
|
|
||||||
|
#if (USE_HAL_SAI_REGISTER_CALLBACKS == 1)
|
||||||
|
/* SAI callbacks register/unregister functions ********************************/
|
||||||
|
HAL_StatusTypeDef HAL_SAI_RegisterCallback(SAI_HandleTypeDef *hsai,
|
||||||
|
HAL_SAI_CallbackIDTypeDef CallbackID,
|
||||||
|
pSAI_CallbackTypeDef pCallback);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_UnRegisterCallback(SAI_HandleTypeDef *hsai,
|
||||||
|
HAL_SAI_CallbackIDTypeDef CallbackID);
|
||||||
|
#endif
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* I/O operation functions ***************************************************/
|
||||||
|
|
||||||
|
/** @addtogroup SAI_Exported_Functions_Group2
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Blocking mode: Polling */
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Transmit(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Receive(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size, uint32_t Timeout);
|
||||||
|
|
||||||
|
/* Non-Blocking mode: Interrupt */
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Transmit_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Receive_IT(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
|
||||||
|
|
||||||
|
/* Non-Blocking mode: DMA */
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Transmit_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Receive_DMA(SAI_HandleTypeDef *hsai, uint8_t *pData, uint16_t Size);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DMAPause(SAI_HandleTypeDef *hsai);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DMAResume(SAI_HandleTypeDef *hsai);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DMAStop(SAI_HandleTypeDef *hsai);
|
||||||
|
|
||||||
|
/* Abort function */
|
||||||
|
HAL_StatusTypeDef HAL_SAI_Abort(SAI_HandleTypeDef *hsai);
|
||||||
|
|
||||||
|
/* Mute management */
|
||||||
|
HAL_StatusTypeDef HAL_SAI_EnableTxMuteMode(SAI_HandleTypeDef *hsai, uint16_t val);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DisableTxMuteMode(SAI_HandleTypeDef *hsai);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_EnableRxMuteMode(SAI_HandleTypeDef *hsai, SAIcallback callback, uint16_t counter);
|
||||||
|
HAL_StatusTypeDef HAL_SAI_DisableRxMuteMode(SAI_HandleTypeDef *hsai);
|
||||||
|
|
||||||
|
/* SAI IRQHandler and Callbacks used in non blocking modes (Interrupt and DMA) */
|
||||||
|
void HAL_SAI_IRQHandler(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_TxHalfCpltCallback(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_TxCpltCallback(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_RxHalfCpltCallback(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_RxCpltCallback(SAI_HandleTypeDef *hsai);
|
||||||
|
void HAL_SAI_ErrorCallback(SAI_HandleTypeDef *hsai);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/** @addtogroup SAI_Exported_Functions_Group3
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
/* Peripheral State functions ************************************************/
|
||||||
|
HAL_SAI_StateTypeDef HAL_SAI_GetState(const SAI_HandleTypeDef *hsai);
|
||||||
|
uint32_t HAL_SAI_GetError(const SAI_HandleTypeDef *hsai);
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/** @addtogroup SAI_Private_Macros
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
#define IS_SAI_BLOCK_SYNCEXT(STATE) (((STATE) == SAI_SYNCEXT_DISABLE) ||\
|
||||||
|
((STATE) == SAI_SYNCEXT_OUTBLOCKA_ENABLE) ||\
|
||||||
|
((STATE) == SAI_SYNCEXT_OUTBLOCKB_ENABLE))
|
||||||
|
|
||||||
|
#define IS_SAI_SUPPORTED_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_I2S_STANDARD) ||\
|
||||||
|
((PROTOCOL) == SAI_I2S_MSBJUSTIFIED) ||\
|
||||||
|
((PROTOCOL) == SAI_I2S_LSBJUSTIFIED) ||\
|
||||||
|
((PROTOCOL) == SAI_PCM_LONG) ||\
|
||||||
|
((PROTOCOL) == SAI_PCM_SHORT))
|
||||||
|
|
||||||
|
#define IS_SAI_PROTOCOL_DATASIZE(DATASIZE) (((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BIT) ||\
|
||||||
|
((DATASIZE) == SAI_PROTOCOL_DATASIZE_16BITEXTENDED) ||\
|
||||||
|
((DATASIZE) == SAI_PROTOCOL_DATASIZE_24BIT) ||\
|
||||||
|
((DATASIZE) == SAI_PROTOCOL_DATASIZE_32BIT))
|
||||||
|
|
||||||
|
#define IS_SAI_AUDIO_FREQUENCY(AUDIO) (((AUDIO) == SAI_AUDIO_FREQUENCY_192K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_96K) || \
|
||||||
|
((AUDIO) == SAI_AUDIO_FREQUENCY_48K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_44K) || \
|
||||||
|
((AUDIO) == SAI_AUDIO_FREQUENCY_32K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_22K) || \
|
||||||
|
((AUDIO) == SAI_AUDIO_FREQUENCY_16K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_11K) || \
|
||||||
|
((AUDIO) == SAI_AUDIO_FREQUENCY_8K) || ((AUDIO) == SAI_AUDIO_FREQUENCY_MCKDIV))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_MODE(MODE) (((MODE) == SAI_MODEMASTER_TX) || \
|
||||||
|
((MODE) == SAI_MODEMASTER_RX) || \
|
||||||
|
((MODE) == SAI_MODESLAVE_TX) || \
|
||||||
|
((MODE) == SAI_MODESLAVE_RX))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_PROTOCOL(PROTOCOL) (((PROTOCOL) == SAI_FREE_PROTOCOL) || \
|
||||||
|
((PROTOCOL) == SAI_AC97_PROTOCOL) || \
|
||||||
|
((PROTOCOL) == SAI_SPDIF_PROTOCOL))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_DATASIZE(DATASIZE) (((DATASIZE) == SAI_DATASIZE_8) || \
|
||||||
|
((DATASIZE) == SAI_DATASIZE_10) || \
|
||||||
|
((DATASIZE) == SAI_DATASIZE_16) || \
|
||||||
|
((DATASIZE) == SAI_DATASIZE_20) || \
|
||||||
|
((DATASIZE) == SAI_DATASIZE_24) || \
|
||||||
|
((DATASIZE) == SAI_DATASIZE_32))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FIRST_BIT(BIT) (((BIT) == SAI_FIRSTBIT_MSB) || \
|
||||||
|
((BIT) == SAI_FIRSTBIT_LSB))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_CLOCK_STROBING(CLOCK) (((CLOCK) == SAI_CLOCKSTROBING_FALLINGEDGE) || \
|
||||||
|
((CLOCK) == SAI_CLOCKSTROBING_RISINGEDGE))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_SYNCHRO(SYNCHRO) (((SYNCHRO) == SAI_ASYNCHRONOUS) || \
|
||||||
|
((SYNCHRO) == SAI_SYNCHRONOUS) || \
|
||||||
|
((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI1) || \
|
||||||
|
((SYNCHRO) == SAI_SYNCHRONOUS_EXT_SAI2))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_OUTPUT_DRIVE(DRIVE) (((DRIVE) == SAI_OUTPUTDRIVE_DISABLE) || \
|
||||||
|
((DRIVE) == SAI_OUTPUTDRIVE_ENABLE))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_NODIVIDER(NODIVIDER) (((NODIVIDER) == SAI_MASTERDIVIDER_ENABLE) || \
|
||||||
|
((NODIVIDER) == SAI_MASTERDIVIDER_DISABLE))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_MUTE_COUNTER(COUNTER) ((COUNTER) <= 63)
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_MUTE_VALUE(VALUE) (((VALUE) == SAI_ZERO_VALUE) || \
|
||||||
|
((VALUE) == SAI_LAST_SENT_VALUE))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_COMPANDING_MODE(MODE) (((MODE) == SAI_NOCOMPANDING) || \
|
||||||
|
((MODE) == SAI_ULAW_1CPL_COMPANDING) || \
|
||||||
|
((MODE) == SAI_ALAW_1CPL_COMPANDING) || \
|
||||||
|
((MODE) == SAI_ULAW_2CPL_COMPANDING) || \
|
||||||
|
((MODE) == SAI_ALAW_2CPL_COMPANDING))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FIFO_THRESHOLD(THRESHOLD) (((THRESHOLD) == SAI_FIFOTHRESHOLD_EMPTY) || \
|
||||||
|
((THRESHOLD) == SAI_FIFOTHRESHOLD_1QF) || \
|
||||||
|
((THRESHOLD) == SAI_FIFOTHRESHOLD_HF) || \
|
||||||
|
((THRESHOLD) == SAI_FIFOTHRESHOLD_3QF) || \
|
||||||
|
((THRESHOLD) == SAI_FIFOTHRESHOLD_FULL))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_TRISTATE_MANAGEMENT(STATE) (((STATE) == SAI_OUTPUT_NOTRELEASED) ||\
|
||||||
|
((STATE) == SAI_OUTPUT_RELEASED))
|
||||||
|
|
||||||
|
#define IS_SAI_MONO_STEREO_MODE(MODE) (((MODE) == SAI_MONOMODE) ||\
|
||||||
|
((MODE) == SAI_STEREOMODE))
|
||||||
|
|
||||||
|
#define IS_SAI_SLOT_ACTIVE(ACTIVE) ((ACTIVE) <= SAI_SLOTACTIVE_ALL)
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_SLOT_NUMBER(NUMBER) ((1 <= (NUMBER)) && ((NUMBER) <= 16))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_SLOT_SIZE(SIZE) (((SIZE) == SAI_SLOTSIZE_DATASIZE) || \
|
||||||
|
((SIZE) == SAI_SLOTSIZE_16B) || \
|
||||||
|
((SIZE) == SAI_SLOTSIZE_32B))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FIRSTBIT_OFFSET(OFFSET) ((OFFSET) <= 24)
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FS_OFFSET(OFFSET) (((OFFSET) == SAI_FS_FIRSTBIT) || \
|
||||||
|
((OFFSET) == SAI_FS_BEFOREFIRSTBIT))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FS_POLARITY(POLARITY) (((POLARITY) == SAI_FS_ACTIVE_LOW) || \
|
||||||
|
((POLARITY) == SAI_FS_ACTIVE_HIGH))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FS_DEFINITION(DEFINITION) (((DEFINITION) == SAI_FS_STARTFRAME) || \
|
||||||
|
((DEFINITION) == SAI_FS_CHANNEL_IDENTIFICATION))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_MASTER_DIVIDER(DIVIDER) ((DIVIDER) <= 15U)
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_FRAME_LENGTH(LENGTH) ((8 <= (LENGTH)) && ((LENGTH) <= 256))
|
||||||
|
|
||||||
|
#define IS_SAI_BLOCK_ACTIVE_FRAME(LENGTH) ((1 <= (LENGTH)) && ((LENGTH) <= 128))
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
/** @defgroup SAI_Private_Functions SAI Private Functions
|
||||||
|
* @{
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
/**
|
||||||
|
* @}
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifdef __cplusplus
|
||||||
|
}
|
||||||
|
#endif
|
||||||
|
|
||||||
|
#endif /* __STM32F7xx_HAL_SAI_H */
|
||||||
|
|
||||||
@ -0,0 +1,36 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f7xx_hal_sai_ex.h
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Header file of SAI Extension HAL module.
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Define to prevent recursive inclusion -------------------------------------*/
|
||||||
|
#ifndef __STM32F7xx_HAL_SAI_EX_H
|
||||||
|
#define __STM32F7xx_HAL_SAI_EX_H
|
||||||
|
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
/* Exported types ------------------------------------------------------------*/
|
||||||
|
/* Exported constants --------------------------------------------------------*/
|
||||||
|
/* Exported functions --------------------------------------------------------*/
|
||||||
|
/* Extended features functions ************************************************/
|
||||||
|
/* Private types -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private constants ---------------------------------------------------------*/
|
||||||
|
/* Private macros ------------------------------------------------------------*/
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
#endif /* __STM32F7xx_HAL_SAI_EX_H */
|
||||||
|
|
||||||
2624
Versuch5/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c
Normal file
2624
Versuch5/Drivers/STM32F7xx_HAL_Driver/Src/stm32f7xx_hal_sai.c
Normal file
File diff suppressed because it is too large
Load Diff
@ -0,0 +1,32 @@
|
|||||||
|
/**
|
||||||
|
******************************************************************************
|
||||||
|
* @file stm32f7xx_hal_sai_ex.c
|
||||||
|
* @author MCD Application Team
|
||||||
|
* @brief Empty file; This file is no longer used to set synchronization and
|
||||||
|
* to get SAI block frequency. Its content is now moved to common files
|
||||||
|
* (stm32f7xx_hal_sai.c/.h) as there's no device's dependency within F7
|
||||||
|
* family. It's just kept for compatibility reasons.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
* @attention
|
||||||
|
*
|
||||||
|
* Copyright (c) 2017 STMicroelectronics.
|
||||||
|
* All rights reserved.
|
||||||
|
*
|
||||||
|
* This software is licensed under terms that can be found in the LICENSE file
|
||||||
|
* in the root directory of this software component.
|
||||||
|
* If no LICENSE file comes with this software, it is provided AS-IS.
|
||||||
|
*
|
||||||
|
******************************************************************************
|
||||||
|
*/
|
||||||
|
|
||||||
|
/* Includes ------------------------------------------------------------------*/
|
||||||
|
#include "stm32f7xx_hal.h"
|
||||||
|
/* Private typedef -----------------------------------------------------------*/
|
||||||
|
/* Private define ------------------------------------------------------------*/
|
||||||
|
/* Private macro -------------------------------------------------------------*/
|
||||||
|
/* Private variables ---------------------------------------------------------*/
|
||||||
|
/* Private function prototypes -----------------------------------------------*/
|
||||||
|
/* Private functions ---------------------------------------------------------*/
|
||||||
|
|
||||||
|
|
||||||
@ -5,6 +5,18 @@ CAD.provider=
|
|||||||
CORTEX_M7.CPU_ICache=Disabled
|
CORTEX_M7.CPU_ICache=Disabled
|
||||||
CORTEX_M7.IPParameters=PREFETCH_ENABLE,CPU_ICache
|
CORTEX_M7.IPParameters=PREFETCH_ENABLE,CPU_ICache
|
||||||
CORTEX_M7.PREFETCH_ENABLE=0
|
CORTEX_M7.PREFETCH_ENABLE=0
|
||||||
|
Dma.Request0=SAI2_A
|
||||||
|
Dma.RequestsNb=1
|
||||||
|
Dma.SAI2_A.0.Direction=DMA_MEMORY_TO_PERIPH
|
||||||
|
Dma.SAI2_A.0.FIFOMode=DMA_FIFOMODE_DISABLE
|
||||||
|
Dma.SAI2_A.0.Instance=DMA2_Stream4
|
||||||
|
Dma.SAI2_A.0.MemDataAlignment=DMA_MDATAALIGN_HALFWORD
|
||||||
|
Dma.SAI2_A.0.MemInc=DMA_MINC_ENABLE
|
||||||
|
Dma.SAI2_A.0.Mode=DMA_CIRCULAR
|
||||||
|
Dma.SAI2_A.0.PeriphDataAlignment=DMA_PDATAALIGN_HALFWORD
|
||||||
|
Dma.SAI2_A.0.PeriphInc=DMA_PINC_DISABLE
|
||||||
|
Dma.SAI2_A.0.Priority=DMA_PRIORITY_LOW
|
||||||
|
Dma.SAI2_A.0.RequestParameters=Instance,Direction,PeriphInc,MemInc,PeriphDataAlignment,MemDataAlignment,Mode,Priority,FIFOMode
|
||||||
FREERTOS.IPParameters=Tasks01,configTOTAL_HEAP_SIZE,configGENERATE_RUN_TIME_STATS,configUSE_TRACE_FACILITY,configUSE_NEWLIB_REENTRANT
|
FREERTOS.IPParameters=Tasks01,configTOTAL_HEAP_SIZE,configGENERATE_RUN_TIME_STATS,configUSE_TRACE_FACILITY,configUSE_NEWLIB_REENTRANT
|
||||||
FREERTOS.Tasks01=defaultTask,0,256,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
|
FREERTOS.Tasks01=defaultTask,0,256,StartDefaultTask,Default,NULL,Dynamic,NULL,NULL
|
||||||
FREERTOS.configGENERATE_RUN_TIME_STATS=1
|
FREERTOS.configGENERATE_RUN_TIME_STATS=1
|
||||||
@ -13,6 +25,8 @@ FREERTOS.configUSE_NEWLIB_REENTRANT=1
|
|||||||
FREERTOS.configUSE_TRACE_FACILITY=1
|
FREERTOS.configUSE_TRACE_FACILITY=1
|
||||||
File.Version=6
|
File.Version=6
|
||||||
GPIO.groupedBy=Group By Peripherals
|
GPIO.groupedBy=Group By Peripherals
|
||||||
|
I2C1.IPParameters=Timing
|
||||||
|
I2C1.Timing=0x20404768
|
||||||
I2C3.I2C_Speed_Mode=I2C_Fast
|
I2C3.I2C_Speed_Mode=I2C_Fast
|
||||||
I2C3.IPParameters=Timing,I2C_Speed_Mode
|
I2C3.IPParameters=Timing,I2C_Speed_Mode
|
||||||
I2C3.Timing=0x6000030D
|
I2C3.Timing=0x6000030D
|
||||||
@ -20,17 +34,20 @@ KeepUserPlacement=false
|
|||||||
Mcu.CPN=STM32F723IEK6
|
Mcu.CPN=STM32F723IEK6
|
||||||
Mcu.Family=STM32F7
|
Mcu.Family=STM32F7
|
||||||
Mcu.IP0=CORTEX_M7
|
Mcu.IP0=CORTEX_M7
|
||||||
Mcu.IP1=FATFS
|
Mcu.IP1=DMA
|
||||||
Mcu.IP10=USB_OTG_FS
|
Mcu.IP10=SYS
|
||||||
Mcu.IP2=FMC
|
Mcu.IP11=USART6
|
||||||
Mcu.IP3=FREERTOS
|
Mcu.IP12=USB_HOST
|
||||||
Mcu.IP4=I2C3
|
Mcu.IP13=USB_OTG_FS
|
||||||
Mcu.IP5=NVIC
|
Mcu.IP2=FATFS
|
||||||
Mcu.IP6=RCC
|
Mcu.IP3=FMC
|
||||||
Mcu.IP7=SYS
|
Mcu.IP4=FREERTOS
|
||||||
Mcu.IP8=USART6
|
Mcu.IP5=I2C1
|
||||||
Mcu.IP9=USB_HOST
|
Mcu.IP6=I2C3
|
||||||
Mcu.IPNb=11
|
Mcu.IP7=NVIC
|
||||||
|
Mcu.IP8=RCC
|
||||||
|
Mcu.IP9=SAI2
|
||||||
|
Mcu.IPNb=14
|
||||||
Mcu.Name=STM32F723I(C-E)Kx
|
Mcu.Name=STM32F723I(C-E)Kx
|
||||||
Mcu.Package=UFBGA176
|
Mcu.Package=UFBGA176
|
||||||
Mcu.Pin0=PE3
|
Mcu.Pin0=PE3
|
||||||
@ -178,6 +195,7 @@ Mcu.UserName=STM32F723IEKx
|
|||||||
MxCube.Version=6.15.0
|
MxCube.Version=6.15.0
|
||||||
MxDb.Version=DB.6.0.150
|
MxDb.Version=DB.6.0.150
|
||||||
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
NVIC.BusFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
||||||
|
NVIC.DMA2_Stream4_IRQn=true\:5\:0\:false\:false\:true\:true\:false\:true\:true
|
||||||
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
NVIC.DebugMonitor_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
||||||
NVIC.ForceEnableDMAVector=true
|
NVIC.ForceEnableDMAVector=true
|
||||||
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
NVIC.HardFault_IRQn=true\:0\:0\:false\:false\:true\:false\:true\:false\:false
|
||||||
@ -306,10 +324,12 @@ PB7.Signal=FMC_NL
|
|||||||
PB8.GPIOParameters=GPIO_Label
|
PB8.GPIOParameters=GPIO_Label
|
||||||
PB8.GPIO_Label=SAI2_I2C1_SCL [WM8994ECS/R_SCLK]
|
PB8.GPIO_Label=SAI2_I2C1_SCL [WM8994ECS/R_SCLK]
|
||||||
PB8.Locked=true
|
PB8.Locked=true
|
||||||
|
PB8.Mode=I2C
|
||||||
PB8.Signal=I2C1_SCL
|
PB8.Signal=I2C1_SCL
|
||||||
PB9.GPIOParameters=GPIO_Label
|
PB9.GPIOParameters=GPIO_Label
|
||||||
PB9.GPIO_Label=SAI2_I2C1_SDA [WM8994ECS_SDA]
|
PB9.GPIO_Label=SAI2_I2C1_SDA [WM8994ECS_SDA]
|
||||||
PB9.Locked=true
|
PB9.Locked=true
|
||||||
|
PB9.Mode=I2C
|
||||||
PB9.Signal=I2C1_SDA
|
PB9.Signal=I2C1_SDA
|
||||||
PC0.GPIOParameters=GPIO_Label
|
PC0.GPIOParameters=GPIO_Label
|
||||||
PC0.GPIO_Label=ARD_A4
|
PC0.GPIO_Label=ARD_A4
|
||||||
@ -698,18 +718,22 @@ PI3.Signal=GPIO_Output
|
|||||||
PI4.GPIOParameters=GPIO_Label
|
PI4.GPIOParameters=GPIO_Label
|
||||||
PI4.GPIO_Label=SAI2_MCLK_A [WM8994ECS_MCLK1]
|
PI4.GPIO_Label=SAI2_MCLK_A [WM8994ECS_MCLK1]
|
||||||
PI4.Locked=true
|
PI4.Locked=true
|
||||||
|
PI4.Mode=SAI_A_MasterWithClock
|
||||||
PI4.Signal=SAI2_MCLK_A
|
PI4.Signal=SAI2_MCLK_A
|
||||||
PI5.GPIOParameters=GPIO_Label
|
PI5.GPIOParameters=GPIO_Label
|
||||||
PI5.GPIO_Label=SAI2_SCK_A [WM8994ECS_BCLK1]
|
PI5.GPIO_Label=SAI2_SCK_A [WM8994ECS_BCLK1]
|
||||||
PI5.Locked=true
|
PI5.Locked=true
|
||||||
|
PI5.Mode=SAI_A_MasterWithClock
|
||||||
PI5.Signal=SAI2_SCK_A
|
PI5.Signal=SAI2_SCK_A
|
||||||
PI6.GPIOParameters=GPIO_Label
|
PI6.GPIOParameters=GPIO_Label
|
||||||
PI6.GPIO_Label=SAI2_SD_A [WM8994ECS_DACDAT1]
|
PI6.GPIO_Label=SAI2_SD_A [WM8994ECS_DACDAT1]
|
||||||
PI6.Locked=true
|
PI6.Locked=true
|
||||||
|
PI6.Mode=SAI_A_MasterWithClock
|
||||||
PI6.Signal=SAI2_SD_A
|
PI6.Signal=SAI2_SD_A
|
||||||
PI7.GPIOParameters=GPIO_Label
|
PI7.GPIOParameters=GPIO_Label
|
||||||
PI7.GPIO_Label=SAI2_FS_A [WM8994ECS_LRCLK1]
|
PI7.GPIO_Label=SAI2_FS_A [WM8994ECS_LRCLK1]
|
||||||
PI7.Locked=true
|
PI7.Locked=true
|
||||||
|
PI7.Mode=SAI_A_MasterWithClock
|
||||||
PI7.Signal=SAI2_FS_A
|
PI7.Signal=SAI2_FS_A
|
||||||
PI9.GPIOParameters=GPIO_Label
|
PI9.GPIOParameters=GPIO_Label
|
||||||
PI9.GPIO_Label=CTP_INT
|
PI9.GPIO_Label=CTP_INT
|
||||||
@ -738,8 +762,8 @@ ProjectManager.MainLocation=Core/Src
|
|||||||
ProjectManager.NoMain=false
|
ProjectManager.NoMain=false
|
||||||
ProjectManager.PreviousToolchain=
|
ProjectManager.PreviousToolchain=
|
||||||
ProjectManager.ProjectBuild=false
|
ProjectManager.ProjectBuild=false
|
||||||
ProjectManager.ProjectFileName=Versuch4.ioc
|
ProjectManager.ProjectFileName=Versuch5.ioc
|
||||||
ProjectManager.ProjectName=Versuch4
|
ProjectManager.ProjectName=Versuch5
|
||||||
ProjectManager.ProjectStructure=
|
ProjectManager.ProjectStructure=
|
||||||
ProjectManager.RegisterCallBack=
|
ProjectManager.RegisterCallBack=
|
||||||
ProjectManager.StackSize=0x400
|
ProjectManager.StackSize=0x400
|
||||||
@ -748,7 +772,7 @@ ProjectManager.ToolChainLocation=
|
|||||||
ProjectManager.UAScriptAfterPath=
|
ProjectManager.UAScriptAfterPath=
|
||||||
ProjectManager.UAScriptBeforePath=
|
ProjectManager.UAScriptBeforePath=
|
||||||
ProjectManager.UnderRoot=true
|
ProjectManager.UnderRoot=true
|
||||||
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_USART6_UART_Init-USART6-false-HAL-true,4-MX_FMC_Init-FMC-false-HAL-true,5-MX_I2C3_Init-I2C3-false-HAL-true,6-MX_FATFS_Init-FATFS-false-HAL-false,7-MX_USB_HOST_Init-USB_HOST-false-HAL-false,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
ProjectManager.functionlistsort=1-SystemClock_Config-RCC-false-HAL-false,2-MX_GPIO_Init-GPIO-false-HAL-true,3-MX_DMA_Init-DMA-false-HAL-true,4-MX_USART6_UART_Init-USART6-false-HAL-true,5-MX_FMC_Init-FMC-false-HAL-true,6-MX_I2C3_Init-I2C3-false-HAL-true,7-MX_FATFS_Init-FATFS-false-HAL-false,8-MX_USB_HOST_Init-USB_HOST-false-HAL-false,9-MX_I2C1_Init-I2C1-false-HAL-true,10-MX_SAI2_Init-SAI2-false-HAL-true,0-MX_CORTEX_M7_Init-CORTEX_M7-false-HAL-true
|
||||||
RCC.AHBFreq_Value=216000000
|
RCC.AHBFreq_Value=216000000
|
||||||
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
RCC.APB1CLKDivider=RCC_HCLK_DIV4
|
||||||
RCC.APB1Freq_Value=54000000
|
RCC.APB1Freq_Value=54000000
|
||||||
@ -802,6 +826,14 @@ RCC.VCOI2SOutputFreq_Value=192000000
|
|||||||
RCC.VCOInputFreq_Value=1000000
|
RCC.VCOInputFreq_Value=1000000
|
||||||
RCC.VCOOutputFreq_Value=432000000
|
RCC.VCOOutputFreq_Value=432000000
|
||||||
RCC.VCOSAIOutputFreq_Value=192000000
|
RCC.VCOSAIOutputFreq_Value=192000000
|
||||||
|
SAI2.DataSize-SAI_A_MasterWithClock=SAI_DATASIZE_16
|
||||||
|
SAI2.ErrorAudioFreq-SAI_A_MasterWithClock=-2.34 %
|
||||||
|
SAI2.FrameLength-SAI_A_MasterWithClock=16
|
||||||
|
SAI2.IPParameters=Instance-SAI_A_MasterWithClock,VirtualMode-SAI_A_MasterWithClock,MClockEnable-SAI_A_MasterWithClock,RealAudioFreq-SAI_A_MasterWithClock,ErrorAudioFreq-SAI_A_MasterWithClock,FrameLength-SAI_A_MasterWithClock,DataSize-SAI_A_MasterWithClock
|
||||||
|
SAI2.Instance-SAI_A_MasterWithClock=SAI$Index_Block_A
|
||||||
|
SAI2.MClockEnable-SAI_A_MasterWithClock=SAI_MASTERCLOCK_ENABLE
|
||||||
|
SAI2.RealAudioFreq-SAI_A_MasterWithClock=187.5 KHz
|
||||||
|
SAI2.VirtualMode-SAI_A_MasterWithClock=VM_MASTER
|
||||||
SH.ADCx_IN10.0=ADC2_IN10
|
SH.ADCx_IN10.0=ADC2_IN10
|
||||||
SH.ADCx_IN10.ConfNb=1
|
SH.ADCx_IN10.ConfNb=1
|
||||||
SH.ADCx_IN11.0=ADC2_IN11
|
SH.ADCx_IN11.0=ADC2_IN11
|
||||||
|
|||||||
Loading…
x
Reference in New Issue
Block a user