Versuch3.elf: file format elf32-littlearm Sections: Idx Name Size VMA LMA File off Algn 0 .isr_vector 000001e0 08000000 08000000 00001000 2**0 CONTENTS, ALLOC, LOAD, READONLY, DATA 1 .text 00007888 080001e0 080001e0 000011e0 2**4 CONTENTS, ALLOC, LOAD, READONLY, CODE 2 .rodata 00001bb8 08007a68 08007a68 00008a68 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 3 .ARM.extab 00000000 08009620 08009620 0000b074 2**0 CONTENTS, READONLY 4 .ARM 00000008 08009620 08009620 0000a620 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 5 .preinit_array 00000000 08009628 08009628 0000b074 2**0 CONTENTS, ALLOC, LOAD, DATA 6 .init_array 00000004 08009628 08009628 0000a628 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 7 .fini_array 00000004 0800962c 0800962c 0000a62c 2**2 CONTENTS, ALLOC, LOAD, READONLY, DATA 8 .data 00000074 20000000 08009630 0000b000 2**2 CONTENTS, ALLOC, LOAD, DATA 9 .bss 0000892c 20000074 080096a4 0000b074 2**2 ALLOC 10 ._user_heap_stack 00000600 200089a0 080096a4 0000b9a0 2**0 ALLOC 11 .ARM.attributes 00000030 00000000 00000000 0000b074 2**0 CONTENTS, READONLY 12 .debug_info 0001d2df 00000000 00000000 0000b0a4 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 13 .debug_abbrev 00003f0f 00000000 00000000 00028383 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 14 .debug_aranges 00001940 00000000 00000000 0002c298 2**3 CONTENTS, READONLY, DEBUGGING, OCTETS 15 .debug_rnglists 0000138f 00000000 00000000 0002dbd8 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 16 .debug_macro 0002770a 00000000 00000000 0002ef67 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 17 .debug_line 0001c611 00000000 00000000 00056671 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 18 .debug_str 000ee9a4 00000000 00000000 00072c82 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS 19 .comment 00000043 00000000 00000000 00161626 2**0 CONTENTS, READONLY 20 .debug_frame 000071fc 00000000 00000000 0016166c 2**2 CONTENTS, READONLY, DEBUGGING, OCTETS 21 .debug_line_str 0000007e 00000000 00000000 00168868 2**0 CONTENTS, READONLY, DEBUGGING, OCTETS Disassembly of section .text: 080001e0 <__do_global_dtors_aux>: 80001e0: b510 push {r4, lr} 80001e2: 4c05 ldr r4, [pc, #20] @ (80001f8 <__do_global_dtors_aux+0x18>) 80001e4: 7823 ldrb r3, [r4, #0] 80001e6: b933 cbnz r3, 80001f6 <__do_global_dtors_aux+0x16> 80001e8: 4b04 ldr r3, [pc, #16] @ (80001fc <__do_global_dtors_aux+0x1c>) 80001ea: b113 cbz r3, 80001f2 <__do_global_dtors_aux+0x12> 80001ec: 4804 ldr r0, [pc, #16] @ (8000200 <__do_global_dtors_aux+0x20>) 80001ee: f3af 8000 nop.w 80001f2: 2301 movs r3, #1 80001f4: 7023 strb r3, [r4, #0] 80001f6: bd10 pop {r4, pc} 80001f8: 20000074 .word 0x20000074 80001fc: 00000000 .word 0x00000000 8000200: 08007a50 .word 0x08007a50 08000204 : 8000204: b508 push {r3, lr} 8000206: 4b03 ldr r3, [pc, #12] @ (8000214 ) 8000208: b11b cbz r3, 8000212 800020a: 4903 ldr r1, [pc, #12] @ (8000218 ) 800020c: 4803 ldr r0, [pc, #12] @ (800021c ) 800020e: f3af 8000 nop.w 8000212: bd08 pop {r3, pc} 8000214: 00000000 .word 0x00000000 8000218: 20000078 .word 0x20000078 800021c: 08007a50 .word 0x08007a50 08000220 : 8000220: 4603 mov r3, r0 8000222: f813 2b01 ldrb.w r2, [r3], #1 8000226: 2a00 cmp r2, #0 8000228: d1fb bne.n 8000222 800022a: 1a18 subs r0, r3, r0 800022c: 3801 subs r0, #1 800022e: 4770 bx lr 08000230 : 8000230: f001 01ff and.w r1, r1, #255 @ 0xff 8000234: 2a10 cmp r2, #16 8000236: db2b blt.n 8000290 8000238: f010 0f07 tst.w r0, #7 800023c: d008 beq.n 8000250 800023e: f810 3b01 ldrb.w r3, [r0], #1 8000242: 3a01 subs r2, #1 8000244: 428b cmp r3, r1 8000246: d02d beq.n 80002a4 8000248: f010 0f07 tst.w r0, #7 800024c: b342 cbz r2, 80002a0 800024e: d1f6 bne.n 800023e 8000250: b4f0 push {r4, r5, r6, r7} 8000252: ea41 2101 orr.w r1, r1, r1, lsl #8 8000256: ea41 4101 orr.w r1, r1, r1, lsl #16 800025a: f022 0407 bic.w r4, r2, #7 800025e: f07f 0700 mvns.w r7, #0 8000262: 2300 movs r3, #0 8000264: e8f0 5602 ldrd r5, r6, [r0], #8 8000268: 3c08 subs r4, #8 800026a: ea85 0501 eor.w r5, r5, r1 800026e: ea86 0601 eor.w r6, r6, r1 8000272: fa85 f547 uadd8 r5, r5, r7 8000276: faa3 f587 sel r5, r3, r7 800027a: fa86 f647 uadd8 r6, r6, r7 800027e: faa5 f687 sel r6, r5, r7 8000282: b98e cbnz r6, 80002a8 8000284: d1ee bne.n 8000264 8000286: bcf0 pop {r4, r5, r6, r7} 8000288: f001 01ff and.w r1, r1, #255 @ 0xff 800028c: f002 0207 and.w r2, r2, #7 8000290: b132 cbz r2, 80002a0 8000292: f810 3b01 ldrb.w r3, [r0], #1 8000296: 3a01 subs r2, #1 8000298: ea83 0301 eor.w r3, r3, r1 800029c: b113 cbz r3, 80002a4 800029e: d1f8 bne.n 8000292 80002a0: 2000 movs r0, #0 80002a2: 4770 bx lr 80002a4: 3801 subs r0, #1 80002a6: 4770 bx lr 80002a8: 2d00 cmp r5, #0 80002aa: bf06 itte eq 80002ac: 4635 moveq r5, r6 80002ae: 3803 subeq r0, #3 80002b0: 3807 subne r0, #7 80002b2: f015 0f01 tst.w r5, #1 80002b6: d107 bne.n 80002c8 80002b8: 3001 adds r0, #1 80002ba: f415 7f80 tst.w r5, #256 @ 0x100 80002be: bf02 ittt eq 80002c0: 3001 addeq r0, #1 80002c2: f415 3fc0 tsteq.w r5, #98304 @ 0x18000 80002c6: 3001 addeq r0, #1 80002c8: bcf0 pop {r4, r5, r6, r7} 80002ca: 3801 subs r0, #1 80002cc: 4770 bx lr 80002ce: bf00 nop 080002d0 <__aeabi_uldivmod>: 80002d0: b953 cbnz r3, 80002e8 <__aeabi_uldivmod+0x18> 80002d2: b94a cbnz r2, 80002e8 <__aeabi_uldivmod+0x18> 80002d4: 2900 cmp r1, #0 80002d6: bf08 it eq 80002d8: 2800 cmpeq r0, #0 80002da: bf1c itt ne 80002dc: f04f 31ff movne.w r1, #4294967295 @ 0xffffffff 80002e0: f04f 30ff movne.w r0, #4294967295 @ 0xffffffff 80002e4: f000 b988 b.w 80005f8 <__aeabi_idiv0> 80002e8: f1ad 0c08 sub.w ip, sp, #8 80002ec: e96d ce04 strd ip, lr, [sp, #-16]! 80002f0: f000 f806 bl 8000300 <__udivmoddi4> 80002f4: f8dd e004 ldr.w lr, [sp, #4] 80002f8: e9dd 2302 ldrd r2, r3, [sp, #8] 80002fc: b004 add sp, #16 80002fe: 4770 bx lr 08000300 <__udivmoddi4>: 8000300: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 8000304: 9d08 ldr r5, [sp, #32] 8000306: 468e mov lr, r1 8000308: 4604 mov r4, r0 800030a: 4688 mov r8, r1 800030c: 2b00 cmp r3, #0 800030e: d14a bne.n 80003a6 <__udivmoddi4+0xa6> 8000310: 428a cmp r2, r1 8000312: 4617 mov r7, r2 8000314: d962 bls.n 80003dc <__udivmoddi4+0xdc> 8000316: fab2 f682 clz r6, r2 800031a: b14e cbz r6, 8000330 <__udivmoddi4+0x30> 800031c: f1c6 0320 rsb r3, r6, #32 8000320: fa01 f806 lsl.w r8, r1, r6 8000324: fa20 f303 lsr.w r3, r0, r3 8000328: 40b7 lsls r7, r6 800032a: ea43 0808 orr.w r8, r3, r8 800032e: 40b4 lsls r4, r6 8000330: ea4f 4e17 mov.w lr, r7, lsr #16 8000334: fa1f fc87 uxth.w ip, r7 8000338: fbb8 f1fe udiv r1, r8, lr 800033c: 0c23 lsrs r3, r4, #16 800033e: fb0e 8811 mls r8, lr, r1, r8 8000342: ea43 4308 orr.w r3, r3, r8, lsl #16 8000346: fb01 f20c mul.w r2, r1, ip 800034a: 429a cmp r2, r3 800034c: d909 bls.n 8000362 <__udivmoddi4+0x62> 800034e: 18fb adds r3, r7, r3 8000350: f101 30ff add.w r0, r1, #4294967295 @ 0xffffffff 8000354: f080 80ea bcs.w 800052c <__udivmoddi4+0x22c> 8000358: 429a cmp r2, r3 800035a: f240 80e7 bls.w 800052c <__udivmoddi4+0x22c> 800035e: 3902 subs r1, #2 8000360: 443b add r3, r7 8000362: 1a9a subs r2, r3, r2 8000364: b2a3 uxth r3, r4 8000366: fbb2 f0fe udiv r0, r2, lr 800036a: fb0e 2210 mls r2, lr, r0, r2 800036e: ea43 4302 orr.w r3, r3, r2, lsl #16 8000372: fb00 fc0c mul.w ip, r0, ip 8000376: 459c cmp ip, r3 8000378: d909 bls.n 800038e <__udivmoddi4+0x8e> 800037a: 18fb adds r3, r7, r3 800037c: f100 32ff add.w r2, r0, #4294967295 @ 0xffffffff 8000380: f080 80d6 bcs.w 8000530 <__udivmoddi4+0x230> 8000384: 459c cmp ip, r3 8000386: f240 80d3 bls.w 8000530 <__udivmoddi4+0x230> 800038a: 443b add r3, r7 800038c: 3802 subs r0, #2 800038e: ea40 4001 orr.w r0, r0, r1, lsl #16 8000392: eba3 030c sub.w r3, r3, ip 8000396: 2100 movs r1, #0 8000398: b11d cbz r5, 80003a2 <__udivmoddi4+0xa2> 800039a: 40f3 lsrs r3, r6 800039c: 2200 movs r2, #0 800039e: e9c5 3200 strd r3, r2, [r5] 80003a2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80003a6: 428b cmp r3, r1 80003a8: d905 bls.n 80003b6 <__udivmoddi4+0xb6> 80003aa: b10d cbz r5, 80003b0 <__udivmoddi4+0xb0> 80003ac: e9c5 0100 strd r0, r1, [r5] 80003b0: 2100 movs r1, #0 80003b2: 4608 mov r0, r1 80003b4: e7f5 b.n 80003a2 <__udivmoddi4+0xa2> 80003b6: fab3 f183 clz r1, r3 80003ba: 2900 cmp r1, #0 80003bc: d146 bne.n 800044c <__udivmoddi4+0x14c> 80003be: 4573 cmp r3, lr 80003c0: d302 bcc.n 80003c8 <__udivmoddi4+0xc8> 80003c2: 4282 cmp r2, r0 80003c4: f200 8105 bhi.w 80005d2 <__udivmoddi4+0x2d2> 80003c8: 1a84 subs r4, r0, r2 80003ca: eb6e 0203 sbc.w r2, lr, r3 80003ce: 2001 movs r0, #1 80003d0: 4690 mov r8, r2 80003d2: 2d00 cmp r5, #0 80003d4: d0e5 beq.n 80003a2 <__udivmoddi4+0xa2> 80003d6: e9c5 4800 strd r4, r8, [r5] 80003da: e7e2 b.n 80003a2 <__udivmoddi4+0xa2> 80003dc: 2a00 cmp r2, #0 80003de: f000 8090 beq.w 8000502 <__udivmoddi4+0x202> 80003e2: fab2 f682 clz r6, r2 80003e6: 2e00 cmp r6, #0 80003e8: f040 80a4 bne.w 8000534 <__udivmoddi4+0x234> 80003ec: 1a8a subs r2, r1, r2 80003ee: 0c03 lsrs r3, r0, #16 80003f0: ea4f 4e17 mov.w lr, r7, lsr #16 80003f4: b280 uxth r0, r0 80003f6: b2bc uxth r4, r7 80003f8: 2101 movs r1, #1 80003fa: fbb2 fcfe udiv ip, r2, lr 80003fe: fb0e 221c mls r2, lr, ip, r2 8000402: ea43 4302 orr.w r3, r3, r2, lsl #16 8000406: fb04 f20c mul.w r2, r4, ip 800040a: 429a cmp r2, r3 800040c: d907 bls.n 800041e <__udivmoddi4+0x11e> 800040e: 18fb adds r3, r7, r3 8000410: f10c 38ff add.w r8, ip, #4294967295 @ 0xffffffff 8000414: d202 bcs.n 800041c <__udivmoddi4+0x11c> 8000416: 429a cmp r2, r3 8000418: f200 80e0 bhi.w 80005dc <__udivmoddi4+0x2dc> 800041c: 46c4 mov ip, r8 800041e: 1a9b subs r3, r3, r2 8000420: fbb3 f2fe udiv r2, r3, lr 8000424: fb0e 3312 mls r3, lr, r2, r3 8000428: ea40 4303 orr.w r3, r0, r3, lsl #16 800042c: fb02 f404 mul.w r4, r2, r4 8000430: 429c cmp r4, r3 8000432: d907 bls.n 8000444 <__udivmoddi4+0x144> 8000434: 18fb adds r3, r7, r3 8000436: f102 30ff add.w r0, r2, #4294967295 @ 0xffffffff 800043a: d202 bcs.n 8000442 <__udivmoddi4+0x142> 800043c: 429c cmp r4, r3 800043e: f200 80ca bhi.w 80005d6 <__udivmoddi4+0x2d6> 8000442: 4602 mov r2, r0 8000444: 1b1b subs r3, r3, r4 8000446: ea42 400c orr.w r0, r2, ip, lsl #16 800044a: e7a5 b.n 8000398 <__udivmoddi4+0x98> 800044c: f1c1 0620 rsb r6, r1, #32 8000450: 408b lsls r3, r1 8000452: fa22 f706 lsr.w r7, r2, r6 8000456: 431f orrs r7, r3 8000458: fa0e f401 lsl.w r4, lr, r1 800045c: fa20 f306 lsr.w r3, r0, r6 8000460: fa2e fe06 lsr.w lr, lr, r6 8000464: ea4f 4917 mov.w r9, r7, lsr #16 8000468: 4323 orrs r3, r4 800046a: fa00 f801 lsl.w r8, r0, r1 800046e: fa1f fc87 uxth.w ip, r7 8000472: fbbe f0f9 udiv r0, lr, r9 8000476: 0c1c lsrs r4, r3, #16 8000478: fb09 ee10 mls lr, r9, r0, lr 800047c: ea44 440e orr.w r4, r4, lr, lsl #16 8000480: fb00 fe0c mul.w lr, r0, ip 8000484: 45a6 cmp lr, r4 8000486: fa02 f201 lsl.w r2, r2, r1 800048a: d909 bls.n 80004a0 <__udivmoddi4+0x1a0> 800048c: 193c adds r4, r7, r4 800048e: f100 3aff add.w sl, r0, #4294967295 @ 0xffffffff 8000492: f080 809c bcs.w 80005ce <__udivmoddi4+0x2ce> 8000496: 45a6 cmp lr, r4 8000498: f240 8099 bls.w 80005ce <__udivmoddi4+0x2ce> 800049c: 3802 subs r0, #2 800049e: 443c add r4, r7 80004a0: eba4 040e sub.w r4, r4, lr 80004a4: fa1f fe83 uxth.w lr, r3 80004a8: fbb4 f3f9 udiv r3, r4, r9 80004ac: fb09 4413 mls r4, r9, r3, r4 80004b0: ea4e 4404 orr.w r4, lr, r4, lsl #16 80004b4: fb03 fc0c mul.w ip, r3, ip 80004b8: 45a4 cmp ip, r4 80004ba: d908 bls.n 80004ce <__udivmoddi4+0x1ce> 80004bc: 193c adds r4, r7, r4 80004be: f103 3eff add.w lr, r3, #4294967295 @ 0xffffffff 80004c2: f080 8082 bcs.w 80005ca <__udivmoddi4+0x2ca> 80004c6: 45a4 cmp ip, r4 80004c8: d97f bls.n 80005ca <__udivmoddi4+0x2ca> 80004ca: 3b02 subs r3, #2 80004cc: 443c add r4, r7 80004ce: ea43 4000 orr.w r0, r3, r0, lsl #16 80004d2: eba4 040c sub.w r4, r4, ip 80004d6: fba0 ec02 umull lr, ip, r0, r2 80004da: 4564 cmp r4, ip 80004dc: 4673 mov r3, lr 80004de: 46e1 mov r9, ip 80004e0: d362 bcc.n 80005a8 <__udivmoddi4+0x2a8> 80004e2: d05f beq.n 80005a4 <__udivmoddi4+0x2a4> 80004e4: b15d cbz r5, 80004fe <__udivmoddi4+0x1fe> 80004e6: ebb8 0203 subs.w r2, r8, r3 80004ea: eb64 0409 sbc.w r4, r4, r9 80004ee: fa04 f606 lsl.w r6, r4, r6 80004f2: fa22 f301 lsr.w r3, r2, r1 80004f6: 431e orrs r6, r3 80004f8: 40cc lsrs r4, r1 80004fa: e9c5 6400 strd r6, r4, [r5] 80004fe: 2100 movs r1, #0 8000500: e74f b.n 80003a2 <__udivmoddi4+0xa2> 8000502: fbb1 fcf2 udiv ip, r1, r2 8000506: 0c01 lsrs r1, r0, #16 8000508: ea41 410e orr.w r1, r1, lr, lsl #16 800050c: b280 uxth r0, r0 800050e: ea40 4201 orr.w r2, r0, r1, lsl #16 8000512: 463b mov r3, r7 8000514: 4638 mov r0, r7 8000516: 463c mov r4, r7 8000518: 46b8 mov r8, r7 800051a: 46be mov lr, r7 800051c: 2620 movs r6, #32 800051e: fbb1 f1f7 udiv r1, r1, r7 8000522: eba2 0208 sub.w r2, r2, r8 8000526: ea41 410c orr.w r1, r1, ip, lsl #16 800052a: e766 b.n 80003fa <__udivmoddi4+0xfa> 800052c: 4601 mov r1, r0 800052e: e718 b.n 8000362 <__udivmoddi4+0x62> 8000530: 4610 mov r0, r2 8000532: e72c b.n 800038e <__udivmoddi4+0x8e> 8000534: f1c6 0220 rsb r2, r6, #32 8000538: fa2e f302 lsr.w r3, lr, r2 800053c: 40b7 lsls r7, r6 800053e: 40b1 lsls r1, r6 8000540: fa20 f202 lsr.w r2, r0, r2 8000544: ea4f 4e17 mov.w lr, r7, lsr #16 8000548: 430a orrs r2, r1 800054a: fbb3 f8fe udiv r8, r3, lr 800054e: b2bc uxth r4, r7 8000550: fb0e 3318 mls r3, lr, r8, r3 8000554: 0c11 lsrs r1, r2, #16 8000556: ea41 4103 orr.w r1, r1, r3, lsl #16 800055a: fb08 f904 mul.w r9, r8, r4 800055e: 40b0 lsls r0, r6 8000560: 4589 cmp r9, r1 8000562: ea4f 4310 mov.w r3, r0, lsr #16 8000566: b280 uxth r0, r0 8000568: d93e bls.n 80005e8 <__udivmoddi4+0x2e8> 800056a: 1879 adds r1, r7, r1 800056c: f108 3cff add.w ip, r8, #4294967295 @ 0xffffffff 8000570: d201 bcs.n 8000576 <__udivmoddi4+0x276> 8000572: 4589 cmp r9, r1 8000574: d81f bhi.n 80005b6 <__udivmoddi4+0x2b6> 8000576: eba1 0109 sub.w r1, r1, r9 800057a: fbb1 f9fe udiv r9, r1, lr 800057e: fb09 f804 mul.w r8, r9, r4 8000582: fb0e 1119 mls r1, lr, r9, r1 8000586: b292 uxth r2, r2 8000588: ea42 4201 orr.w r2, r2, r1, lsl #16 800058c: 4542 cmp r2, r8 800058e: d229 bcs.n 80005e4 <__udivmoddi4+0x2e4> 8000590: 18ba adds r2, r7, r2 8000592: f109 31ff add.w r1, r9, #4294967295 @ 0xffffffff 8000596: d2c4 bcs.n 8000522 <__udivmoddi4+0x222> 8000598: 4542 cmp r2, r8 800059a: d2c2 bcs.n 8000522 <__udivmoddi4+0x222> 800059c: f1a9 0102 sub.w r1, r9, #2 80005a0: 443a add r2, r7 80005a2: e7be b.n 8000522 <__udivmoddi4+0x222> 80005a4: 45f0 cmp r8, lr 80005a6: d29d bcs.n 80004e4 <__udivmoddi4+0x1e4> 80005a8: ebbe 0302 subs.w r3, lr, r2 80005ac: eb6c 0c07 sbc.w ip, ip, r7 80005b0: 3801 subs r0, #1 80005b2: 46e1 mov r9, ip 80005b4: e796 b.n 80004e4 <__udivmoddi4+0x1e4> 80005b6: eba7 0909 sub.w r9, r7, r9 80005ba: 4449 add r1, r9 80005bc: f1a8 0c02 sub.w ip, r8, #2 80005c0: fbb1 f9fe udiv r9, r1, lr 80005c4: fb09 f804 mul.w r8, r9, r4 80005c8: e7db b.n 8000582 <__udivmoddi4+0x282> 80005ca: 4673 mov r3, lr 80005cc: e77f b.n 80004ce <__udivmoddi4+0x1ce> 80005ce: 4650 mov r0, sl 80005d0: e766 b.n 80004a0 <__udivmoddi4+0x1a0> 80005d2: 4608 mov r0, r1 80005d4: e6fd b.n 80003d2 <__udivmoddi4+0xd2> 80005d6: 443b add r3, r7 80005d8: 3a02 subs r2, #2 80005da: e733 b.n 8000444 <__udivmoddi4+0x144> 80005dc: f1ac 0c02 sub.w ip, ip, #2 80005e0: 443b add r3, r7 80005e2: e71c b.n 800041e <__udivmoddi4+0x11e> 80005e4: 4649 mov r1, r9 80005e6: e79c b.n 8000522 <__udivmoddi4+0x222> 80005e8: eba1 0109 sub.w r1, r1, r9 80005ec: 46c4 mov ip, r8 80005ee: fbb1 f9fe udiv r9, r1, lr 80005f2: fb09 f804 mul.w r8, r9, r4 80005f6: e7c4 b.n 8000582 <__udivmoddi4+0x282> 080005f8 <__aeabi_idiv0>: 80005f8: 4770 bx lr 80005fa: bf00 nop 080005fc : static char Display_LineBuffer[64]; // Buffer for printf // Display_Select: Called before any access to the display. // Return: 0: Error, do not access the display // 1: OK, access the display uint8_t Display_Select( void ) { 80005fc: b480 push {r7} 80005fe: af00 add r7, sp, #0 /* ToDo: Take mutex */ return 1; // OK 8000600: 2301 movs r3, #1 } 8000602: 4618 mov r0, r3 8000604: 46bd mov sp, r7 8000606: f85d 7b04 ldr.w r7, [sp], #4 800060a: 4770 bx lr 0800060c : // Display_Deselect: Called after any access to the display. void Display_Deselect( void ) { 800060c: b480 push {r7} 800060e: af00 add r7, sp, #0 /* ToDo: Give mutex */ } 8000610: bf00 nop 8000612: 46bd mov sp, r7 8000614: f85d 7b04 ldr.w r7, [sp], #4 8000618: 4770 bx lr 0800061a : } LCD_CONTROLLER_TypeDef; #define FMC_BANK2_BASE ((uint32_t)(0x60000000 | 0x04000000)) #define FMC_BANK2 ((LCD_CONTROLLER_TypeDef *) FMC_BANK2_BASE) void Display_WriteCommand( uint8_t Reg) { 800061a: b480 push {r7} 800061c: b083 sub sp, #12 800061e: af00 add r7, sp, #0 8000620: 4603 mov r3, r0 8000622: 71fb strb r3, [r7, #7] FMC_BANK2->REG = Reg; 8000624: f04f 43c8 mov.w r3, #1677721600 @ 0x64000000 8000628: 79fa ldrb r2, [r7, #7] 800062a: b292 uxth r2, r2 800062c: 801a strh r2, [r3, #0] \details Acts as a special kind of Data Memory Barrier. It completes when all explicit memory accesses before this instruction complete. */ __STATIC_FORCEINLINE void __DSB(void) { __ASM volatile ("dsb 0xF":::"memory"); 800062e: f3bf 8f4f dsb sy } 8000632: bf00 nop __DSB(); } 8000634: bf00 nop 8000636: 370c adds r7, #12 8000638: 46bd mov sp, r7 800063a: f85d 7b04 ldr.w r7, [sp], #4 800063e: 4770 bx lr 08000640 : void Display_WriteData( uint16_t Value ) { 8000640: b480 push {r7} 8000642: b083 sub sp, #12 8000644: af00 add r7, sp, #0 8000646: 4603 mov r3, r0 8000648: 80fb strh r3, [r7, #6] FMC_BANK2->RAM = Value; 800064a: f04f 42c8 mov.w r2, #1677721600 @ 0x64000000 800064e: 88fb ldrh r3, [r7, #6] 8000650: 8053 strh r3, [r2, #2] __ASM volatile ("dsb 0xF":::"memory"); 8000652: f3bf 8f4f dsb sy } 8000656: bf00 nop __DSB(); } 8000658: bf00 nop 800065a: 370c adds r7, #12 800065c: 46bd mov sp, r7 800065e: f85d 7b04 ldr.w r7, [sp], #4 8000662: 4770 bx lr 08000664 : static uint16_t Display_ReadData(void) { 8000664: b480 push {r7} 8000666: af00 add r7, sp, #0 return FMC_BANK2->RAM; 8000668: f04f 43c8 mov.w r3, #1677721600 @ 0x64000000 800066c: 885b ldrh r3, [r3, #2] 800066e: b29b uxth r3, r3 } 8000670: 4618 mov r0, r3 8000672: 46bd mov sp, r7 8000674: f85d 7b04 ldr.w r7, [sp], #4 8000678: 4770 bx lr 0800067a : uint8_t Display_ReadReg(uint8_t Command) { 800067a: b580 push {r7, lr} 800067c: b082 sub sp, #8 800067e: af00 add r7, sp, #0 8000680: 4603 mov r3, r0 8000682: 71fb strb r3, [r7, #7] Display_WriteCommand(Command); 8000684: 79fb ldrb r3, [r7, #7] 8000686: 4618 mov r0, r3 8000688: f7ff ffc7 bl 800061a Display_ReadData(); 800068c: f7ff ffea bl 8000664 return (Display_ReadData()); 8000690: f7ff ffe8 bl 8000664 8000694: 4603 mov r3, r0 8000696: b2db uxtb r3, r3 } 8000698: 4618 mov r0, r3 800069a: 3708 adds r7, #8 800069c: 46bd mov sp, r7 800069e: bd80 pop {r7, pc} 080006a0 : 0x11, 0, // Sleep out 0x35, 1, 0x00, // Tearing Effect 0xff }; static void Display_WriteCommandList(const uint8_t *addr) { 80006a0: b580 push {r7, lr} 80006a2: b084 sub sp, #16 80006a4: af00 add r7, sp, #0 80006a6: 6078 str r0, [r7, #4] uint8_t NumArgs; uint16_t Delay; while(*addr != 0xff) { 80006a8: e033 b.n 8000712 //printf("Cmd %x, ", *addr); Display_WriteCommand(*addr++); // Command 80006aa: 687b ldr r3, [r7, #4] 80006ac: 1c5a adds r2, r3, #1 80006ae: 607a str r2, [r7, #4] 80006b0: 781b ldrb r3, [r3, #0] 80006b2: 4618 mov r0, r3 80006b4: f7ff ffb1 bl 800061a NumArgs = *addr++; // Number of arguments 80006b8: 687b ldr r3, [r7, #4] 80006ba: 1c5a adds r2, r3, #1 80006bc: 607a str r2, [r7, #4] 80006be: 781b ldrb r3, [r3, #0] 80006c0: 73fb strb r3, [r7, #15] Delay = NumArgs & 0x80; // Bit 7: Delay flag 80006c2: 7bfb ldrb r3, [r7, #15] 80006c4: b29b uxth r3, r3 80006c6: f003 0380 and.w r3, r3, #128 @ 0x80 80006ca: 81bb strh r3, [r7, #12] NumArgs &= ~0x80; 80006cc: 7bfb ldrb r3, [r7, #15] 80006ce: f003 037f and.w r3, r3, #127 @ 0x7f 80006d2: 73fb strb r3, [r7, #15] //printf("Num: %d: ", NumArgs); while(NumArgs--) { 80006d4: e006 b.n 80006e4 //printf("%x ", *addr ); Display_WriteData(*addr++); 80006d6: 687b ldr r3, [r7, #4] 80006d8: 1c5a adds r2, r3, #1 80006da: 607a str r2, [r7, #4] 80006dc: 781b ldrb r3, [r3, #0] 80006de: 4618 mov r0, r3 80006e0: f7ff ffae bl 8000640 while(NumArgs--) { 80006e4: 7bfb ldrb r3, [r7, #15] 80006e6: 1e5a subs r2, r3, #1 80006e8: 73fa strb r2, [r7, #15] 80006ea: 2b00 cmp r3, #0 80006ec: d1f3 bne.n 80006d6 } //printf("\n"); // Delay after command if(Delay) { // If delay flag set 80006ee: 89bb ldrh r3, [r7, #12] 80006f0: 2b00 cmp r3, #0 80006f2: d00e beq.n 8000712 Delay = *addr++; // Delay time 80006f4: 687b ldr r3, [r7, #4] 80006f6: 1c5a adds r2, r3, #1 80006f8: 607a str r2, [r7, #4] 80006fa: 781b ldrb r3, [r3, #0] 80006fc: 81bb strh r3, [r7, #12] if( Delay == 255) { 80006fe: 89bb ldrh r3, [r7, #12] 8000700: 2bff cmp r3, #255 @ 0xff 8000702: d102 bne.n 800070a Delay = 500; 8000704: f44f 73fa mov.w r3, #500 @ 0x1f4 8000708: 81bb strh r3, [r7, #12] } //printf("Delay: %d\n", Delay ); HAL_Delay(Delay); 800070a: 89bb ldrh r3, [r7, #12] 800070c: 4618 mov r0, r3 800070e: f001 fd59 bl 80021c4 while(*addr != 0xff) { 8000712: 687b ldr r3, [r7, #4] 8000714: 781b ldrb r3, [r3, #0] 8000716: 2bff cmp r3, #255 @ 0xff 8000718: d1c7 bne.n 80006aa } } } 800071a: bf00 nop 800071c: bf00 nop 800071e: 3710 adds r7, #16 8000720: 46bd mov sp, r7 8000722: bd80 pop {r7, pc} 08000724 : static void Display_InitFmc( void ) { 8000724: b580 push {r7, lr} 8000726: b088 sub sp, #32 8000728: af00 add r7, sp, #0 FMC_NORSRAM_TimingTypeDef sram_timing={0}; 800072a: 1d3b adds r3, r7, #4 800072c: 2200 movs r2, #0 800072e: 601a str r2, [r3, #0] 8000730: 605a str r2, [r3, #4] 8000732: 609a str r2, [r3, #8] 8000734: 60da str r2, [r3, #12] 8000736: 611a str r2, [r3, #16] 8000738: 615a str r2, [r3, #20] 800073a: 619a str r2, [r3, #24] // PSRAM device configuration // Timing configuration derived from system clock (up to 216Mhz) for 108Mhz as PSRAM clock frequency sram_timing.AddressSetupTime = 9; 800073c: 2309 movs r3, #9 800073e: 607b str r3, [r7, #4] sram_timing.AddressHoldTime = 2; 8000740: 2302 movs r3, #2 8000742: 60bb str r3, [r7, #8] sram_timing.DataSetupTime = 6; 8000744: 2306 movs r3, #6 8000746: 60fb str r3, [r7, #12] sram_timing.BusTurnAroundDuration = 1; 8000748: 2301 movs r3, #1 800074a: 613b str r3, [r7, #16] sram_timing.CLKDivision = 2; 800074c: 2302 movs r3, #2 800074e: 617b str r3, [r7, #20] sram_timing.DataLatency = 2; 8000750: 2302 movs r3, #2 8000752: 61bb str r3, [r7, #24] sram_timing.AccessMode = FMC_ACCESS_MODE_A; 8000754: 2300 movs r3, #0 8000756: 61fb str r3, [r7, #28] // Initialize the FMC controller for LCD (FMC_NORSRAM_BANK2) HAL_SRAM_Init(&hsram2, &sram_timing, &sram_timing); 8000758: 1d3a adds r2, r7, #4 800075a: 1d3b adds r3, r7, #4 800075c: 4619 mov r1, r3 800075e: 4803 ldr r0, [pc, #12] @ (800076c ) 8000760: f003 fd0e bl 8004180 } 8000764: bf00 nop 8000766: 3720 adds r7, #32 8000768: 46bd mov sp, r7 800076a: bd80 pop {r7, pc} 800076c: 20000658 .word 0x20000658 08000770 : static void Display_SetOrientation(uint32_t orientation) { 8000770: b580 push {r7, lr} 8000772: b084 sub sp, #16 8000774: af00 add r7, sp, #0 8000776: 6078 str r0, [r7, #4] uint8_t NormalDisplayParam; if( orientation == LCD_ORIENTATION_LANDSCAPE ) { 8000778: 687b ldr r3, [r7, #4] 800077a: 2b01 cmp r3, #1 800077c: d102 bne.n 8000784 NormalDisplayParam = 0x00; 800077e: 2300 movs r3, #0 8000780: 73fb strb r3, [r7, #15] 8000782: e025 b.n 80007d0 } else if( orientation == LCD_ORIENTATION_LANDSCAPE_ROT180 ) { 8000784: 687b ldr r3, [r7, #4] 8000786: 2b02 cmp r3, #2 8000788: d120 bne.n 80007cc // Vertical Scrolling Definition Display_WriteCommand(0x33); 800078a: 2033 movs r0, #51 @ 0x33 800078c: f7ff ff45 bl 800061a // TFA describes the Top Fixed Area Display_WriteData(0x00); 8000790: 2000 movs r0, #0 8000792: f7ff ff55 bl 8000640 Display_WriteData(0x00); 8000796: 2000 movs r0, #0 8000798: f7ff ff52 bl 8000640 // VSA describes the height of the Vertical Scrolling Area Display_WriteData(0x01); 800079c: 2001 movs r0, #1 800079e: f7ff ff4f bl 8000640 Display_WriteData(0xf0); 80007a2: 20f0 movs r0, #240 @ 0xf0 80007a4: f7ff ff4c bl 8000640 // BFA describes the Bottom Fixed Area Display_WriteData(0x00); 80007a8: 2000 movs r0, #0 80007aa: f7ff ff49 bl 8000640 Display_WriteData(0x00); 80007ae: 2000 movs r0, #0 80007b0: f7ff ff46 bl 8000640 // Vertical Scroll Start Address of RAM: // GRAM row nbr (320) - Display row nbr (240) = 80 = 0x50 Display_WriteCommand(0x37); 80007b4: 2037 movs r0, #55 @ 0x37 80007b6: f7ff ff30 bl 800061a Display_WriteData(0x00); 80007ba: 2000 movs r0, #0 80007bc: f7ff ff40 bl 8000640 Display_WriteData(0x50); 80007c0: 2050 movs r0, #80 @ 0x50 80007c2: f7ff ff3d bl 8000640 NormalDisplayParam = 0xC0; 80007c6: 23c0 movs r3, #192 @ 0xc0 80007c8: 73fb strb r3, [r7, #15] 80007ca: e001 b.n 80007d0 } else { NormalDisplayParam = 0x60; 80007cc: 2360 movs r3, #96 @ 0x60 80007ce: 73fb strb r3, [r7, #15] } Display_WriteCommand(0x36); 80007d0: 2036 movs r0, #54 @ 0x36 80007d2: f7ff ff22 bl 800061a Display_WriteData(NormalDisplayParam); 80007d6: 7bfb ldrb r3, [r7, #15] 80007d8: b29b uxth r3, r3 80007da: 4618 mov r0, r3 80007dc: f7ff ff30 bl 8000640 } 80007e0: bf00 nop 80007e2: 3710 adds r7, #16 80007e4: 46bd mov sp, r7 80007e6: bd80 pop {r7, pc} 080007e8 : /************************************************************************************************************* Display: Primitives WITHOUT Select/Deselect **************************************************************************************************************/ static void Display_SetCursor_( uint16_t x, uint16_t y ) { 80007e8: b580 push {r7, lr} 80007ea: b082 sub sp, #8 80007ec: af00 add r7, sp, #0 80007ee: 4603 mov r3, r0 80007f0: 460a mov r2, r1 80007f2: 80fb strh r3, [r7, #6] 80007f4: 4613 mov r3, r2 80007f6: 80bb strh r3, [r7, #4] DISPLAY_LIMIT( x, 0, DISPLAY_WIDTH-1 ); 80007f8: 88fb ldrh r3, [r7, #6] 80007fa: 2bef cmp r3, #239 @ 0xef 80007fc: d901 bls.n 8000802 80007fe: 23ef movs r3, #239 @ 0xef 8000800: 80fb strh r3, [r7, #6] DISPLAY_LIMIT( y, 0, DISPLAY_HEIGHT-1 ); 8000802: 88bb ldrh r3, [r7, #4] 8000804: 2bef cmp r3, #239 @ 0xef 8000806: d901 bls.n 800080c 8000808: 23ef movs r3, #239 @ 0xef 800080a: 80bb strh r3, [r7, #4] Display_WriteCommand( 0x2a ); 800080c: 202a movs r0, #42 @ 0x2a 800080e: f7ff ff04 bl 800061a Display_WriteData( 0 ); 8000812: 2000 movs r0, #0 8000814: f7ff ff14 bl 8000640 Display_WriteData( x ); 8000818: 88fb ldrh r3, [r7, #6] 800081a: 4618 mov r0, r3 800081c: f7ff ff10 bl 8000640 Display_WriteData( 0 ); 8000820: 2000 movs r0, #0 8000822: f7ff ff0d bl 8000640 Display_WriteData( x+1 ); 8000826: 88fb ldrh r3, [r7, #6] 8000828: 3301 adds r3, #1 800082a: b29b uxth r3, r3 800082c: 4618 mov r0, r3 800082e: f7ff ff07 bl 8000640 Display_WriteCommand( 0x2b ); 8000832: 202b movs r0, #43 @ 0x2b 8000834: f7ff fef1 bl 800061a Display_WriteData( 0 ); 8000838: 2000 movs r0, #0 800083a: f7ff ff01 bl 8000640 Display_WriteData( y ); 800083e: 88bb ldrh r3, [r7, #4] 8000840: 4618 mov r0, r3 8000842: f7ff fefd bl 8000640 Display_WriteData( 0 ); 8000846: 2000 movs r0, #0 8000848: f7ff fefa bl 8000640 Display_WriteData( y+1 ); 800084c: 88bb ldrh r3, [r7, #4] 800084e: 3301 adds r3, #1 8000850: b29b uxth r3, r3 8000852: 4618 mov r0, r3 8000854: f7ff fef4 bl 8000640 Display_WriteCommand( 0x2c ); 8000858: 202c movs r0, #44 @ 0x2c 800085a: f7ff fede bl 800061a } 800085e: bf00 nop 8000860: 3708 adds r7, #8 8000862: 46bd mov sp, r7 8000864: bd80 pop {r7, pc} 08000866 : static void Display_SetWindow_( uint16_t x, uint16_t y, uint16_t Width, uint16_t Height ) { 8000866: b590 push {r4, r7, lr} 8000868: b083 sub sp, #12 800086a: af00 add r7, sp, #0 800086c: 4604 mov r4, r0 800086e: 4608 mov r0, r1 8000870: 4611 mov r1, r2 8000872: 461a mov r2, r3 8000874: 4623 mov r3, r4 8000876: 80fb strh r3, [r7, #6] 8000878: 4603 mov r3, r0 800087a: 80bb strh r3, [r7, #4] 800087c: 460b mov r3, r1 800087e: 807b strh r3, [r7, #2] 8000880: 4613 mov r3, r2 8000882: 803b strh r3, [r7, #0] DISPLAY_LIMIT( x, 0, DISPLAY_WIDTH-1 ); 8000884: 88fb ldrh r3, [r7, #6] 8000886: 2bef cmp r3, #239 @ 0xef 8000888: d901 bls.n 800088e 800088a: 23ef movs r3, #239 @ 0xef 800088c: 80fb strh r3, [r7, #6] DISPLAY_LIMIT( y, 0, DISPLAY_HEIGHT-1 ); 800088e: 88bb ldrh r3, [r7, #4] 8000890: 2bef cmp r3, #239 @ 0xef 8000892: d901 bls.n 8000898 8000894: 23ef movs r3, #239 @ 0xef 8000896: 80bb strh r3, [r7, #4] Display_WriteCommand( 0x2a ); 8000898: 202a movs r0, #42 @ 0x2a 800089a: f7ff febe bl 800061a Display_WriteData( 0 ); 800089e: 2000 movs r0, #0 80008a0: f7ff fece bl 8000640 Display_WriteData( x ); 80008a4: 88fb ldrh r3, [r7, #6] 80008a6: 4618 mov r0, r3 80008a8: f7ff feca bl 8000640 Display_WriteData( 0 ); 80008ac: 2000 movs r0, #0 80008ae: f7ff fec7 bl 8000640 Display_WriteData( x+Width ); 80008b2: 88fa ldrh r2, [r7, #6] 80008b4: 887b ldrh r3, [r7, #2] 80008b6: 4413 add r3, r2 80008b8: b29b uxth r3, r3 80008ba: 4618 mov r0, r3 80008bc: f7ff fec0 bl 8000640 Display_WriteCommand( 0x2b ); 80008c0: 202b movs r0, #43 @ 0x2b 80008c2: f7ff feaa bl 800061a Display_WriteData( 0 ); 80008c6: 2000 movs r0, #0 80008c8: f7ff feba bl 8000640 Display_WriteData( y ); 80008cc: 88bb ldrh r3, [r7, #4] 80008ce: 4618 mov r0, r3 80008d0: f7ff feb6 bl 8000640 Display_WriteData( 0 ); 80008d4: 2000 movs r0, #0 80008d6: f7ff feb3 bl 8000640 Display_WriteData( y+Height ); 80008da: 88ba ldrh r2, [r7, #4] 80008dc: 883b ldrh r3, [r7, #0] 80008de: 4413 add r3, r2 80008e0: b29b uxth r3, r3 80008e2: 4618 mov r0, r3 80008e4: f7ff feac bl 8000640 Display_WriteCommand( 0x2c ); 80008e8: 202c movs r0, #44 @ 0x2c 80008ea: f7ff fe96 bl 800061a } 80008ee: bf00 nop 80008f0: 370c adds r7, #12 80008f2: 46bd mov sp, r7 80008f4: bd90 pop {r4, r7, pc} 080008f6 : static void Display_DrawHLine_( uint16_t x, uint16_t y, uint16_t Length, uint16_t Color ) { 80008f6: b590 push {r4, r7, lr} 80008f8: b085 sub sp, #20 80008fa: af00 add r7, sp, #0 80008fc: 4604 mov r4, r0 80008fe: 4608 mov r0, r1 8000900: 4611 mov r1, r2 8000902: 461a mov r2, r3 8000904: 4623 mov r3, r4 8000906: 80fb strh r3, [r7, #6] 8000908: 4603 mov r3, r0 800090a: 80bb strh r3, [r7, #4] 800090c: 460b mov r3, r1 800090e: 807b strh r3, [r7, #2] 8000910: 4613 mov r3, r2 8000912: 803b strh r3, [r7, #0] uint16_t counter = 0; 8000914: 2300 movs r3, #0 8000916: 81fb strh r3, [r7, #14] Display_SetWindow_( x, y, DISPLAY_WIDTH-1, 0 ); 8000918: 88b9 ldrh r1, [r7, #4] 800091a: 88f8 ldrh r0, [r7, #6] 800091c: 2300 movs r3, #0 800091e: 22ef movs r2, #239 @ 0xef 8000920: f7ff ffa1 bl 8000866 for(counter = 0; counter < Length; counter++) { 8000924: 2300 movs r3, #0 8000926: 81fb strh r3, [r7, #14] 8000928: e006 b.n 8000938 Display_WriteData( Color ); 800092a: 883b ldrh r3, [r7, #0] 800092c: 4618 mov r0, r3 800092e: f7ff fe87 bl 8000640 for(counter = 0; counter < Length; counter++) { 8000932: 89fb ldrh r3, [r7, #14] 8000934: 3301 adds r3, #1 8000936: 81fb strh r3, [r7, #14] 8000938: 89fa ldrh r2, [r7, #14] 800093a: 887b ldrh r3, [r7, #2] 800093c: 429a cmp r2, r3 800093e: d3f4 bcc.n 800092a } } 8000940: bf00 nop 8000942: bf00 nop 8000944: 3714 adds r7, #20 8000946: 46bd mov sp, r7 8000948: bd90 pop {r4, r7, pc} 0800094a : static void Display_DrawVLine_( uint16_t x, uint16_t y, uint16_t Length, uint16_t Color ) { 800094a: b590 push {r4, r7, lr} 800094c: b085 sub sp, #20 800094e: af00 add r7, sp, #0 8000950: 4604 mov r4, r0 8000952: 4608 mov r0, r1 8000954: 4611 mov r1, r2 8000956: 461a mov r2, r3 8000958: 4623 mov r3, r4 800095a: 80fb strh r3, [r7, #6] 800095c: 4603 mov r3, r0 800095e: 80bb strh r3, [r7, #4] 8000960: 460b mov r3, r1 8000962: 807b strh r3, [r7, #2] 8000964: 4613 mov r3, r2 8000966: 803b strh r3, [r7, #0] uint16_t counter = 0; 8000968: 2300 movs r3, #0 800096a: 81fb strh r3, [r7, #14] Display_SetWindow_( x, y, 0, DISPLAY_HEIGHT-1 ); 800096c: 88b9 ldrh r1, [r7, #4] 800096e: 88f8 ldrh r0, [r7, #6] 8000970: 23ef movs r3, #239 @ 0xef 8000972: 2200 movs r2, #0 8000974: f7ff ff77 bl 8000866 for(counter = 0; counter < Length; counter++) { 8000978: 2300 movs r3, #0 800097a: 81fb strh r3, [r7, #14] 800097c: e006 b.n 800098c Display_WriteData( Color ); 800097e: 883b ldrh r3, [r7, #0] 8000980: 4618 mov r0, r3 8000982: f7ff fe5d bl 8000640 for(counter = 0; counter < Length; counter++) { 8000986: 89fb ldrh r3, [r7, #14] 8000988: 3301 adds r3, #1 800098a: 81fb strh r3, [r7, #14] 800098c: 89fa ldrh r2, [r7, #14] 800098e: 887b ldrh r3, [r7, #2] 8000990: 429a cmp r2, r3 8000992: d3f4 bcc.n 800097e } } 8000994: bf00 nop 8000996: bf00 nop 8000998: 3714 adds r7, #20 800099a: 46bd mov sp, r7 800099c: bd90 pop {r4, r7, pc} 0800099e : uint16_t Display_GetHeight( void ) { 800099e: b480 push {r7} 80009a0: af00 add r7, sp, #0 return DISPLAY_HEIGHT; 80009a2: 23f0 movs r3, #240 @ 0xf0 } 80009a4: 4618 mov r0, r3 80009a6: 46bd mov sp, r7 80009a8: f85d 7b04 ldr.w r7, [sp], #4 80009ac: 4770 bx lr 080009ae : uint16_t Display_GetWidth( void ) { 80009ae: b480 push {r7} 80009b0: af00 add r7, sp, #0 return DISPLAY_WIDTH; 80009b2: 23f0 movs r3, #240 @ 0xf0 } 80009b4: 4618 mov r0, r3 80009b6: 46bd mov sp, r7 80009b8: f85d 7b04 ldr.w r7, [sp], #4 80009bc: 4770 bx lr 080009be : static void Display_DrawPixel_( uint16_t x, uint16_t y, uint16_t Color ) { 80009be: b580 push {r7, lr} 80009c0: b082 sub sp, #8 80009c2: af00 add r7, sp, #0 80009c4: 4603 mov r3, r0 80009c6: 80fb strh r3, [r7, #6] 80009c8: 460b mov r3, r1 80009ca: 80bb strh r3, [r7, #4] 80009cc: 4613 mov r3, r2 80009ce: 807b strh r3, [r7, #2] Display_SetCursor_( x, y ); 80009d0: 88ba ldrh r2, [r7, #4] 80009d2: 88fb ldrh r3, [r7, #6] 80009d4: 4611 mov r1, r2 80009d6: 4618 mov r0, r3 80009d8: f7ff ff06 bl 80007e8 Display_WriteData( Color ); 80009dc: 887b ldrh r3, [r7, #2] 80009de: 4618 mov r0, r3 80009e0: f7ff fe2e bl 8000640 } 80009e4: bf00 nop 80009e6: 3708 adds r7, #8 80009e8: 46bd mov sp, r7 80009ea: bd80 pop {r7, pc} 080009ec : static void Display_DrawChar_( uint16_t x, uint16_t y, uint16_t ColorFront, uint16_t ColorBack, FONT_TypeDef *Font, char Char ) { 80009ec: b590 push {r4, r7, lr} 80009ee: b08b sub sp, #44 @ 0x2c 80009f0: af00 add r7, sp, #0 80009f2: 4604 mov r4, r0 80009f4: 4608 mov r0, r1 80009f6: 4611 mov r1, r2 80009f8: 461a mov r2, r3 80009fa: 4623 mov r3, r4 80009fc: 80fb strh r3, [r7, #6] 80009fe: 4603 mov r3, r0 8000a00: 80bb strh r3, [r7, #4] 8000a02: 460b mov r3, r1 8000a04: 807b strh r3, [r7, #2] 8000a06: 4613 mov r3, r2 8000a08: 803b strh r3, [r7, #0] uint32_t i = 0, j = 0; 8000a0a: 2300 movs r3, #0 8000a0c: 627b str r3, [r7, #36] @ 0x24 8000a0e: 2300 movs r3, #0 8000a10: 623b str r3, [r7, #32] uint8_t Offset; const uint8_t *CharData; const uint8_t *LinePtr; uint32_t Line; Height = Font->Height; 8000a12: 6bbb ldr r3, [r7, #56] @ 0x38 8000a14: 88db ldrh r3, [r3, #6] 8000a16: 837b strh r3, [r7, #26] Width = Font->Width; 8000a18: 6bbb ldr r3, [r7, #56] @ 0x38 8000a1a: 889b ldrh r3, [r3, #4] 8000a1c: 833b strh r3, [r7, #24] Offset = 8 *((Width + 7)/8) - Width; 8000a1e: 8b3b ldrh r3, [r7, #24] 8000a20: 3307 adds r3, #7 8000a22: 2b00 cmp r3, #0 8000a24: da00 bge.n 8000a28 8000a26: 3307 adds r3, #7 8000a28: 10db asrs r3, r3, #3 8000a2a: b2db uxtb r3, r3 8000a2c: 00db lsls r3, r3, #3 8000a2e: b2da uxtb r2, r3 8000a30: 8b3b ldrh r3, [r7, #24] 8000a32: b2db uxtb r3, r3 8000a34: 1ad3 subs r3, r2, r3 8000a36: 75fb strb r3, [r7, #23] CharData = &Font->table[(Char-' ')*Height * ((Width + 7) / 8)]; 8000a38: 6bbb ldr r3, [r7, #56] @ 0x38 8000a3a: 681a ldr r2, [r3, #0] 8000a3c: f897 303c ldrb.w r3, [r7, #60] @ 0x3c 8000a40: 3b20 subs r3, #32 8000a42: 8b79 ldrh r1, [r7, #26] 8000a44: fb03 f101 mul.w r1, r3, r1 8000a48: 8b3b ldrh r3, [r7, #24] 8000a4a: 3307 adds r3, #7 8000a4c: 2b00 cmp r3, #0 8000a4e: da00 bge.n 8000a52 8000a50: 3307 adds r3, #7 8000a52: 10db asrs r3, r3, #3 8000a54: fb01 f303 mul.w r3, r1, r3 8000a58: 4413 add r3, r2 8000a5a: 613b str r3, [r7, #16] Display_SetWindow_( x, y, Width-1, Height-1 ); 8000a5c: 8b3b ldrh r3, [r7, #24] 8000a5e: 3b01 subs r3, #1 8000a60: b29a uxth r2, r3 8000a62: 8b7b ldrh r3, [r7, #26] 8000a64: 3b01 subs r3, #1 8000a66: b29b uxth r3, r3 8000a68: 88b9 ldrh r1, [r7, #4] 8000a6a: 88f8 ldrh r0, [r7, #6] 8000a6c: f7ff fefb bl 8000866 for( i = 0; i < Height; i++ ) { 8000a70: 2300 movs r3, #0 8000a72: 627b str r3, [r7, #36] @ 0x24 8000a74: e059 b.n 8000b2a LinePtr = ((const uint8_t *)CharData + (Width + 7)/8 * i); 8000a76: 8b3b ldrh r3, [r7, #24] 8000a78: 3307 adds r3, #7 8000a7a: 2b00 cmp r3, #0 8000a7c: da00 bge.n 8000a80 8000a7e: 3307 adds r3, #7 8000a80: 10db asrs r3, r3, #3 8000a82: 461a mov r2, r3 8000a84: 6a7b ldr r3, [r7, #36] @ 0x24 8000a86: fb02 f303 mul.w r3, r2, r3 8000a8a: 693a ldr r2, [r7, #16] 8000a8c: 4413 add r3, r2 8000a8e: 60fb str r3, [r7, #12] switch(((Width + 7)/8)) { 8000a90: 8b3b ldrh r3, [r7, #24] 8000a92: 3307 adds r3, #7 8000a94: 2b00 cmp r3, #0 8000a96: da00 bge.n 8000a9a 8000a98: 3307 adds r3, #7 8000a9a: 10db asrs r3, r3, #3 8000a9c: 2b01 cmp r3, #1 8000a9e: d002 beq.n 8000aa6 8000aa0: 2b02 cmp r3, #2 8000aa2: d004 beq.n 8000aae 8000aa4: e00c b.n 8000ac0 case 1: Line = LinePtr[0]; break; 8000aa6: 68fb ldr r3, [r7, #12] 8000aa8: 781b ldrb r3, [r3, #0] 8000aaa: 61fb str r3, [r7, #28] 8000aac: e016 b.n 8000adc case 2: Line = (LinePtr[0]<< 8) | LinePtr[1]; break; 8000aae: 68fb ldr r3, [r7, #12] 8000ab0: 781b ldrb r3, [r3, #0] 8000ab2: 021b lsls r3, r3, #8 8000ab4: 68fa ldr r2, [r7, #12] 8000ab6: 3201 adds r2, #1 8000ab8: 7812 ldrb r2, [r2, #0] 8000aba: 4313 orrs r3, r2 8000abc: 61fb str r3, [r7, #28] 8000abe: e00d b.n 8000adc case 3: default: Line = (LinePtr[0]<< 16) | (LinePtr[1]<< 8) | LinePtr[2]; break; 8000ac0: 68fb ldr r3, [r7, #12] 8000ac2: 781b ldrb r3, [r3, #0] 8000ac4: 041a lsls r2, r3, #16 8000ac6: 68fb ldr r3, [r7, #12] 8000ac8: 3301 adds r3, #1 8000aca: 781b ldrb r3, [r3, #0] 8000acc: 021b lsls r3, r3, #8 8000ace: 4313 orrs r3, r2 8000ad0: 68fa ldr r2, [r7, #12] 8000ad2: 3202 adds r2, #2 8000ad4: 7812 ldrb r2, [r2, #0] 8000ad6: 4313 orrs r3, r2 8000ad8: 61fb str r3, [r7, #28] 8000ada: bf00 nop } for( j = 0; j < Width; j++ ) { 8000adc: 2300 movs r3, #0 8000ade: 623b str r3, [r7, #32] 8000ae0: e019 b.n 8000b16 if( Line & (1 << (Width- j + Offset- 1))) { 8000ae2: 8b3a ldrh r2, [r7, #24] 8000ae4: 6a3b ldr r3, [r7, #32] 8000ae6: 1ad2 subs r2, r2, r3 8000ae8: 7dfb ldrb r3, [r7, #23] 8000aea: 4413 add r3, r2 8000aec: 3b01 subs r3, #1 8000aee: 2201 movs r2, #1 8000af0: fa02 f303 lsl.w r3, r2, r3 8000af4: 461a mov r2, r3 8000af6: 69fb ldr r3, [r7, #28] 8000af8: 4013 ands r3, r2 8000afa: 2b00 cmp r3, #0 8000afc: d004 beq.n 8000b08 Display_WriteData( ColorFront ); 8000afe: 887b ldrh r3, [r7, #2] 8000b00: 4618 mov r0, r3 8000b02: f7ff fd9d bl 8000640 8000b06: e003 b.n 8000b10 } else { Display_WriteData( ColorBack ); 8000b08: 883b ldrh r3, [r7, #0] 8000b0a: 4618 mov r0, r3 8000b0c: f7ff fd98 bl 8000640 for( j = 0; j < Width; j++ ) { 8000b10: 6a3b ldr r3, [r7, #32] 8000b12: 3301 adds r3, #1 8000b14: 623b str r3, [r7, #32] 8000b16: 8b3b ldrh r3, [r7, #24] 8000b18: 6a3a ldr r2, [r7, #32] 8000b1a: 429a cmp r2, r3 8000b1c: d3e1 bcc.n 8000ae2 } } y++; 8000b1e: 88bb ldrh r3, [r7, #4] 8000b20: 3301 adds r3, #1 8000b22: 80bb strh r3, [r7, #4] for( i = 0; i < Height; i++ ) { 8000b24: 6a7b ldr r3, [r7, #36] @ 0x24 8000b26: 3301 adds r3, #1 8000b28: 627b str r3, [r7, #36] @ 0x24 8000b2a: 8b7b ldrh r3, [r7, #26] 8000b2c: 6a7a ldr r2, [r7, #36] @ 0x24 8000b2e: 429a cmp r2, r3 8000b30: d3a1 bcc.n 8000a76 } } 8000b32: bf00 nop 8000b34: bf00 nop 8000b36: 372c adds r7, #44 @ 0x2c 8000b38: 46bd mov sp, r7 8000b3a: bd90 pop {r4, r7, pc} 08000b3c : static void Display_PrintString_( uint16_t x, uint16_t y, uint16_t ColorFront, uint16_t ColorBack, FONT_TypeDef *Font, char *String ) { 8000b3c: b590 push {r4, r7, lr} 8000b3e: b087 sub sp, #28 8000b40: af02 add r7, sp, #8 8000b42: 4604 mov r4, r0 8000b44: 4608 mov r0, r1 8000b46: 4611 mov r1, r2 8000b48: 461a mov r2, r3 8000b4a: 4623 mov r3, r4 8000b4c: 80fb strh r3, [r7, #6] 8000b4e: 4603 mov r3, r0 8000b50: 80bb strh r3, [r7, #4] 8000b52: 460b mov r3, r1 8000b54: 807b strh r3, [r7, #2] 8000b56: 4613 mov r3, r2 8000b58: 803b strh r3, [r7, #0] DISPLAY_ALIGN_TypeDef Mode = ALIGN_LEFT; 8000b5a: 2300 movs r3, #0 8000b5c: 73fb strb r3, [r7, #15] if( Mode != ALIGN_LEFT ) { 8000b5e: 7bfb ldrb r3, [r7, #15] 8000b60: 2b00 cmp r3, #0 8000b62: d03b beq.n 8000bdc size_t StrLen = strlen(String); 8000b64: 6a78 ldr r0, [r7, #36] @ 0x24 8000b66: f7ff fb5b bl 8000220 8000b6a: 60b8 str r0, [r7, #8] if( Mode == ALIGN_CENTER ) { 8000b6c: 7bfb ldrb r3, [r7, #15] 8000b6e: 2b01 cmp r3, #1 8000b70: d10b bne.n 8000b8a x -= StrLen*Font->Width/2; 8000b72: 6a3b ldr r3, [r7, #32] 8000b74: 889b ldrh r3, [r3, #4] 8000b76: 461a mov r2, r3 8000b78: 68bb ldr r3, [r7, #8] 8000b7a: fb02 f303 mul.w r3, r2, r3 8000b7e: 085b lsrs r3, r3, #1 8000b80: b29b uxth r3, r3 8000b82: 88fa ldrh r2, [r7, #6] 8000b84: 1ad3 subs r3, r2, r3 8000b86: 80fb strh r3, [r7, #6] 8000b88: e028 b.n 8000bdc } else if( Mode == ALIGN_RIGHT ) { 8000b8a: 7bfb ldrb r3, [r7, #15] 8000b8c: 2b02 cmp r3, #2 8000b8e: d125 bne.n 8000bdc x -= StrLen*Font->Width; 8000b90: 6a3b ldr r3, [r7, #32] 8000b92: 889a ldrh r2, [r3, #4] 8000b94: 68bb ldr r3, [r7, #8] 8000b96: b29b uxth r3, r3 8000b98: fb12 f303 smulbb r3, r2, r3 8000b9c: b29b uxth r3, r3 8000b9e: 88fa ldrh r2, [r7, #6] 8000ba0: 1ad3 subs r3, r2, r3 8000ba2: 80fb strh r3, [r7, #6] } if( x < 0 ) { x = 0; } } while( *String ) { 8000ba4: e01a b.n 8000bdc if( x >= Display_GetWidth() ) { 8000ba6: f7ff ff02 bl 80009ae 8000baa: 4603 mov r3, r0 8000bac: 461a mov r2, r3 8000bae: 88fb ldrh r3, [r7, #6] 8000bb0: 4293 cmp r3, r2 8000bb2: d218 bcs.n 8000be6 break; } Display_DrawChar_( x, y, ColorFront, ColorBack, Font, *String ); 8000bb4: 6a7b ldr r3, [r7, #36] @ 0x24 8000bb6: 781b ldrb r3, [r3, #0] 8000bb8: 883c ldrh r4, [r7, #0] 8000bba: 887a ldrh r2, [r7, #2] 8000bbc: 88b9 ldrh r1, [r7, #4] 8000bbe: 88f8 ldrh r0, [r7, #6] 8000bc0: 9301 str r3, [sp, #4] 8000bc2: 6a3b ldr r3, [r7, #32] 8000bc4: 9300 str r3, [sp, #0] 8000bc6: 4623 mov r3, r4 8000bc8: f7ff ff10 bl 80009ec x += Font->Width; 8000bcc: 6a3b ldr r3, [r7, #32] 8000bce: 889a ldrh r2, [r3, #4] 8000bd0: 88fb ldrh r3, [r7, #6] 8000bd2: 4413 add r3, r2 8000bd4: 80fb strh r3, [r7, #6] String ++; 8000bd6: 6a7b ldr r3, [r7, #36] @ 0x24 8000bd8: 3301 adds r3, #1 8000bda: 627b str r3, [r7, #36] @ 0x24 while( *String ) { 8000bdc: 6a7b ldr r3, [r7, #36] @ 0x24 8000bde: 781b ldrb r3, [r3, #0] 8000be0: 2b00 cmp r3, #0 8000be2: d1e0 bne.n 8000ba6 } } 8000be4: e000 b.n 8000be8 break; 8000be6: bf00 nop } 8000be8: bf00 nop 8000bea: 3714 adds r7, #20 8000bec: 46bd mov sp, r7 8000bee: bd90 pop {r4, r7, pc} 08000bf0 : x += xinc2; // Change the x as appropriate y += yinc2; // Change the y as appropriate } } static void Display_Clear_( uint16_t Color ) { 8000bf0: b580 push {r7, lr} 8000bf2: b084 sub sp, #16 8000bf4: af00 add r7, sp, #0 8000bf6: 4603 mov r3, r0 8000bf8: 80fb strh r3, [r7, #6] uint16_t y = 0; 8000bfa: 2300 movs r3, #0 8000bfc: 81fb strh r3, [r7, #14] uint16_t Height = 0; 8000bfe: 2300 movs r3, #0 8000c00: 81bb strh r3, [r7, #12] uint16_t Width = Display_GetWidth(); 8000c02: f7ff fed4 bl 80009ae 8000c06: 4603 mov r3, r0 8000c08: 817b strh r3, [r7, #10] Height = Display_GetHeight(); 8000c0a: f7ff fec8 bl 800099e 8000c0e: 4603 mov r3, r0 8000c10: 81bb strh r3, [r7, #12] for( y = 0; y < Height ; y ++ ) { 8000c12: 2300 movs r3, #0 8000c14: 81fb strh r3, [r7, #14] 8000c16: e008 b.n 8000c2a Display_DrawHLine_( 0, y, Width, Color ); 8000c18: 88fb ldrh r3, [r7, #6] 8000c1a: 897a ldrh r2, [r7, #10] 8000c1c: 89f9 ldrh r1, [r7, #14] 8000c1e: 2000 movs r0, #0 8000c20: f7ff fe69 bl 80008f6 for( y = 0; y < Height ; y ++ ) { 8000c24: 89fb ldrh r3, [r7, #14] 8000c26: 3301 adds r3, #1 8000c28: 81fb strh r3, [r7, #14] 8000c2a: 89fa ldrh r2, [r7, #14] 8000c2c: 89bb ldrh r3, [r7, #12] 8000c2e: 429a cmp r2, r3 8000c30: d3f2 bcc.n 8000c18 } } 8000c32: bf00 nop 8000c34: bf00 nop 8000c36: 3710 adds r7, #16 8000c38: 46bd mov sp, r7 8000c3a: bd80 pop {r7, pc} 08000c3c : Display_Clear_( Color ); Display_Deselect(); } void Display_DrawPixel( uint16_t x, uint16_t y, uint16_t Color ) { 8000c3c: b580 push {r7, lr} 8000c3e: b082 sub sp, #8 8000c40: af00 add r7, sp, #0 8000c42: 4603 mov r3, r0 8000c44: 80fb strh r3, [r7, #6] 8000c46: 460b mov r3, r1 8000c48: 80bb strh r3, [r7, #4] 8000c4a: 4613 mov r3, r2 8000c4c: 807b strh r3, [r7, #2] if( !Display_Select() ) return; 8000c4e: f7ff fcd5 bl 80005fc 8000c52: 4603 mov r3, r0 8000c54: 2b00 cmp r3, #0 8000c56: d008 beq.n 8000c6a Display_DrawPixel_( x, y, Color ); 8000c58: 887a ldrh r2, [r7, #2] 8000c5a: 88b9 ldrh r1, [r7, #4] 8000c5c: 88fb ldrh r3, [r7, #6] 8000c5e: 4618 mov r0, r3 8000c60: f7ff fead bl 80009be Display_Deselect(); 8000c64: f7ff fcd2 bl 800060c 8000c68: e000 b.n 8000c6c if( !Display_Select() ) return; 8000c6a: bf00 nop } 8000c6c: 3708 adds r7, #8 8000c6e: 46bd mov sp, r7 8000c70: bd80 pop {r7, pc} ... 08000c74 : if( !Display_Select() ) return; Display_PrintString_( x, y, ColorFront, ColorBack, Font, String ); Display_Deselect(); } void Display_Printf( uint16_t x, uint16_t y, uint16_t ColorFront, uint16_t ColorBack, FONT_TypeDef *Font, char *Format, ... ) { 8000c74: b590 push {r4, r7, lr} 8000c76: b087 sub sp, #28 8000c78: af02 add r7, sp, #8 8000c7a: 4604 mov r4, r0 8000c7c: 4608 mov r0, r1 8000c7e: 4611 mov r1, r2 8000c80: 461a mov r2, r3 8000c82: 4623 mov r3, r4 8000c84: 80fb strh r3, [r7, #6] 8000c86: 4603 mov r3, r0 8000c88: 80bb strh r3, [r7, #4] 8000c8a: 460b mov r3, r1 8000c8c: 807b strh r3, [r7, #2] 8000c8e: 4613 mov r3, r2 8000c90: 803b strh r3, [r7, #0] va_list Args; va_start( Args, Format ); 8000c92: f107 0328 add.w r3, r7, #40 @ 0x28 8000c96: 60fb str r3, [r7, #12] if( !Display_Select() ) return; 8000c98: f7ff fcb0 bl 80005fc 8000c9c: 4603 mov r3, r0 8000c9e: 2b00 cmp r3, #0 8000ca0: d013 beq.n 8000cca vsnprintf( Display_LineBuffer, sizeof(Display_LineBuffer), Format, Args ); 8000ca2: 68fb ldr r3, [r7, #12] 8000ca4: 6a7a ldr r2, [r7, #36] @ 0x24 8000ca6: 2140 movs r1, #64 @ 0x40 8000ca8: 480a ldr r0, [pc, #40] @ (8000cd4 ) 8000caa: f005 ffdb bl 8006c64 va_end( Args ); Display_PrintString_( x, y, ColorFront, ColorBack, Font, Display_LineBuffer ); 8000cae: 883c ldrh r4, [r7, #0] 8000cb0: 887a ldrh r2, [r7, #2] 8000cb2: 88b9 ldrh r1, [r7, #4] 8000cb4: 88f8 ldrh r0, [r7, #6] 8000cb6: 4b07 ldr r3, [pc, #28] @ (8000cd4 ) 8000cb8: 9301 str r3, [sp, #4] 8000cba: 6a3b ldr r3, [r7, #32] 8000cbc: 9300 str r3, [sp, #0] 8000cbe: 4623 mov r3, r4 8000cc0: f7ff ff3c bl 8000b3c Display_Deselect(); 8000cc4: f7ff fca2 bl 800060c 8000cc8: e000 b.n 8000ccc if( !Display_Select() ) return; 8000cca: bf00 nop } 8000ccc: 3714 adds r7, #20 8000cce: 46bd mov sp, r7 8000cd0: bd90 pop {r4, r7, pc} 8000cd2: bf00 nop 8000cd4: 20000090 .word 0x20000090 08000cd8 : if( !Display_Select() ) return; Display_DrawLine_( x1, y1, x2, y2, Color ); Display_Deselect(); } void Display_DrawRect( uint16_t x, uint16_t y, uint16_t Width, uint16_t Height, uint16_t Color ) { 8000cd8: b590 push {r4, r7, lr} 8000cda: b083 sub sp, #12 8000cdc: af00 add r7, sp, #0 8000cde: 4604 mov r4, r0 8000ce0: 4608 mov r0, r1 8000ce2: 4611 mov r1, r2 8000ce4: 461a mov r2, r3 8000ce6: 4623 mov r3, r4 8000ce8: 80fb strh r3, [r7, #6] 8000cea: 4603 mov r3, r0 8000cec: 80bb strh r3, [r7, #4] 8000cee: 460b mov r3, r1 8000cf0: 807b strh r3, [r7, #2] 8000cf2: 4613 mov r3, r2 8000cf4: 803b strh r3, [r7, #0] if( !Display_Select() ) return; 8000cf6: f7ff fc81 bl 80005fc 8000cfa: 4603 mov r3, r0 8000cfc: 2b00 cmp r3, #0 8000cfe: d020 beq.n 8000d42 Display_DrawHLine_( x, y, Width, Color ); 8000d00: 8b3b ldrh r3, [r7, #24] 8000d02: 887a ldrh r2, [r7, #2] 8000d04: 88b9 ldrh r1, [r7, #4] 8000d06: 88f8 ldrh r0, [r7, #6] 8000d08: f7ff fdf5 bl 80008f6 Display_DrawHLine_( x, (y+ Height), Width, Color ); 8000d0c: 88ba ldrh r2, [r7, #4] 8000d0e: 883b ldrh r3, [r7, #0] 8000d10: 4413 add r3, r2 8000d12: b299 uxth r1, r3 8000d14: 8b3b ldrh r3, [r7, #24] 8000d16: 887a ldrh r2, [r7, #2] 8000d18: 88f8 ldrh r0, [r7, #6] 8000d1a: f7ff fdec bl 80008f6 Display_DrawVLine_( x, y, Height, Color ); 8000d1e: 8b3b ldrh r3, [r7, #24] 8000d20: 883a ldrh r2, [r7, #0] 8000d22: 88b9 ldrh r1, [r7, #4] 8000d24: 88f8 ldrh r0, [r7, #6] 8000d26: f7ff fe10 bl 800094a Display_DrawVLine_( (x + Width), y, Height, Color ); 8000d2a: 88fa ldrh r2, [r7, #6] 8000d2c: 887b ldrh r3, [r7, #2] 8000d2e: 4413 add r3, r2 8000d30: b298 uxth r0, r3 8000d32: 8b3b ldrh r3, [r7, #24] 8000d34: 883a ldrh r2, [r7, #0] 8000d36: 88b9 ldrh r1, [r7, #4] 8000d38: f7ff fe07 bl 800094a Display_Deselect(); 8000d3c: f7ff fc66 bl 800060c 8000d40: e000 b.n 8000d44 if( !Display_Select() ) return; 8000d42: bf00 nop } 8000d44: 370c adds r7, #12 8000d46: 46bd mov sp, r7 8000d48: bd90 pop {r4, r7, pc} 08000d4a : void Display_FillRect( uint16_t x, uint16_t y, uint16_t Width, uint16_t Height, uint16_t Color ) { 8000d4a: b590 push {r4, r7, lr} 8000d4c: b085 sub sp, #20 8000d4e: af00 add r7, sp, #0 8000d50: 4604 mov r4, r0 8000d52: 4608 mov r0, r1 8000d54: 4611 mov r1, r2 8000d56: 461a mov r2, r3 8000d58: 4623 mov r3, r4 8000d5a: 80fb strh r3, [r7, #6] 8000d5c: 4603 mov r3, r0 8000d5e: 80bb strh r3, [r7, #4] 8000d60: 460b mov r3, r1 8000d62: 807b strh r3, [r7, #2] 8000d64: 4613 mov r3, r2 8000d66: 803b strh r3, [r7, #0] uint16_t i; if( !Display_Select() ) return; 8000d68: f7ff fc48 bl 80005fc 8000d6c: 4603 mov r3, r0 8000d6e: 2b00 cmp r3, #0 8000d70: d015 beq.n 8000d9e for( i = 0; i < Height ; i ++ ) { 8000d72: 2300 movs r3, #0 8000d74: 81fb strh r3, [r7, #14] 8000d76: e00b b.n 8000d90 Display_DrawHLine_( x, y+i, Width, Color ); 8000d78: 88ba ldrh r2, [r7, #4] 8000d7a: 89fb ldrh r3, [r7, #14] 8000d7c: 4413 add r3, r2 8000d7e: b299 uxth r1, r3 8000d80: 8c3b ldrh r3, [r7, #32] 8000d82: 887a ldrh r2, [r7, #2] 8000d84: 88f8 ldrh r0, [r7, #6] 8000d86: f7ff fdb6 bl 80008f6 for( i = 0; i < Height ; i ++ ) { 8000d8a: 89fb ldrh r3, [r7, #14] 8000d8c: 3301 adds r3, #1 8000d8e: 81fb strh r3, [r7, #14] 8000d90: 89fa ldrh r2, [r7, #14] 8000d92: 883b ldrh r3, [r7, #0] 8000d94: 429a cmp r2, r3 8000d96: d3ef bcc.n 8000d78 } Display_Deselect(); 8000d98: f7ff fc38 bl 800060c 8000d9c: e000 b.n 8000da0 if( !Display_Select() ) return; 8000d9e: bf00 nop } 8000da0: 3714 adds r7, #20 8000da2: 46bd mov sp, r7 8000da4: bd90 pop {r4, r7, pc} ... 08000da8 : Points[i].x += 100; } Display_FillPolygon( Points, 4, LCD_COLOR_LIGHTBLUE ); } void Display_Init( void ) { 8000da8: b580 push {r7, lr} 8000daa: b082 sub sp, #8 8000dac: af00 add r7, sp, #0 // Backlight control signal assertion: HAL_GPIO_WritePin(GPIOH, GPIO_PIN_11, GPIO_PIN_SET); 8000dae: 2201 movs r2, #1 8000db0: f44f 6100 mov.w r1, #2048 @ 0x800 8000db4: 481c ldr r0, [pc, #112] @ (8000e28 ) 8000db6: f001 fca7 bl 8002708 // Apply hardware reset according to procedure indicated in FRD154BP2901 documentation: HAL_GPIO_WritePin(LCD_RST_GPIO_Port, LCD_RST_Pin, GPIO_PIN_RESET); 8000dba: 2200 movs r2, #0 8000dbc: 2180 movs r1, #128 @ 0x80 8000dbe: 481a ldr r0, [pc, #104] @ (8000e28 ) 8000dc0: f001 fca2 bl 8002708 HAL_Delay(5); 8000dc4: 2005 movs r0, #5 8000dc6: f001 f9fd bl 80021c4 HAL_GPIO_WritePin(LCD_RST_GPIO_Port, LCD_RST_Pin, GPIO_PIN_SET); 8000dca: 2201 movs r2, #1 8000dcc: 2180 movs r1, #128 @ 0x80 8000dce: 4816 ldr r0, [pc, #88] @ (8000e28 ) 8000dd0: f001 fc9a bl 8002708 HAL_Delay(10); 8000dd4: 200a movs r0, #10 8000dd6: f001 f9f5 bl 80021c4 HAL_GPIO_WritePin(LCD_RST_GPIO_Port, LCD_RST_Pin, GPIO_PIN_RESET); 8000dda: 2200 movs r2, #0 8000ddc: 2180 movs r1, #128 @ 0x80 8000dde: 4812 ldr r0, [pc, #72] @ (8000e28 ) 8000de0: f001 fc92 bl 8002708 HAL_Delay(20); 8000de4: 2014 movs r0, #20 8000de6: f001 f9ed bl 80021c4 HAL_GPIO_WritePin(LCD_RST_GPIO_Port, LCD_RST_Pin, GPIO_PIN_SET); 8000dea: 2201 movs r2, #1 8000dec: 2180 movs r1, #128 @ 0x80 8000dee: 480e ldr r0, [pc, #56] @ (8000e28 ) 8000df0: f001 fc8a bl 8002708 HAL_Delay(10); 8000df4: 200a movs r0, #10 8000df6: f001 f9e5 bl 80021c4 Display_InitFmc(); 8000dfa: f7ff fc93 bl 8000724 uint8_t DisplayId = Display_ReadReg(0x04); 8000dfe: 2004 movs r0, #4 8000e00: f7ff fc3b bl 800067a 8000e04: 4603 mov r3, r0 8000e06: 71fb strb r3, [r7, #7] if( DisplayId == 0x85 ) { 8000e08: 79fb ldrb r3, [r7, #7] 8000e0a: 2b85 cmp r3, #133 @ 0x85 8000e0c: d108 bne.n 8000e20 Display_WriteCommandList( InitCmd ); 8000e0e: 4807 ldr r0, [pc, #28] @ (8000e2c ) 8000e10: f7ff fc46 bl 80006a0 Display_SetOrientation( LCD_ORIENTATION_LANDSCAPE_ROT180 ); 8000e14: 2002 movs r0, #2 8000e16: f7ff fcab bl 8000770 Display_Clear_( LCD_COLOR_BLACK ); // Use variant without select/deselect to ignore OS and Mutex here! 8000e1a: 2000 movs r0, #0 8000e1c: f7ff fee8 bl 8000bf0 } /* ToDo: Create Mutex */ } 8000e20: bf00 nop 8000e22: 3708 adds r7, #8 8000e24: 46bd mov sp, r7 8000e26: bd80 pop {r7, pc} 8000e28: 40021c00 .word 0x40021c00 8000e2c: 08007ab8 .word 0x08007ab8 08000e30 : unsigned long getRunTimeCounterValue(void); /* USER CODE BEGIN 1 */ /* Functions needed when configGENERATE_RUN_TIME_STATS is on */ __weak void configureTimerForRunTimeStats(void) { 8000e30: b480 push {r7} 8000e32: af00 add r7, sp, #0 } 8000e34: bf00 nop 8000e36: 46bd mov sp, r7 8000e38: f85d 7b04 ldr.w r7, [sp], #4 8000e3c: 4770 bx lr 08000e3e : __weak unsigned long getRunTimeCounterValue(void) { 8000e3e: b480 push {r7} 8000e40: af00 add r7, sp, #0 return 0; 8000e42: 2300 movs r3, #0 } 8000e44: 4618 mov r0, r3 8000e46: 46bd mov sp, r7 8000e48: f85d 7b04 ldr.w r7, [sp], #4 8000e4c: 4770 bx lr ... 08000e50 : /* USER CODE BEGIN GET_IDLE_TASK_MEMORY */ static StaticTask_t xIdleTaskTCBBuffer; static StackType_t xIdleStack[configMINIMAL_STACK_SIZE]; void vApplicationGetIdleTaskMemory( StaticTask_t **ppxIdleTaskTCBBuffer, StackType_t **ppxIdleTaskStackBuffer, uint32_t *pulIdleTaskStackSize ) { 8000e50: b480 push {r7} 8000e52: b085 sub sp, #20 8000e54: af00 add r7, sp, #0 8000e56: 60f8 str r0, [r7, #12] 8000e58: 60b9 str r1, [r7, #8] 8000e5a: 607a str r2, [r7, #4] *ppxIdleTaskTCBBuffer = &xIdleTaskTCBBuffer; 8000e5c: 68fb ldr r3, [r7, #12] 8000e5e: 4a07 ldr r2, [pc, #28] @ (8000e7c ) 8000e60: 601a str r2, [r3, #0] *ppxIdleTaskStackBuffer = &xIdleStack[0]; 8000e62: 68bb ldr r3, [r7, #8] 8000e64: 4a06 ldr r2, [pc, #24] @ (8000e80 ) 8000e66: 601a str r2, [r3, #0] *pulIdleTaskStackSize = configMINIMAL_STACK_SIZE; 8000e68: 687b ldr r3, [r7, #4] 8000e6a: f44f 7280 mov.w r2, #256 @ 0x100 8000e6e: 601a str r2, [r3, #0] /* place for user code */ } 8000e70: bf00 nop 8000e72: 3714 adds r7, #20 8000e74: 46bd mov sp, r7 8000e76: f85d 7b04 ldr.w r7, [sp], #4 8000e7a: 4770 bx lr 8000e7c: 200000d0 .word 0x200000d0 8000e80: 2000017c .word 0x2000017c 08000e84 <_write>: int _write( int file, char *ptr, int len ); /* USER CODE END PFP */ /* Private user code ---------------------------------------------------------*/ /* USER CODE BEGIN 0 */ int _write( int file, char *ptr, int len ){ 8000e84: b580 push {r7, lr} 8000e86: b084 sub sp, #16 8000e88: af00 add r7, sp, #0 8000e8a: 60f8 str r0, [r7, #12] 8000e8c: 60b9 str r1, [r7, #8] 8000e8e: 607a str r2, [r7, #4] HAL_UART_Transmit(&huart6, (uint8_t*)ptr, len, 1000); 8000e90: 687b ldr r3, [r7, #4] 8000e92: b29a uxth r2, r3 8000e94: f44f 737a mov.w r3, #1000 @ 0x3e8 8000e98: 68b9 ldr r1, [r7, #8] 8000e9a: 4804 ldr r0, [pc, #16] @ (8000eac <_write+0x28>) 8000e9c: f003 fcd4 bl 8004848 return len; 8000ea0: 687b ldr r3, [r7, #4] } 8000ea2: 4618 mov r0, r3 8000ea4: 3710 adds r7, #16 8000ea6: 46bd mov sp, r7 8000ea8: bd80 pop {r7, pc} 8000eaa: bf00 nop 8000eac: 200005d0 .word 0x200005d0 08000eb0 : // get time in ms passed since a timestamp uint32_t time_msPassedSince(uint32_t timestampOld) { 8000eb0: b580 push {r7, lr} 8000eb2: b082 sub sp, #8 8000eb4: af00 add r7, sp, #0 8000eb6: 6078 str r0, [r7, #4] return (uint32_t)(HAL_GetTick() - timestampOld); 8000eb8: f001 f978 bl 80021ac 8000ebc: 4602 mov r2, r0 8000ebe: 687b ldr r3, [r7, #4] 8000ec0: 1ad3 subs r3, r2, r3 } 8000ec2: 4618 mov r0, r3 8000ec4: 3708 adds r7, #8 8000ec6: 46bd mov sp, r7 8000ec8: bd80 pop {r7, pc} 08000eca : static inline int32_t clamp_i16(int32_t value, int32_t min, int32_t max) { 8000eca: b480 push {r7} 8000ecc: b085 sub sp, #20 8000ece: af00 add r7, sp, #0 8000ed0: 60f8 str r0, [r7, #12] 8000ed2: 60b9 str r1, [r7, #8] 8000ed4: 607a str r2, [r7, #4] if (value < min) return min; 8000ed6: 68fa ldr r2, [r7, #12] 8000ed8: 68bb ldr r3, [r7, #8] 8000eda: 429a cmp r2, r3 8000edc: da01 bge.n 8000ee2 8000ede: 68bb ldr r3, [r7, #8] 8000ee0: e006 b.n 8000ef0 if (value > max) return max; 8000ee2: 68fa ldr r2, [r7, #12] 8000ee4: 687b ldr r3, [r7, #4] 8000ee6: 429a cmp r2, r3 8000ee8: dd01 ble.n 8000eee 8000eea: 687b ldr r3, [r7, #4] 8000eec: e000 b.n 8000ef0 return value; 8000eee: 68fb ldr r3, [r7, #12] } 8000ef0: 4618 mov r0, r3 8000ef2: 3714 adds r7, #20 8000ef4: 46bd mov sp, r7 8000ef6: f85d 7b04 ldr.w r7, [sp], #4 8000efa: 4770 bx lr 08000efc : // function for drawing a button either pressed or released void drawButton(bool isPressed){ 8000efc: b580 push {r7, lr} 8000efe: b084 sub sp, #16 8000f00: af02 add r7, sp, #8 8000f02: 4603 mov r3, r0 8000f04: 71fb strb r3, [r7, #7] if (isPressed){ 8000f06: 79fb ldrb r3, [r7, #7] 8000f08: 2b00 cmp r3, #0 8000f0a: d012 beq.n 8000f32 Display_FillRect( 75, 130, 100, 100, LCD_COLOR_RED ); 8000f0c: f44f 4378 mov.w r3, #63488 @ 0xf800 8000f10: 9300 str r3, [sp, #0] 8000f12: 2364 movs r3, #100 @ 0x64 8000f14: 2264 movs r2, #100 @ 0x64 8000f16: 2182 movs r1, #130 @ 0x82 8000f18: 204b movs r0, #75 @ 0x4b 8000f1a: f7ff ff16 bl 8000d4a Display_DrawRect( 74, 129, 102, 102, LCD_COLOR_RED ); 8000f1e: f44f 4378 mov.w r3, #63488 @ 0xf800 8000f22: 9300 str r3, [sp, #0] 8000f24: 2366 movs r3, #102 @ 0x66 8000f26: 2266 movs r2, #102 @ 0x66 8000f28: 2181 movs r1, #129 @ 0x81 8000f2a: 204a movs r0, #74 @ 0x4a 8000f2c: f7ff fed4 bl 8000cd8 else { Display_FillRect( 75, 130, 100, 100, LCD_COLOR_BLACK ); Display_DrawRect( 74, 129, 102, 102, LCD_COLOR_RED ); } } 8000f30: e010 b.n 8000f54 Display_FillRect( 75, 130, 100, 100, LCD_COLOR_BLACK ); 8000f32: 2300 movs r3, #0 8000f34: 9300 str r3, [sp, #0] 8000f36: 2364 movs r3, #100 @ 0x64 8000f38: 2264 movs r2, #100 @ 0x64 8000f3a: 2182 movs r1, #130 @ 0x82 8000f3c: 204b movs r0, #75 @ 0x4b 8000f3e: f7ff ff04 bl 8000d4a Display_DrawRect( 74, 129, 102, 102, LCD_COLOR_RED ); 8000f42: f44f 4378 mov.w r3, #63488 @ 0xf800 8000f46: 9300 str r3, [sp, #0] 8000f48: 2366 movs r3, #102 @ 0x66 8000f4a: 2266 movs r2, #102 @ 0x66 8000f4c: 2181 movs r1, #129 @ 0x81 8000f4e: 204a movs r0, #74 @ 0x4a 8000f50: f7ff fec2 bl 8000cd8 } 8000f54: bf00 nop 8000f56: 3708 adds r7, #8 8000f58: 46bd mov sp, r7 8000f5a: bd80 pop {r7, pc} 08000f5c
: /** * @brief The application entry point. * @retval int */ int main(void) { 8000f5c: b5b0 push {r4, r5, r7, lr} 8000f5e: b094 sub sp, #80 @ 0x50 8000f60: af04 add r7, sp, #16 /* USER CODE END 1 */ /* MCU Configuration--------------------------------------------------------*/ /* Reset of all peripherals, Initializes the Flash interface and the Systick. */ HAL_Init(); 8000f62: f001 f902 bl 800216a /* USER CODE BEGIN Init */ /* USER CODE END Init */ /* Configure the system clock */ SystemClock_Config(); 8000f66: f000 f93d bl 80011e4 /* USER CODE BEGIN SysInit */ /* USER CODE END SysInit */ /* Initialize all configured peripherals */ MX_GPIO_Init(); 8000f6a: f000 fa7d bl 8001468 MX_USART6_UART_Init(); 8000f6e: f000 f9e9 bl 8001344 MX_FMC_Init(); 8000f72: f000 fa17 bl 80013a4 MX_I2C3_Init(); 8000f76: f000 f9a5 bl 80012c4 /* USER CODE BEGIN 2 */ Display_Init(); 8000f7a: f7ff ff15 bl 8000da8 // local variables uint32_t timestamp_lastCounted = HAL_GetTick(); 8000f7e: f001 f915 bl 80021ac 8000f82: 63f8 str r0, [r7, #60] @ 0x3c uint32_t timestamp_lastTouchRead = HAL_GetTick(); 8000f84: f001 f912 bl 80021ac 8000f88: 63b8 str r0, [r7, #56] @ 0x38 uint8_t i = 100; 8000f8a: 2364 movs r3, #100 @ 0x64 8000f8c: f887 3037 strb.w r3, [r7, #55] @ 0x37 uint8_t DataRx[4]; uint8_t Eventflag = TOUCH_EVENT_NOT_PRESSED, EventflagLast = TOUCH_EVENT_NOT_PRESSED; 8000f90: 2304 movs r3, #4 8000f92: f887 3036 strb.w r3, [r7, #54] @ 0x36 8000f96: 2304 movs r3, #4 8000f98: f887 3034 strb.w r3, [r7, #52] @ 0x34 int32_t xTouch, yTouch; bool buttonIsPressed; drawButton(false); 8000f9c: 2000 movs r0, #0 8000f9e: f7ff ffad bl 8000efc /* add queues, ... */ /* USER CODE END RTOS_QUEUES */ /* Create the thread(s) */ /* definition and creation of defaultTask */ osThreadDef(defaultTask, StartDefaultTask, osPriorityNormal, 0, 256); 8000fa2: 4b88 ldr r3, [pc, #544] @ (80011c4 ) 8000fa4: 1d3c adds r4, r7, #4 8000fa6: 461d mov r5, r3 8000fa8: cd0f ldmia r5!, {r0, r1, r2, r3} 8000faa: c40f stmia r4!, {r0, r1, r2, r3} 8000fac: e895 0007 ldmia.w r5, {r0, r1, r2} 8000fb0: e884 0007 stmia.w r4, {r0, r1, r2} defaultTaskHandle = osThreadCreate(osThread(defaultTask), NULL); 8000fb4: 1d3b adds r3, r7, #4 8000fb6: 2100 movs r1, #0 8000fb8: 4618 mov r0, r3 8000fba: f004 fa2e bl 800541a 8000fbe: 4603 mov r3, r0 8000fc0: 4a81 ldr r2, [pc, #516] @ (80011c8 ) 8000fc2: 6013 str r3, [r2, #0] /* USER CODE BEGIN RTOS_THREADS */ /* add threads, ... */ /* USER CODE END RTOS_THREADS */ /* Start scheduler */ osKernelStart(); 8000fc4: f004 fa22 bl 800540c /* Infinite loop */ /* USER CODE BEGIN WHILE */ while (1) { // display 100 count down if (time_msPassedSince(timestamp_lastCounted) >= 100) { 8000fc8: 6bf8 ldr r0, [r7, #60] @ 0x3c 8000fca: f7ff ff71 bl 8000eb0 8000fce: 4603 mov r3, r0 8000fd0: 2b63 cmp r3, #99 @ 0x63 8000fd2: d91d bls.n 8001010 timestamp_lastCounted = HAL_GetTick(); 8000fd4: f001 f8ea bl 80021ac 8000fd8: 63f8 str r0, [r7, #60] @ 0x3c Display_Printf( 0, 10, 8000fda: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 8000fde: 9302 str r3, [sp, #8] 8000fe0: 4b7a ldr r3, [pc, #488] @ (80011cc ) 8000fe2: 9301 str r3, [sp, #4] 8000fe4: 4b7a ldr r3, [pc, #488] @ (80011d0 ) 8000fe6: 9300 str r3, [sp, #0] 8000fe8: 2300 movs r3, #0 8000fea: f64f 72ff movw r2, #65535 @ 0xffff 8000fee: 210a movs r1, #10 8000ff0: 2000 movs r0, #0 8000ff2: f7ff fe3f bl 8000c74 LCD_COLOR_WHITE, LCD_COLOR_BLACK, &FontBig, "Zahl %d", i ); if (i == 0) i = 100; 8000ff6: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 8000ffa: 2b00 cmp r3, #0 8000ffc: d103 bne.n 8001006 8000ffe: 2364 movs r3, #100 @ 0x64 8001000: f887 3037 strb.w r3, [r7, #55] @ 0x37 8001004: e004 b.n 8001010 else i--; 8001006: f897 3037 ldrb.w r3, [r7, #55] @ 0x37 800100a: 3b01 subs r3, #1 800100c: f887 3037 strb.w r3, [r7, #55] @ 0x37 } // every 20ms: read touch, print values, convert values, draw pixel, handle button if (time_msPassedSince(timestamp_lastTouchRead) >= 20) { // run this block every 20ms 8001010: 6bb8 ldr r0, [r7, #56] @ 0x38 8001012: f7ff ff4d bl 8000eb0 8001016: 4603 mov r3, r0 8001018: 2b13 cmp r3, #19 800101a: d9d5 bls.n 8000fc8 timestamp_lastTouchRead = HAL_GetTick(); 800101c: f001 f8c6 bl 80021ac 8001020: 63b8 str r0, [r7, #56] @ 0x38 // read touch register HAL_I2C_Mem_Read(I2C3, 112, 3, I2C_MEMADD_SIZE_8BIT, DataRx, 4, 1000); 8001022: f44f 737a mov.w r3, #1000 @ 0x3e8 8001026: 9302 str r3, [sp, #8] 8001028: 2304 movs r3, #4 800102a: 9301 str r3, [sp, #4] 800102c: f107 0320 add.w r3, r7, #32 8001030: 9300 str r3, [sp, #0] 8001032: 2301 movs r3, #1 8001034: 2203 movs r2, #3 8001036: 2170 movs r1, #112 @ 0x70 8001038: 4866 ldr r0, [pc, #408] @ (80011d4 ) 800103a: f001 fc1b bl 8002874 // interpret received data EventflagLast = Eventflag; 800103e: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 8001042: f887 3034 strb.w r3, [r7, #52] @ 0x34 Eventflag = (uint8_t)(DataRx[0] >> 4); 8001046: f897 3020 ldrb.w r3, [r7, #32] 800104a: 091b lsrs r3, r3, #4 800104c: f887 3036 strb.w r3, [r7, #54] @ 0x36 yRaw = (uint16_t)((DataRx[0] & 0b00001111) << 8) | (uint16_t)DataRx[1]; 8001050: f897 3020 ldrb.w r3, [r7, #32] 8001054: b21b sxth r3, r3 8001056: 021b lsls r3, r3, #8 8001058: b21b sxth r3, r3 800105a: f403 6370 and.w r3, r3, #3840 @ 0xf00 800105e: b21a sxth r2, r3 8001060: f897 3021 ldrb.w r3, [r7, #33] @ 0x21 8001064: b21b sxth r3, r3 8001066: 4313 orrs r3, r2 8001068: b21b sxth r3, r3 800106a: 867b strh r3, [r7, #50] @ 0x32 xRaw = (uint16_t)((DataRx[2] & 0b00001111) << 8) | (uint16_t)DataRx[3]; 800106c: f897 3022 ldrb.w r3, [r7, #34] @ 0x22 8001070: b21b sxth r3, r3 8001072: 021b lsls r3, r3, #8 8001074: b21b sxth r3, r3 8001076: f403 6370 and.w r3, r3, #3840 @ 0xf00 800107a: b21a sxth r2, r3 800107c: f897 3023 ldrb.w r3, [r7, #35] @ 0x23 8001080: b21b sxth r3, r3 8001082: 4313 orrs r3, r2 8001084: b21b sxth r3, r3 8001086: 863b strh r3, [r7, #48] @ 0x30 // show pos values on display if (Eventflag == TOUCH_EVENT_IS_PRESSED) printf("is pressed \n"); 8001088: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 800108c: 2b08 cmp r3, #8 800108e: d102 bne.n 8001096 8001090: 4851 ldr r0, [pc, #324] @ (80011d8 ) 8001092: f005 fd6d bl 8006b70 Display_Printf( 0, 30, 8001096: 8e3b ldrh r3, [r7, #48] @ 0x30 8001098: 8e7a ldrh r2, [r7, #50] @ 0x32 800109a: 9203 str r2, [sp, #12] 800109c: 9302 str r3, [sp, #8] 800109e: 4b4f ldr r3, [pc, #316] @ (80011dc ) 80010a0: 9301 str r3, [sp, #4] 80010a2: 4b4b ldr r3, [pc, #300] @ (80011d0 ) 80010a4: 9300 str r3, [sp, #0] 80010a6: 2300 movs r3, #0 80010a8: f64f 72ff movw r2, #65535 @ 0xffff 80010ac: 211e movs r1, #30 80010ae: 2000 movs r0, #0 80010b0: f7ff fde0 bl 8000c74 &FontBig, "x=%d y=%d", xRaw, yRaw ); //scale to display size xTouch = 239 * ((int32_t)xRaw - CAL_TOUCH_TOP_LEFT_X) / ((int32_t)CAL_TOUCH_BOT_RIGHT_X - CAL_TOUCH_TOP_LEFT_X); 80010b4: 8e3a ldrh r2, [r7, #48] @ 0x30 80010b6: 4613 mov r3, r2 80010b8: 011b lsls r3, r3, #4 80010ba: 1a9b subs r3, r3, r2 80010bc: 011b lsls r3, r3, #4 80010be: 1a9b subs r3, r3, r2 80010c0: 4a47 ldr r2, [pc, #284] @ (80011e0 ) 80010c2: fb82 1203 smull r1, r2, r2, r3 80010c6: 1192 asrs r2, r2, #6 80010c8: 17db asrs r3, r3, #31 80010ca: 1ad3 subs r3, r2, r3 80010cc: 62fb str r3, [r7, #44] @ 0x2c yTouch = 239 * ((int32_t)yRaw - CAL_TOUCH_TOP_LEFT_Y) / ((int32_t)CAL_TOUCH_BOT_RIGHT_Y - CAL_TOUCH_TOP_LEFT_Y); 80010ce: 8e7a ldrh r2, [r7, #50] @ 0x32 80010d0: 4613 mov r3, r2 80010d2: 011b lsls r3, r3, #4 80010d4: 1a9b subs r3, r3, r2 80010d6: 011b lsls r3, r3, #4 80010d8: 1a9b subs r3, r3, r2 80010da: 4a41 ldr r2, [pc, #260] @ (80011e0 ) 80010dc: fb82 1203 smull r1, r2, r2, r3 80010e0: 1192 asrs r2, r2, #6 80010e2: 17db asrs r3, r3, #31 80010e4: 1ad3 subs r3, r2, r3 80010e6: 62bb str r3, [r7, #40] @ 0x28 xTouch = clamp_i16(xTouch, 0, 239); 80010e8: 22ef movs r2, #239 @ 0xef 80010ea: 2100 movs r1, #0 80010ec: 6af8 ldr r0, [r7, #44] @ 0x2c 80010ee: f7ff feec bl 8000eca 80010f2: 62f8 str r0, [r7, #44] @ 0x2c yTouch = clamp_i16(yTouch, 0, 239); 80010f4: 22ef movs r2, #239 @ 0xef 80010f6: 2100 movs r1, #0 80010f8: 6ab8 ldr r0, [r7, #40] @ 0x28 80010fa: f7ff fee6 bl 8000eca 80010fe: 62b8 str r0, [r7, #40] @ 0x28 // draw position when pressed if (Eventflag == TOUCH_EVENT_IS_PRESSED){ 8001100: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 8001104: 2b08 cmp r3, #8 8001106: d108 bne.n 800111a Display_DrawPixel( (uint16_t)xTouch, (uint16_t)yTouch, LCD_COLOR_WHITE ); 8001108: 6afb ldr r3, [r7, #44] @ 0x2c 800110a: b29b uxth r3, r3 800110c: 6aba ldr r2, [r7, #40] @ 0x28 800110e: b291 uxth r1, r2 8001110: f64f 72ff movw r2, #65535 @ 0xffff 8001114: 4618 mov r0, r3 8001116: f7ff fd91 bl 8000c3c } // determine button pressed condition bool isInsideButtonArea = xTouch > 75 && xTouch < (75+100) && yTouch > 130 && yTouch < (130+100); 800111a: 6afb ldr r3, [r7, #44] @ 0x2c 800111c: 2b4b cmp r3, #75 @ 0x4b 800111e: dd0a ble.n 8001136 8001120: 6afb ldr r3, [r7, #44] @ 0x2c 8001122: 2bae cmp r3, #174 @ 0xae 8001124: dc07 bgt.n 8001136 8001126: 6abb ldr r3, [r7, #40] @ 0x28 8001128: 2b82 cmp r3, #130 @ 0x82 800112a: dd04 ble.n 8001136 800112c: 6abb ldr r3, [r7, #40] @ 0x28 800112e: 2be5 cmp r3, #229 @ 0xe5 8001130: dc01 bgt.n 8001136 8001132: 2301 movs r3, #1 8001134: e000 b.n 8001138 8001136: 2300 movs r3, #0 8001138: f887 3027 strb.w r3, [r7, #39] @ 0x27 800113c: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8001140: f003 0301 and.w r3, r3, #1 8001144: f887 3027 strb.w r3, [r7, #39] @ 0x27 bool touchIsPressed = Eventflag == TOUCH_EVENT_IS_PRESSED; 8001148: f897 3036 ldrb.w r3, [r7, #54] @ 0x36 800114c: 2b08 cmp r3, #8 800114e: bf0c ite eq 8001150: 2301 moveq r3, #1 8001152: 2300 movne r3, #0 8001154: f887 3026 strb.w r3, [r7, #38] @ 0x26 bool buttonIsPressedLast = buttonIsPressed; 8001158: f897 3035 ldrb.w r3, [r7, #53] @ 0x35 800115c: f887 3025 strb.w r3, [r7, #37] @ 0x25 buttonIsPressed = isInsideButtonArea && touchIsPressed; 8001160: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8001164: 2b00 cmp r3, #0 8001166: d005 beq.n 8001174 8001168: f897 3026 ldrb.w r3, [r7, #38] @ 0x26 800116c: 2b00 cmp r3, #0 800116e: d001 beq.n 8001174 8001170: 2301 movs r3, #1 8001172: e000 b.n 8001176 8001174: 2300 movs r3, #0 8001176: f887 3035 strb.w r3, [r7, #53] @ 0x35 800117a: f897 3035 ldrb.w r3, [r7, #53] @ 0x35 800117e: f003 0301 and.w r3, r3, #1 8001182: f887 3035 strb.w r3, [r7, #53] @ 0x35 // just got pressed -> draw pressed button if (buttonIsPressed && !buttonIsPressedLast) drawButton(true); 8001186: f897 3035 ldrb.w r3, [r7, #53] @ 0x35 800118a: 2b00 cmp r3, #0 800118c: d009 beq.n 80011a2 800118e: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 8001192: f083 0301 eor.w r3, r3, #1 8001196: b2db uxtb r3, r3 8001198: 2b00 cmp r3, #0 800119a: d002 beq.n 80011a2 800119c: 2001 movs r0, #1 800119e: f7ff fead bl 8000efc // just got released -> draw released button if (!buttonIsPressed && buttonIsPressedLast) drawButton(false); 80011a2: f897 3035 ldrb.w r3, [r7, #53] @ 0x35 80011a6: f083 0301 eor.w r3, r3, #1 80011aa: b2db uxtb r3, r3 80011ac: 2b00 cmp r3, #0 80011ae: f43f af0b beq.w 8000fc8 80011b2: f897 3025 ldrb.w r3, [r7, #37] @ 0x25 80011b6: 2b00 cmp r3, #0 80011b8: f43f af06 beq.w 8000fc8 80011bc: 2000 movs r0, #0 80011be: f7ff fe9d bl 8000efc if (time_msPassedSince(timestamp_lastCounted) >= 100) { 80011c2: e701 b.n 8000fc8 80011c4: 08007a94 .word 0x08007a94 80011c8: 200006a4 .word 0x200006a4 80011cc: 08007a68 .word 0x08007a68 80011d0: 20000000 .word 0x20000000 80011d4: 40005c00 .word 0x40005c00 80011d8: 08007a70 .word 0x08007a70 80011dc: 08007a7c .word 0x08007a7c 80011e0: 51eb851f .word 0x51eb851f 080011e4 : /** * @brief System Clock Configuration * @retval None */ void SystemClock_Config(void) { 80011e4: b580 push {r7, lr} 80011e6: b094 sub sp, #80 @ 0x50 80011e8: af00 add r7, sp, #0 RCC_OscInitTypeDef RCC_OscInitStruct = {0}; 80011ea: f107 0320 add.w r3, r7, #32 80011ee: 2230 movs r2, #48 @ 0x30 80011f0: 2100 movs r1, #0 80011f2: 4618 mov r0, r3 80011f4: f005 fdd8 bl 8006da8 RCC_ClkInitTypeDef RCC_ClkInitStruct = {0}; 80011f8: f107 030c add.w r3, r7, #12 80011fc: 2200 movs r2, #0 80011fe: 601a str r2, [r3, #0] 8001200: 605a str r2, [r3, #4] 8001202: 609a str r2, [r3, #8] 8001204: 60da str r2, [r3, #12] 8001206: 611a str r2, [r3, #16] /** Configure LSE Drive Capability */ HAL_PWR_EnableBkUpAccess(); 8001208: f001 ff54 bl 80030b4 /** Configure the main internal regulator output voltage */ __HAL_RCC_PWR_CLK_ENABLE(); 800120c: 4b2b ldr r3, [pc, #172] @ (80012bc ) 800120e: 6c1b ldr r3, [r3, #64] @ 0x40 8001210: 4a2a ldr r2, [pc, #168] @ (80012bc ) 8001212: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8001216: 6413 str r3, [r2, #64] @ 0x40 8001218: 4b28 ldr r3, [pc, #160] @ (80012bc ) 800121a: 6c1b ldr r3, [r3, #64] @ 0x40 800121c: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8001220: 60bb str r3, [r7, #8] 8001222: 68bb ldr r3, [r7, #8] __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1); 8001224: 4b26 ldr r3, [pc, #152] @ (80012c0 ) 8001226: 681b ldr r3, [r3, #0] 8001228: 4a25 ldr r2, [pc, #148] @ (80012c0 ) 800122a: f443 4340 orr.w r3, r3, #49152 @ 0xc000 800122e: 6013 str r3, [r2, #0] 8001230: 4b23 ldr r3, [pc, #140] @ (80012c0 ) 8001232: 681b ldr r3, [r3, #0] 8001234: f403 4340 and.w r3, r3, #49152 @ 0xc000 8001238: 607b str r3, [r7, #4] 800123a: 687b ldr r3, [r7, #4] /** Initializes the RCC Oscillators according to the specified parameters * in the RCC_OscInitTypeDef structure. */ RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE; 800123c: 2301 movs r3, #1 800123e: 623b str r3, [r7, #32] RCC_OscInitStruct.HSEState = RCC_HSE_ON; 8001240: f44f 3380 mov.w r3, #65536 @ 0x10000 8001244: 627b str r3, [r7, #36] @ 0x24 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON; 8001246: 2302 movs r3, #2 8001248: 63bb str r3, [r7, #56] @ 0x38 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE; 800124a: f44f 0380 mov.w r3, #4194304 @ 0x400000 800124e: 63fb str r3, [r7, #60] @ 0x3c RCC_OscInitStruct.PLL.PLLM = 25; 8001250: 2319 movs r3, #25 8001252: 643b str r3, [r7, #64] @ 0x40 RCC_OscInitStruct.PLL.PLLN = 432; 8001254: f44f 73d8 mov.w r3, #432 @ 0x1b0 8001258: 647b str r3, [r7, #68] @ 0x44 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2; 800125a: 2302 movs r3, #2 800125c: 64bb str r3, [r7, #72] @ 0x48 RCC_OscInitStruct.PLL.PLLQ = 9; 800125e: 2309 movs r3, #9 8001260: 64fb str r3, [r7, #76] @ 0x4c if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) 8001262: f107 0320 add.w r3, r7, #32 8001266: 4618 mov r0, r3 8001268: f001 ff84 bl 8003174 800126c: 4603 mov r3, r0 800126e: 2b00 cmp r3, #0 8001270: d001 beq.n 8001276 { Error_Handler(); 8001272: f000 fc7d bl 8001b70 } /** Activate the Over-Drive mode */ if (HAL_PWREx_EnableOverDrive() != HAL_OK) 8001276: f001 ff2d bl 80030d4 800127a: 4603 mov r3, r0 800127c: 2b00 cmp r3, #0 800127e: d001 beq.n 8001284 { Error_Handler(); 8001280: f000 fc76 bl 8001b70 } /** Initializes the CPU, AHB and APB buses clocks */ RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK 8001284: 230f movs r3, #15 8001286: 60fb str r3, [r7, #12] |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2; RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK; 8001288: 2302 movs r3, #2 800128a: 613b str r3, [r7, #16] RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1; 800128c: 2300 movs r3, #0 800128e: 617b str r3, [r7, #20] RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV4; 8001290: f44f 53a0 mov.w r3, #5120 @ 0x1400 8001294: 61bb str r3, [r7, #24] RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV2; 8001296: f44f 5380 mov.w r3, #4096 @ 0x1000 800129a: 61fb str r3, [r7, #28] if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_7) != HAL_OK) 800129c: f107 030c add.w r3, r7, #12 80012a0: 2107 movs r1, #7 80012a2: 4618 mov r0, r3 80012a4: f002 fa0a bl 80036bc 80012a8: 4603 mov r3, r0 80012aa: 2b00 cmp r3, #0 80012ac: d001 beq.n 80012b2 { Error_Handler(); 80012ae: f000 fc5f bl 8001b70 } } 80012b2: bf00 nop 80012b4: 3750 adds r7, #80 @ 0x50 80012b6: 46bd mov sp, r7 80012b8: bd80 pop {r7, pc} 80012ba: bf00 nop 80012bc: 40023800 .word 0x40023800 80012c0: 40007000 .word 0x40007000 080012c4 : * @brief I2C3 Initialization Function * @param None * @retval None */ static void MX_I2C3_Init(void) { 80012c4: b580 push {r7, lr} 80012c6: af00 add r7, sp, #0 /* USER CODE END I2C3_Init 0 */ /* USER CODE BEGIN I2C3_Init 1 */ /* USER CODE END I2C3_Init 1 */ hi2c3.Instance = I2C3; 80012c8: 4b1b ldr r3, [pc, #108] @ (8001338 ) 80012ca: 4a1c ldr r2, [pc, #112] @ (800133c ) 80012cc: 601a str r2, [r3, #0] hi2c3.Init.Timing = 0x6000030D; 80012ce: 4b1a ldr r3, [pc, #104] @ (8001338 ) 80012d0: 4a1b ldr r2, [pc, #108] @ (8001340 ) 80012d2: 605a str r2, [r3, #4] hi2c3.Init.OwnAddress1 = 0; 80012d4: 4b18 ldr r3, [pc, #96] @ (8001338 ) 80012d6: 2200 movs r2, #0 80012d8: 609a str r2, [r3, #8] hi2c3.Init.AddressingMode = I2C_ADDRESSINGMODE_7BIT; 80012da: 4b17 ldr r3, [pc, #92] @ (8001338 ) 80012dc: 2201 movs r2, #1 80012de: 60da str r2, [r3, #12] hi2c3.Init.DualAddressMode = I2C_DUALADDRESS_DISABLE; 80012e0: 4b15 ldr r3, [pc, #84] @ (8001338 ) 80012e2: 2200 movs r2, #0 80012e4: 611a str r2, [r3, #16] hi2c3.Init.OwnAddress2 = 0; 80012e6: 4b14 ldr r3, [pc, #80] @ (8001338 ) 80012e8: 2200 movs r2, #0 80012ea: 615a str r2, [r3, #20] hi2c3.Init.OwnAddress2Masks = I2C_OA2_NOMASK; 80012ec: 4b12 ldr r3, [pc, #72] @ (8001338 ) 80012ee: 2200 movs r2, #0 80012f0: 619a str r2, [r3, #24] hi2c3.Init.GeneralCallMode = I2C_GENERALCALL_DISABLE; 80012f2: 4b11 ldr r3, [pc, #68] @ (8001338 ) 80012f4: 2200 movs r2, #0 80012f6: 61da str r2, [r3, #28] hi2c3.Init.NoStretchMode = I2C_NOSTRETCH_DISABLE; 80012f8: 4b0f ldr r3, [pc, #60] @ (8001338 ) 80012fa: 2200 movs r2, #0 80012fc: 621a str r2, [r3, #32] if (HAL_I2C_Init(&hi2c3) != HAL_OK) 80012fe: 480e ldr r0, [pc, #56] @ (8001338 ) 8001300: f001 fa1c bl 800273c 8001304: 4603 mov r3, r0 8001306: 2b00 cmp r3, #0 8001308: d001 beq.n 800130e { Error_Handler(); 800130a: f000 fc31 bl 8001b70 } /** Configure Analogue filter */ if (HAL_I2CEx_ConfigAnalogFilter(&hi2c3, I2C_ANALOGFILTER_ENABLE) != HAL_OK) 800130e: 2100 movs r1, #0 8001310: 4809 ldr r0, [pc, #36] @ (8001338 ) 8001312: f001 fe37 bl 8002f84 8001316: 4603 mov r3, r0 8001318: 2b00 cmp r3, #0 800131a: d001 beq.n 8001320 { Error_Handler(); 800131c: f000 fc28 bl 8001b70 } /** Configure Digital filter */ if (HAL_I2CEx_ConfigDigitalFilter(&hi2c3, 0) != HAL_OK) 8001320: 2100 movs r1, #0 8001322: 4805 ldr r0, [pc, #20] @ (8001338 ) 8001324: f001 fe79 bl 800301a 8001328: 4603 mov r3, r0 800132a: 2b00 cmp r3, #0 800132c: d001 beq.n 8001332 { Error_Handler(); 800132e: f000 fc1f bl 8001b70 } /* USER CODE BEGIN I2C3_Init 2 */ /* USER CODE END I2C3_Init 2 */ } 8001332: bf00 nop 8001334: bd80 pop {r7, pc} 8001336: bf00 nop 8001338: 2000057c .word 0x2000057c 800133c: 40005c00 .word 0x40005c00 8001340: 6000030d .word 0x6000030d 08001344 : * @brief USART6 Initialization Function * @param None * @retval None */ static void MX_USART6_UART_Init(void) { 8001344: b580 push {r7, lr} 8001346: af00 add r7, sp, #0 /* USER CODE END USART6_Init 0 */ /* USER CODE BEGIN USART6_Init 1 */ /* USER CODE END USART6_Init 1 */ huart6.Instance = USART6; 8001348: 4b14 ldr r3, [pc, #80] @ (800139c ) 800134a: 4a15 ldr r2, [pc, #84] @ (80013a0 ) 800134c: 601a str r2, [r3, #0] huart6.Init.BaudRate = 115200; 800134e: 4b13 ldr r3, [pc, #76] @ (800139c ) 8001350: f44f 32e1 mov.w r2, #115200 @ 0x1c200 8001354: 605a str r2, [r3, #4] huart6.Init.WordLength = UART_WORDLENGTH_8B; 8001356: 4b11 ldr r3, [pc, #68] @ (800139c ) 8001358: 2200 movs r2, #0 800135a: 609a str r2, [r3, #8] huart6.Init.StopBits = UART_STOPBITS_1; 800135c: 4b0f ldr r3, [pc, #60] @ (800139c ) 800135e: 2200 movs r2, #0 8001360: 60da str r2, [r3, #12] huart6.Init.Parity = UART_PARITY_NONE; 8001362: 4b0e ldr r3, [pc, #56] @ (800139c ) 8001364: 2200 movs r2, #0 8001366: 611a str r2, [r3, #16] huart6.Init.Mode = UART_MODE_TX_RX; 8001368: 4b0c ldr r3, [pc, #48] @ (800139c ) 800136a: 220c movs r2, #12 800136c: 615a str r2, [r3, #20] huart6.Init.HwFlowCtl = UART_HWCONTROL_NONE; 800136e: 4b0b ldr r3, [pc, #44] @ (800139c ) 8001370: 2200 movs r2, #0 8001372: 619a str r2, [r3, #24] huart6.Init.OverSampling = UART_OVERSAMPLING_16; 8001374: 4b09 ldr r3, [pc, #36] @ (800139c ) 8001376: 2200 movs r2, #0 8001378: 61da str r2, [r3, #28] huart6.Init.OneBitSampling = UART_ONE_BIT_SAMPLE_DISABLE; 800137a: 4b08 ldr r3, [pc, #32] @ (800139c ) 800137c: 2200 movs r2, #0 800137e: 621a str r2, [r3, #32] huart6.AdvancedInit.AdvFeatureInit = UART_ADVFEATURE_NO_INIT; 8001380: 4b06 ldr r3, [pc, #24] @ (800139c ) 8001382: 2200 movs r2, #0 8001384: 625a str r2, [r3, #36] @ 0x24 if (HAL_UART_Init(&huart6) != HAL_OK) 8001386: 4805 ldr r0, [pc, #20] @ (800139c ) 8001388: f003 fa10 bl 80047ac 800138c: 4603 mov r3, r0 800138e: 2b00 cmp r3, #0 8001390: d001 beq.n 8001396 { Error_Handler(); 8001392: f000 fbed bl 8001b70 } /* USER CODE BEGIN USART6_Init 2 */ /* USER CODE END USART6_Init 2 */ } 8001396: bf00 nop 8001398: bd80 pop {r7, pc} 800139a: bf00 nop 800139c: 200005d0 .word 0x200005d0 80013a0: 40011400 .word 0x40011400 080013a4 : /* FMC initialization function */ static void MX_FMC_Init(void) { 80013a4: b580 push {r7, lr} 80013a6: b088 sub sp, #32 80013a8: af00 add r7, sp, #0 /* USER CODE BEGIN FMC_Init 0 */ /* USER CODE END FMC_Init 0 */ FMC_NORSRAM_TimingTypeDef Timing = {0}; 80013aa: 1d3b adds r3, r7, #4 80013ac: 2200 movs r2, #0 80013ae: 601a str r2, [r3, #0] 80013b0: 605a str r2, [r3, #4] 80013b2: 609a str r2, [r3, #8] 80013b4: 60da str r2, [r3, #12] 80013b6: 611a str r2, [r3, #16] 80013b8: 615a str r2, [r3, #20] 80013ba: 619a str r2, [r3, #24] /* USER CODE END FMC_Init 1 */ /** Perform the SRAM2 memory initialization sequence */ hsram2.Instance = FMC_NORSRAM_DEVICE; 80013bc: 4b28 ldr r3, [pc, #160] @ (8001460 ) 80013be: f04f 4220 mov.w r2, #2684354560 @ 0xa0000000 80013c2: 601a str r2, [r3, #0] hsram2.Extended = FMC_NORSRAM_EXTENDED_DEVICE; 80013c4: 4b26 ldr r3, [pc, #152] @ (8001460 ) 80013c6: 4a27 ldr r2, [pc, #156] @ (8001464 ) 80013c8: 605a str r2, [r3, #4] /* hsram2.Init */ hsram2.Init.NSBank = FMC_NORSRAM_BANK2; 80013ca: 4b25 ldr r3, [pc, #148] @ (8001460 ) 80013cc: 2202 movs r2, #2 80013ce: 609a str r2, [r3, #8] hsram2.Init.DataAddressMux = FMC_DATA_ADDRESS_MUX_DISABLE; 80013d0: 4b23 ldr r3, [pc, #140] @ (8001460 ) 80013d2: 2200 movs r2, #0 80013d4: 60da str r2, [r3, #12] hsram2.Init.MemoryType = FMC_MEMORY_TYPE_SRAM; 80013d6: 4b22 ldr r3, [pc, #136] @ (8001460 ) 80013d8: 2200 movs r2, #0 80013da: 611a str r2, [r3, #16] hsram2.Init.MemoryDataWidth = FMC_NORSRAM_MEM_BUS_WIDTH_16; 80013dc: 4b20 ldr r3, [pc, #128] @ (8001460 ) 80013de: 2210 movs r2, #16 80013e0: 615a str r2, [r3, #20] hsram2.Init.BurstAccessMode = FMC_BURST_ACCESS_MODE_DISABLE; 80013e2: 4b1f ldr r3, [pc, #124] @ (8001460 ) 80013e4: 2200 movs r2, #0 80013e6: 619a str r2, [r3, #24] hsram2.Init.WaitSignalPolarity = FMC_WAIT_SIGNAL_POLARITY_LOW; 80013e8: 4b1d ldr r3, [pc, #116] @ (8001460 ) 80013ea: 2200 movs r2, #0 80013ec: 61da str r2, [r3, #28] hsram2.Init.WaitSignalActive = FMC_WAIT_TIMING_BEFORE_WS; 80013ee: 4b1c ldr r3, [pc, #112] @ (8001460 ) 80013f0: 2200 movs r2, #0 80013f2: 621a str r2, [r3, #32] hsram2.Init.WriteOperation = FMC_WRITE_OPERATION_ENABLE; 80013f4: 4b1a ldr r3, [pc, #104] @ (8001460 ) 80013f6: f44f 5280 mov.w r2, #4096 @ 0x1000 80013fa: 625a str r2, [r3, #36] @ 0x24 hsram2.Init.WaitSignal = FMC_WAIT_SIGNAL_DISABLE; 80013fc: 4b18 ldr r3, [pc, #96] @ (8001460 ) 80013fe: 2200 movs r2, #0 8001400: 629a str r2, [r3, #40] @ 0x28 hsram2.Init.ExtendedMode = FMC_EXTENDED_MODE_DISABLE; 8001402: 4b17 ldr r3, [pc, #92] @ (8001460 ) 8001404: 2200 movs r2, #0 8001406: 62da str r2, [r3, #44] @ 0x2c hsram2.Init.AsynchronousWait = FMC_ASYNCHRONOUS_WAIT_DISABLE; 8001408: 4b15 ldr r3, [pc, #84] @ (8001460 ) 800140a: 2200 movs r2, #0 800140c: 631a str r2, [r3, #48] @ 0x30 hsram2.Init.WriteBurst = FMC_WRITE_BURST_DISABLE; 800140e: 4b14 ldr r3, [pc, #80] @ (8001460 ) 8001410: 2200 movs r2, #0 8001412: 635a str r2, [r3, #52] @ 0x34 hsram2.Init.ContinuousClock = FMC_CONTINUOUS_CLOCK_SYNC_ONLY; 8001414: 4b12 ldr r3, [pc, #72] @ (8001460 ) 8001416: 2200 movs r2, #0 8001418: 639a str r2, [r3, #56] @ 0x38 hsram2.Init.WriteFifo = FMC_WRITE_FIFO_ENABLE; 800141a: 4b11 ldr r3, [pc, #68] @ (8001460 ) 800141c: 2200 movs r2, #0 800141e: 63da str r2, [r3, #60] @ 0x3c hsram2.Init.PageSize = FMC_PAGE_SIZE_NONE; 8001420: 4b0f ldr r3, [pc, #60] @ (8001460 ) 8001422: 2200 movs r2, #0 8001424: 641a str r2, [r3, #64] @ 0x40 /* Timing */ Timing.AddressSetupTime = 15; 8001426: 230f movs r3, #15 8001428: 607b str r3, [r7, #4] Timing.AddressHoldTime = 15; 800142a: 230f movs r3, #15 800142c: 60bb str r3, [r7, #8] Timing.DataSetupTime = 255; 800142e: 23ff movs r3, #255 @ 0xff 8001430: 60fb str r3, [r7, #12] Timing.BusTurnAroundDuration = 15; 8001432: 230f movs r3, #15 8001434: 613b str r3, [r7, #16] Timing.CLKDivision = 16; 8001436: 2310 movs r3, #16 8001438: 617b str r3, [r7, #20] Timing.DataLatency = 17; 800143a: 2311 movs r3, #17 800143c: 61bb str r3, [r7, #24] Timing.AccessMode = FMC_ACCESS_MODE_A; 800143e: 2300 movs r3, #0 8001440: 61fb str r3, [r7, #28] /* ExtTiming */ if (HAL_SRAM_Init(&hsram2, &Timing, NULL) != HAL_OK) 8001442: 1d3b adds r3, r7, #4 8001444: 2200 movs r2, #0 8001446: 4619 mov r1, r3 8001448: 4805 ldr r0, [pc, #20] @ (8001460 ) 800144a: f002 fe99 bl 8004180 800144e: 4603 mov r3, r0 8001450: 2b00 cmp r3, #0 8001452: d001 beq.n 8001458 { Error_Handler( ); 8001454: f000 fb8c bl 8001b70 } /* USER CODE BEGIN FMC_Init 2 */ /* USER CODE END FMC_Init 2 */ } 8001458: bf00 nop 800145a: 3720 adds r7, #32 800145c: 46bd mov sp, r7 800145e: bd80 pop {r7, pc} 8001460: 20000658 .word 0x20000658 8001464: a0000104 .word 0xa0000104 08001468 : * @brief GPIO Initialization Function * @param None * @retval None */ static void MX_GPIO_Init(void) { 8001468: b580 push {r7, lr} 800146a: b08e sub sp, #56 @ 0x38 800146c: af00 add r7, sp, #0 GPIO_InitTypeDef GPIO_InitStruct = {0}; 800146e: f107 0324 add.w r3, r7, #36 @ 0x24 8001472: 2200 movs r2, #0 8001474: 601a str r2, [r3, #0] 8001476: 605a str r2, [r3, #4] 8001478: 609a str r2, [r3, #8] 800147a: 60da str r2, [r3, #12] 800147c: 611a str r2, [r3, #16] /* USER CODE BEGIN MX_GPIO_Init_1 */ /* USER CODE END MX_GPIO_Init_1 */ /* GPIO Ports Clock Enable */ __HAL_RCC_GPIOE_CLK_ENABLE(); 800147e: 4bb3 ldr r3, [pc, #716] @ (800174c ) 8001480: 6b1b ldr r3, [r3, #48] @ 0x30 8001482: 4ab2 ldr r2, [pc, #712] @ (800174c ) 8001484: f043 0310 orr.w r3, r3, #16 8001488: 6313 str r3, [r2, #48] @ 0x30 800148a: 4bb0 ldr r3, [pc, #704] @ (800174c ) 800148c: 6b1b ldr r3, [r3, #48] @ 0x30 800148e: f003 0310 and.w r3, r3, #16 8001492: 623b str r3, [r7, #32] 8001494: 6a3b ldr r3, [r7, #32] __HAL_RCC_GPIOB_CLK_ENABLE(); 8001496: 4bad ldr r3, [pc, #692] @ (800174c ) 8001498: 6b1b ldr r3, [r3, #48] @ 0x30 800149a: 4aac ldr r2, [pc, #688] @ (800174c ) 800149c: f043 0302 orr.w r3, r3, #2 80014a0: 6313 str r3, [r2, #48] @ 0x30 80014a2: 4baa ldr r3, [pc, #680] @ (800174c ) 80014a4: 6b1b ldr r3, [r3, #48] @ 0x30 80014a6: f003 0302 and.w r3, r3, #2 80014aa: 61fb str r3, [r7, #28] 80014ac: 69fb ldr r3, [r7, #28] __HAL_RCC_GPIOG_CLK_ENABLE(); 80014ae: 4ba7 ldr r3, [pc, #668] @ (800174c ) 80014b0: 6b1b ldr r3, [r3, #48] @ 0x30 80014b2: 4aa6 ldr r2, [pc, #664] @ (800174c ) 80014b4: f043 0340 orr.w r3, r3, #64 @ 0x40 80014b8: 6313 str r3, [r2, #48] @ 0x30 80014ba: 4ba4 ldr r3, [pc, #656] @ (800174c ) 80014bc: 6b1b ldr r3, [r3, #48] @ 0x30 80014be: f003 0340 and.w r3, r3, #64 @ 0x40 80014c2: 61bb str r3, [r7, #24] 80014c4: 69bb ldr r3, [r7, #24] __HAL_RCC_GPIOD_CLK_ENABLE(); 80014c6: 4ba1 ldr r3, [pc, #644] @ (800174c ) 80014c8: 6b1b ldr r3, [r3, #48] @ 0x30 80014ca: 4aa0 ldr r2, [pc, #640] @ (800174c ) 80014cc: f043 0308 orr.w r3, r3, #8 80014d0: 6313 str r3, [r2, #48] @ 0x30 80014d2: 4b9e ldr r3, [pc, #632] @ (800174c ) 80014d4: 6b1b ldr r3, [r3, #48] @ 0x30 80014d6: f003 0308 and.w r3, r3, #8 80014da: 617b str r3, [r7, #20] 80014dc: 697b ldr r3, [r7, #20] __HAL_RCC_GPIOC_CLK_ENABLE(); 80014de: 4b9b ldr r3, [pc, #620] @ (800174c ) 80014e0: 6b1b ldr r3, [r3, #48] @ 0x30 80014e2: 4a9a ldr r2, [pc, #616] @ (800174c ) 80014e4: f043 0304 orr.w r3, r3, #4 80014e8: 6313 str r3, [r2, #48] @ 0x30 80014ea: 4b98 ldr r3, [pc, #608] @ (800174c ) 80014ec: 6b1b ldr r3, [r3, #48] @ 0x30 80014ee: f003 0304 and.w r3, r3, #4 80014f2: 613b str r3, [r7, #16] 80014f4: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOA_CLK_ENABLE(); 80014f6: 4b95 ldr r3, [pc, #596] @ (800174c ) 80014f8: 6b1b ldr r3, [r3, #48] @ 0x30 80014fa: 4a94 ldr r2, [pc, #592] @ (800174c ) 80014fc: f043 0301 orr.w r3, r3, #1 8001500: 6313 str r3, [r2, #48] @ 0x30 8001502: 4b92 ldr r3, [pc, #584] @ (800174c ) 8001504: 6b1b ldr r3, [r3, #48] @ 0x30 8001506: f003 0301 and.w r3, r3, #1 800150a: 60fb str r3, [r7, #12] 800150c: 68fb ldr r3, [r7, #12] __HAL_RCC_GPIOI_CLK_ENABLE(); 800150e: 4b8f ldr r3, [pc, #572] @ (800174c ) 8001510: 6b1b ldr r3, [r3, #48] @ 0x30 8001512: 4a8e ldr r2, [pc, #568] @ (800174c ) 8001514: f443 7380 orr.w r3, r3, #256 @ 0x100 8001518: 6313 str r3, [r2, #48] @ 0x30 800151a: 4b8c ldr r3, [pc, #560] @ (800174c ) 800151c: 6b1b ldr r3, [r3, #48] @ 0x30 800151e: f403 7380 and.w r3, r3, #256 @ 0x100 8001522: 60bb str r3, [r7, #8] 8001524: 68bb ldr r3, [r7, #8] __HAL_RCC_GPIOH_CLK_ENABLE(); 8001526: 4b89 ldr r3, [pc, #548] @ (800174c ) 8001528: 6b1b ldr r3, [r3, #48] @ 0x30 800152a: 4a88 ldr r2, [pc, #544] @ (800174c ) 800152c: f043 0380 orr.w r3, r3, #128 @ 0x80 8001530: 6313 str r3, [r2, #48] @ 0x30 8001532: 4b86 ldr r3, [pc, #536] @ (800174c ) 8001534: 6b1b ldr r3, [r3, #48] @ 0x30 8001536: f003 0380 and.w r3, r3, #128 @ 0x80 800153a: 607b str r3, [r7, #4] 800153c: 687b ldr r3, [r7, #4] __HAL_RCC_GPIOF_CLK_ENABLE(); 800153e: 4b83 ldr r3, [pc, #524] @ (800174c ) 8001540: 6b1b ldr r3, [r3, #48] @ 0x30 8001542: 4a82 ldr r2, [pc, #520] @ (800174c ) 8001544: f043 0320 orr.w r3, r3, #32 8001548: 6313 str r3, [r2, #48] @ 0x30 800154a: 4b80 ldr r3, [pc, #512] @ (800174c ) 800154c: 6b1b ldr r3, [r3, #48] @ 0x30 800154e: f003 0320 and.w r3, r3, #32 8001552: 603b str r3, [r7, #0] 8001554: 683b ldr r3, [r7, #0] /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOE, ARD_D7_GPIO_Pin|ARD_D8_GPIO_Pin, GPIO_PIN_RESET); 8001556: 2200 movs r2, #0 8001558: 2118 movs r1, #24 800155a: 487d ldr r0, [pc, #500] @ (8001750 ) 800155c: f001 f8d4 bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOG, WIFI_RST_Pin|WIFI_GPIO_0_Pin|PMOD_GPIO_0_Pin|USB_OTGFS_PPWR_EN_Pin, GPIO_PIN_RESET); 8001560: 2200 movs r2, #0 8001562: f44f 41e2 mov.w r1, #28928 @ 0x7100 8001566: 487b ldr r0, [pc, #492] @ (8001754 ) 8001568: f001 f8ce bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOD, WIFI_GPIO_2_Pin|WIFI_CH_PD_Pin, GPIO_PIN_RESET); 800156c: 2200 movs r2, #0 800156e: 2148 movs r1, #72 @ 0x48 8001570: 4879 ldr r0, [pc, #484] @ (8001758 ) 8001572: f001 f8c9 bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOC, STMOD_UART4_RXD_s_Pin|ARD_D2_GPIO_Pin, GPIO_PIN_RESET); 8001576: 2200 movs r2, #0 8001578: f44f 6102 mov.w r1, #2080 @ 0x820 800157c: 4877 ldr r0, [pc, #476] @ (800175c ) 800157e: f001 f8c3 bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOI, PMOD_SPI2_MOSI_Pin|PMOD_SPI2_MISO_Pin|GPIO_PIN_10, GPIO_PIN_RESET); 8001582: 2200 movs r2, #0 8001584: f240 410c movw r1, #1036 @ 0x40c 8001588: 4875 ldr r0, [pc, #468] @ (8001760 ) 800158a: f001 f8bd bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOH, PMOD_SEL_0_Pin|CTP_RST_Pin, GPIO_PIN_SET); 800158e: 2201 movs r2, #1 8001590: f44f 4102 mov.w r1, #33280 @ 0x8200 8001594: 4873 ldr r0, [pc, #460] @ (8001764 ) 8001596: f001 f8b7 bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOA, USB_OTG_FS_ID_Pin|GPIO_PIN_5|SYS_LD_USER1_Pin, GPIO_PIN_RESET); 800159a: 2200 movs r2, #0 800159c: f44f 6194 mov.w r1, #1184 @ 0x4a0 80015a0: 4871 ldr r0, [pc, #452] @ (8001768 ) 80015a2: f001 f8b1 bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOH, PMOD_GPIO_1_Pin|ARD_D4_GPIO_Pin|USB_OTGHS_PPWR_EN_Pin|LCD_RST_Pin, GPIO_PIN_RESET); 80015a6: 2200 movs r2, #0 80015a8: f241 018c movw r1, #4236 @ 0x108c 80015ac: 486d ldr r0, [pc, #436] @ (8001764 ) 80015ae: f001 f8ab bl 8002708 /*Configure GPIO pin Output Level */ HAL_GPIO_WritePin(GPIOB, USB_OTG_HS_ID_Pin|SYS_LD_USER2_Pin, GPIO_PIN_RESET); 80015b2: 2200 movs r2, #0 80015b4: f241 0102 movw r1, #4098 @ 0x1002 80015b8: 486c ldr r0, [pc, #432] @ (800176c ) 80015ba: f001 f8a5 bl 8002708 /*Configure GPIO pins : ARD_D7_GPIO_Pin ARD_D8_GPIO_Pin */ GPIO_InitStruct.Pin = ARD_D7_GPIO_Pin|ARD_D8_GPIO_Pin; 80015be: 2318 movs r3, #24 80015c0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80015c2: 2301 movs r3, #1 80015c4: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80015c6: 2300 movs r3, #0 80015c8: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80015ca: 2300 movs r3, #0 80015cc: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80015ce: f107 0324 add.w r3, r7, #36 @ 0x24 80015d2: 4619 mov r1, r3 80015d4: 485e ldr r0, [pc, #376] @ (8001750 ) 80015d6: f000 fefb bl 80023d0 /*Configure GPIO pin : QSPI_D2_Pin */ GPIO_InitStruct.Pin = QSPI_D2_Pin; 80015da: 2304 movs r3, #4 80015dc: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80015de: 2302 movs r3, #2 80015e0: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80015e2: 2300 movs r3, #0 80015e4: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80015e6: 2303 movs r3, #3 80015e8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; 80015ea: 2309 movs r3, #9 80015ec: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(QSPI_D2_GPIO_Port, &GPIO_InitStruct); 80015ee: f107 0324 add.w r3, r7, #36 @ 0x24 80015f2: 4619 mov r1, r3 80015f4: 4856 ldr r0, [pc, #344] @ (8001750 ) 80015f6: f000 feeb bl 80023d0 /*Configure GPIO pins : SAI2_I2C1_SCL_Pin SAI2_I2C1_SDA_Pin */ GPIO_InitStruct.Pin = SAI2_I2C1_SCL_Pin|SAI2_I2C1_SDA_Pin; 80015fa: f44f 7340 mov.w r3, #768 @ 0x300 80015fe: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8001600: 2312 movs r3, #18 8001602: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001604: 2300 movs r3, #0 8001606: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001608: 2303 movs r3, #3 800160a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF4_I2C1; 800160c: 2304 movs r3, #4 800160e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001610: f107 0324 add.w r3, r7, #36 @ 0x24 8001614: 4619 mov r1, r3 8001616: 4855 ldr r0, [pc, #340] @ (800176c ) 8001618: f000 feda bl 80023d0 /*Configure GPIO pins : ARD_D11_TIM3_CH2_SPI1_MOSI_Pin ARD_D12_SPI1_MISO_Pin */ GPIO_InitStruct.Pin = ARD_D11_TIM3_CH2_SPI1_MOSI_Pin|ARD_D12_SPI1_MISO_Pin; 800161c: 2330 movs r3, #48 @ 0x30 800161e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001620: 2302 movs r3, #2 8001622: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001624: 2300 movs r3, #0 8001626: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001628: 2303 movs r3, #3 800162a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF5_SPI1; 800162c: 2305 movs r3, #5 800162e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001630: f107 0324 add.w r3, r7, #36 @ 0x24 8001634: 4619 mov r1, r3 8001636: 484d ldr r0, [pc, #308] @ (800176c ) 8001638: f000 feca bl 80023d0 /*Configure GPIO pins : WIFI_RST_Pin WIFI_GPIO_0_Pin PMOD_GPIO_0_Pin USB_OTGFS_PPWR_EN_Pin */ GPIO_InitStruct.Pin = WIFI_RST_Pin|WIFI_GPIO_0_Pin|PMOD_GPIO_0_Pin|USB_OTGFS_PPWR_EN_Pin; 800163c: f44f 43e2 mov.w r3, #28928 @ 0x7100 8001640: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001642: 2301 movs r3, #1 8001644: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001646: 2300 movs r3, #0 8001648: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800164a: 2300 movs r3, #0 800164c: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 800164e: f107 0324 add.w r3, r7, #36 @ 0x24 8001652: 4619 mov r1, r3 8001654: 483f ldr r0, [pc, #252] @ (8001754 ) 8001656: f000 febb bl 80023d0 /*Configure GPIO pin : UART_TXD_WIFI_RX_Pin */ GPIO_InitStruct.Pin = UART_TXD_WIFI_RX_Pin; 800165a: f44f 5380 mov.w r3, #4096 @ 0x1000 800165e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001660: 2302 movs r3, #2 8001662: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001664: 2300 movs r3, #0 8001666: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001668: 2303 movs r3, #3 800166a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 800166c: 2308 movs r3, #8 800166e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(UART_TXD_WIFI_RX_GPIO_Port, &GPIO_InitStruct); 8001670: f107 0324 add.w r3, r7, #36 @ 0x24 8001674: 4619 mov r1, r3 8001676: 4839 ldr r0, [pc, #228] @ (800175c ) 8001678: f000 feaa bl 80023d0 /*Configure GPIO pins : STMOD_TIM2_CH1_2_ETR_Pin ARD_D10_TIM2_CH2_SPI1_NSS_Pin */ GPIO_InitStruct.Pin = STMOD_TIM2_CH1_2_ETR_Pin|ARD_D10_TIM2_CH2_SPI1_NSS_Pin; 800167c: f248 0302 movw r3, #32770 @ 0x8002 8001680: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001682: 2302 movs r3, #2 8001684: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001686: 2300 movs r3, #0 8001688: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800168a: 2300 movs r3, #0 800168c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF1_TIM2; 800168e: 2301 movs r3, #1 8001690: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001692: f107 0324 add.w r3, r7, #36 @ 0x24 8001696: 4619 mov r1, r3 8001698: 4833 ldr r0, [pc, #204] @ (8001768 ) 800169a: f000 fe99 bl 80023d0 /*Configure GPIO pins : ARD_D3_TIM9_CH1_Pin ARD_D6_TIM9_CH2_Pin */ GPIO_InitStruct.Pin = ARD_D3_TIM9_CH1_Pin|ARD_D6_TIM9_CH2_Pin; 800169e: 2360 movs r3, #96 @ 0x60 80016a0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80016a2: 2302 movs r3, #2 80016a4: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80016a6: 2300 movs r3, #0 80016a8: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80016aa: 2300 movs r3, #0 80016ac: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF3_TIM9; 80016ae: 2303 movs r3, #3 80016b0: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 80016b2: f107 0324 add.w r3, r7, #36 @ 0x24 80016b6: 4619 mov r1, r3 80016b8: 4825 ldr r0, [pc, #148] @ (8001750 ) 80016ba: f000 fe89 bl 80023d0 /*Configure GPIO pin : QSPI_NCS_Pin */ GPIO_InitStruct.Pin = QSPI_NCS_Pin; 80016be: 2340 movs r3, #64 @ 0x40 80016c0: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80016c2: 2302 movs r3, #2 80016c4: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80016c6: 2300 movs r3, #0 80016c8: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80016ca: 2303 movs r3, #3 80016cc: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF10_QUADSPI; 80016ce: 230a movs r3, #10 80016d0: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(QSPI_NCS_GPIO_Port, &GPIO_InitStruct); 80016d2: f107 0324 add.w r3, r7, #36 @ 0x24 80016d6: 4619 mov r1, r3 80016d8: 4824 ldr r0, [pc, #144] @ (800176c ) 80016da: f000 fe79 bl 80023d0 /*Configure GPIO pin : SAI2_INT_Pin */ GPIO_InitStruct.Pin = SAI2_INT_Pin; 80016de: f44f 4300 mov.w r3, #32768 @ 0x8000 80016e2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 80016e4: f44f 1388 mov.w r3, #1114112 @ 0x110000 80016e8: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80016ea: 2300 movs r3, #0 80016ec: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(SAI2_INT_GPIO_Port, &GPIO_InitStruct); 80016ee: f107 0324 add.w r3, r7, #36 @ 0x24 80016f2: 4619 mov r1, r3 80016f4: 4817 ldr r0, [pc, #92] @ (8001754 ) 80016f6: f000 fe6b bl 80023d0 /*Configure GPIO pin : SAI2_SD_B_Pin */ GPIO_InitStruct.Pin = SAI2_SD_B_Pin; 80016fa: f44f 6380 mov.w r3, #1024 @ 0x400 80016fe: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001700: 2302 movs r3, #2 8001702: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001704: 2300 movs r3, #0 8001706: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001708: 2300 movs r3, #0 800170a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF10_SAI2; 800170c: 230a movs r3, #10 800170e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(SAI2_SD_B_GPIO_Port, &GPIO_InitStruct); 8001710: f107 0324 add.w r3, r7, #36 @ 0x24 8001714: 4619 mov r1, r3 8001716: 480f ldr r0, [pc, #60] @ (8001754 ) 8001718: f000 fe5a bl 80023d0 /*Configure GPIO pins : WIFI_GPIO_2_Pin WIFI_CH_PD_Pin */ GPIO_InitStruct.Pin = WIFI_GPIO_2_Pin|WIFI_CH_PD_Pin; 800171c: 2348 movs r3, #72 @ 0x48 800171e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001720: 2301 movs r3, #1 8001722: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001724: 2300 movs r3, #0 8001726: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001728: 2300 movs r3, #0 800172a: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 800172c: f107 0324 add.w r3, r7, #36 @ 0x24 8001730: 4619 mov r1, r3 8001732: 4809 ldr r0, [pc, #36] @ (8001758 ) 8001734: f000 fe4c bl 80023d0 /*Configure GPIO pins : STMOD_UART4_RXD_s_Pin ARD_D2_GPIO_Pin */ GPIO_InitStruct.Pin = STMOD_UART4_RXD_s_Pin|ARD_D2_GPIO_Pin; 8001738: f44f 6302 mov.w r3, #2080 @ 0x820 800173c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 800173e: 2301 movs r3, #1 8001740: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001742: 2300 movs r3, #0 8001744: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001746: 2300 movs r3, #0 8001748: e012 b.n 8001770 800174a: bf00 nop 800174c: 40023800 .word 0x40023800 8001750: 40021000 .word 0x40021000 8001754: 40021800 .word 0x40021800 8001758: 40020c00 .word 0x40020c00 800175c: 40020800 .word 0x40020800 8001760: 40022000 .word 0x40022000 8001764: 40021c00 .word 0x40021c00 8001768: 40020000 .word 0x40020000 800176c: 40020400 .word 0x40020400 8001770: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001772: f107 0324 add.w r3, r7, #36 @ 0x24 8001776: 4619 mov r1, r3 8001778: 48bc ldr r0, [pc, #752] @ (8001a6c ) 800177a: f000 fe29 bl 80023d0 /*Configure GPIO pins : QSPI_D1_Pin QSPI_D0_Pin */ GPIO_InitStruct.Pin = QSPI_D1_Pin|QSPI_D0_Pin; 800177e: f44f 63c0 mov.w r3, #1536 @ 0x600 8001782: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001784: 2302 movs r3, #2 8001786: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001788: 2300 movs r3, #0 800178a: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800178c: 2303 movs r3, #3 800178e: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; 8001790: 2309 movs r3, #9 8001792: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001794: f107 0324 add.w r3, r7, #36 @ 0x24 8001798: 4619 mov r1, r3 800179a: 48b4 ldr r0, [pc, #720] @ (8001a6c ) 800179c: f000 fe18 bl 80023d0 /*Configure GPIO pins : PA12 PA11 */ GPIO_InitStruct.Pin = GPIO_PIN_12|GPIO_PIN_11; 80017a0: f44f 53c0 mov.w r3, #6144 @ 0x1800 80017a4: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80017a6: 2302 movs r3, #2 80017a8: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80017aa: 2300 movs r3, #0 80017ac: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80017ae: 2303 movs r3, #3 80017b0: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF10_OTG_FS; 80017b2: 230a movs r3, #10 80017b4: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80017b6: f107 0324 add.w r3, r7, #36 @ 0x24 80017ba: 4619 mov r1, r3 80017bc: 48ac ldr r0, [pc, #688] @ (8001a70 ) 80017be: f000 fe07 bl 80023d0 /*Configure GPIO pins : SAI2_FS_A_Pin SAI2_SD_A_Pin SAI2_SCK_A_Pin SAI2_MCLK_A_Pin */ GPIO_InitStruct.Pin = SAI2_FS_A_Pin|SAI2_SD_A_Pin|SAI2_SCK_A_Pin|SAI2_MCLK_A_Pin; 80017c2: 23f0 movs r3, #240 @ 0xf0 80017c4: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80017c6: 2302 movs r3, #2 80017c8: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80017ca: 2300 movs r3, #0 80017cc: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80017ce: 2300 movs r3, #0 80017d0: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF10_SAI2; 80017d2: 230a movs r3, #10 80017d4: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); 80017d6: f107 0324 add.w r3, r7, #36 @ 0x24 80017da: 4619 mov r1, r3 80017dc: 48a5 ldr r0, [pc, #660] @ (8001a74 ) 80017de: f000 fdf7 bl 80023d0 /*Configure GPIO pins : PMOD_SPI2_MOSI_Pin PMOD_SPI2_MISO_Pin PI10 */ GPIO_InitStruct.Pin = PMOD_SPI2_MOSI_Pin|PMOD_SPI2_MISO_Pin|GPIO_PIN_10; 80017e2: f240 430c movw r3, #1036 @ 0x40c 80017e6: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 80017e8: 2301 movs r3, #1 80017ea: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80017ec: 2300 movs r3, #0 80017ee: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80017f0: 2300 movs r3, #0 80017f2: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); 80017f4: f107 0324 add.w r3, r7, #36 @ 0x24 80017f8: 4619 mov r1, r3 80017fa: 489e ldr r0, [pc, #632] @ (8001a74 ) 80017fc: f000 fde8 bl 80023d0 /*Configure GPIO pin : CTP_INT_Pin */ GPIO_InitStruct.Pin = CTP_INT_Pin; 8001800: f44f 7300 mov.w r3, #512 @ 0x200 8001804: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8001806: f44f 1388 mov.w r3, #1114112 @ 0x110000 800180a: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 800180c: 2300 movs r3, #0 800180e: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(CTP_INT_GPIO_Port, &GPIO_InitStruct); 8001810: f107 0324 add.w r3, r7, #36 @ 0x24 8001814: 4619 mov r1, r3 8001816: 4897 ldr r0, [pc, #604] @ (8001a74 ) 8001818: f000 fdda bl 80023d0 /*Configure GPIO pin : UART_RXD_WIFI_TX_Pin */ GPIO_InitStruct.Pin = UART_RXD_WIFI_TX_Pin; 800181c: 2304 movs r3, #4 800181e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001820: 2302 movs r3, #2 8001822: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001824: 2300 movs r3, #0 8001826: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001828: 2303 movs r3, #3 800182a: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF8_UART5; 800182c: 2308 movs r3, #8 800182e: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(UART_RXD_WIFI_TX_GPIO_Port, &GPIO_InitStruct); 8001830: f107 0324 add.w r3, r7, #36 @ 0x24 8001834: 4619 mov r1, r3 8001836: 4890 ldr r0, [pc, #576] @ (8001a78 ) 8001838: f000 fdca bl 80023d0 /*Configure GPIO pins : PMOD_SEL_0_Pin PMOD_GPIO_1_Pin ARD_D4_GPIO_Pin USB_OTGHS_PPWR_EN_Pin CTP_RST_Pin LCD_RST_Pin */ GPIO_InitStruct.Pin = PMOD_SEL_0_Pin|PMOD_GPIO_1_Pin|ARD_D4_GPIO_Pin|USB_OTGHS_PPWR_EN_Pin 800183c: f249 238c movw r3, #37516 @ 0x928c 8001840: 627b str r3, [r7, #36] @ 0x24 |CTP_RST_Pin|LCD_RST_Pin; GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001842: 2301 movs r3, #1 8001844: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001846: 2300 movs r3, #0 8001848: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800184a: 2300 movs r3, #0 800184c: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); 800184e: f107 0324 add.w r3, r7, #36 @ 0x24 8001852: 4619 mov r1, r3 8001854: 4889 ldr r0, [pc, #548] @ (8001a7c ) 8001856: f000 fdbb bl 80023d0 /*Configure GPIO pins : PMOD_SPI2_SCK_Pin PMOD_SPI2_NSS_Pin */ GPIO_InitStruct.Pin = PMOD_SPI2_SCK_Pin|PMOD_SPI2_NSS_Pin; 800185a: 2303 movs r3, #3 800185c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800185e: 2302 movs r3, #2 8001860: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001862: 2300 movs r3, #0 8001864: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001866: 2303 movs r3, #3 8001868: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 800186a: 2305 movs r3, #5 800186c: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOI, &GPIO_InitStruct); 800186e: f107 0324 add.w r3, r7, #36 @ 0x24 8001872: 4619 mov r1, r3 8001874: 487f ldr r0, [pc, #508] @ (8001a74 ) 8001876: f000 fdab bl 80023d0 /*Configure GPIO pins : USB_OTG_FS_ID_Pin PA5 SYS_LD_USER1_Pin */ GPIO_InitStruct.Pin = USB_OTG_FS_ID_Pin|GPIO_PIN_5|SYS_LD_USER1_Pin; 800187a: f44f 6394 mov.w r3, #1184 @ 0x4a0 800187e: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001880: 2301 movs r3, #1 8001882: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001884: 2300 movs r3, #0 8001886: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001888: 2300 movs r3, #0 800188a: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 800188c: f107 0324 add.w r3, r7, #36 @ 0x24 8001890: 4619 mov r1, r3 8001892: 4877 ldr r0, [pc, #476] @ (8001a70 ) 8001894: f000 fd9c bl 80023d0 /*Configure GPIO pins : STMOD_UART4_TXD_Pin STMOD_UART4_RXD_Pin */ GPIO_InitStruct.Pin = STMOD_UART4_TXD_Pin|STMOD_UART4_RXD_Pin; 8001898: f44f 43c0 mov.w r3, #24576 @ 0x6000 800189c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 800189e: 2302 movs r3, #2 80018a0: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80018a2: 2300 movs r3, #0 80018a4: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80018a6: 2303 movs r3, #3 80018a8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF8_UART4; 80018aa: 2308 movs r3, #8 80018ac: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); 80018ae: f107 0324 add.w r3, r7, #36 @ 0x24 80018b2: 4619 mov r1, r3 80018b4: 4871 ldr r0, [pc, #452] @ (8001a7c ) 80018b6: f000 fd8b bl 80023d0 /*Configure GPIO pin : PA9 */ GPIO_InitStruct.Pin = GPIO_PIN_9; 80018ba: f44f 7300 mov.w r3, #512 @ 0x200 80018be: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 80018c0: 2300 movs r3, #0 80018c2: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80018c4: 2300 movs r3, #0 80018c6: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 80018c8: f107 0324 add.w r3, r7, #36 @ 0x24 80018cc: 4619 mov r1, r3 80018ce: 4868 ldr r0, [pc, #416] @ (8001a70 ) 80018d0: f000 fd7e bl 80023d0 /*Configure GPIO pin : LCD_TE_INT_Pin */ GPIO_InitStruct.Pin = LCD_TE_INT_Pin; 80018d4: f44f 7380 mov.w r3, #256 @ 0x100 80018d8: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 80018da: f44f 1388 mov.w r3, #1114112 @ 0x110000 80018de: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80018e0: 2300 movs r3, #0 80018e2: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(LCD_TE_INT_GPIO_Port, &GPIO_InitStruct); 80018e4: f107 0324 add.w r3, r7, #36 @ 0x24 80018e8: 4619 mov r1, r3 80018ea: 4860 ldr r0, [pc, #384] @ (8001a6c ) 80018ec: f000 fd70 bl 80023d0 /*Configure GPIO pins : ARD_D15_STMOD_I2C2_SCL_Pin ARD_D14_STMOD_I2C2_SDA_Pin */ GPIO_InitStruct.Pin = ARD_D15_STMOD_I2C2_SCL_Pin|ARD_D14_STMOD_I2C2_SDA_Pin; 80018f0: 2330 movs r3, #48 @ 0x30 80018f2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 80018f4: 2312 movs r3, #18 80018f6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80018f8: 2300 movs r3, #0 80018fa: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80018fc: 2303 movs r3, #3 80018fe: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF4_I2C2; 8001900: 2304 movs r3, #4 8001902: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOH, &GPIO_InitStruct); 8001904: f107 0324 add.w r3, r7, #36 @ 0x24 8001908: 4619 mov r1, r3 800190a: 485c ldr r0, [pc, #368] @ (8001a7c ) 800190c: f000 fd60 bl 80023d0 /*Configure GPIO pins : PMOD_UART7_TXD_Pin PMOD_UART7_RXD_Pin PMOD_UART7_CTS_Pin PMOD_UART7_RTS_Pin */ GPIO_InitStruct.Pin = PMOD_UART7_TXD_Pin|PMOD_UART7_RXD_Pin|PMOD_UART7_CTS_Pin|PMOD_UART7_RTS_Pin; 8001910: f44f 7370 mov.w r3, #960 @ 0x3c0 8001914: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001916: 2302 movs r3, #2 8001918: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 800191a: 2300 movs r3, #0 800191c: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 800191e: 2303 movs r3, #3 8001920: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF8_UART7; 8001922: 2308 movs r3, #8 8001924: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8001926: f107 0324 add.w r3, r7, #36 @ 0x24 800192a: 4619 mov r1, r3 800192c: 4854 ldr r0, [pc, #336] @ (8001a80 ) 800192e: f000 fd4f bl 80023d0 /*Configure GPIO pin : ARD_A3_ADC3_IN8_Pin */ GPIO_InitStruct.Pin = ARD_A3_ADC3_IN8_Pin; 8001932: f44f 6380 mov.w r3, #1024 @ 0x400 8001936: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001938: 2303 movs r3, #3 800193a: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 800193c: 2300 movs r3, #0 800193e: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(ARD_A3_ADC3_IN8_GPIO_Port, &GPIO_InitStruct); 8001940: f107 0324 add.w r3, r7, #36 @ 0x24 8001944: 4619 mov r1, r3 8001946: 484e ldr r0, [pc, #312] @ (8001a80 ) 8001948: f000 fd42 bl 80023d0 /*Configure GPIO pin : LCD_BL_Pin */ GPIO_InitStruct.Pin = LCD_BL_Pin; 800194c: f44f 6300 mov.w r3, #2048 @ 0x800 8001950: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001952: 2302 movs r3, #2 8001954: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001956: 2300 movs r3, #0 8001958: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 800195a: 2300 movs r3, #0 800195c: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF2_TIM5; 800195e: 2302 movs r3, #2 8001960: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(LCD_BL_GPIO_Port, &GPIO_InitStruct); 8001962: f107 0324 add.w r3, r7, #36 @ 0x24 8001966: 4619 mov r1, r3 8001968: 4844 ldr r0, [pc, #272] @ (8001a7c ) 800196a: f000 fd31 bl 80023d0 /*Configure GPIO pin : USB_OTGHS_OVCR_INT_Pin */ GPIO_InitStruct.Pin = USB_OTGHS_OVCR_INT_Pin; 800196e: f44f 6380 mov.w r3, #1024 @ 0x400 8001972: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001974: 2300 movs r3, #0 8001976: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001978: 2300 movs r3, #0 800197a: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(USB_OTGHS_OVCR_INT_GPIO_Port, &GPIO_InitStruct); 800197c: f107 0324 add.w r3, r7, #36 @ 0x24 8001980: 4619 mov r1, r3 8001982: 483e ldr r0, [pc, #248] @ (8001a7c ) 8001984: f000 fd24 bl 80023d0 /*Configure GPIO pins : ARD_A4_Pin ARD_A5_Pin ARD_A2_Pin */ GPIO_InitStruct.Pin = ARD_A4_Pin|ARD_A5_Pin|ARD_A2_Pin; 8001988: 2313 movs r3, #19 800198a: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 800198c: 2303 movs r3, #3 800198e: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001990: 2300 movs r3, #0 8001992: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001994: f107 0324 add.w r3, r7, #36 @ 0x24 8001998: 4619 mov r1, r3 800199a: 4834 ldr r0, [pc, #208] @ (8001a6c ) 800199c: f000 fd18 bl 80023d0 /*Configure GPIO pins : STMOD_SPI2_MISOs_Pin STMOD_SPI2_MOSIs_Pin */ GPIO_InitStruct.Pin = STMOD_SPI2_MISOs_Pin|STMOD_SPI2_MOSIs_Pin; 80019a0: 230c movs r3, #12 80019a2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80019a4: 2302 movs r3, #2 80019a6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80019a8: 2300 movs r3, #0 80019aa: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80019ac: 2303 movs r3, #3 80019ae: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF5_SPI2; 80019b0: 2305 movs r3, #5 80019b2: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 80019b4: f107 0324 add.w r3, r7, #36 @ 0x24 80019b8: 4619 mov r1, r3 80019ba: 482c ldr r0, [pc, #176] @ (8001a6c ) 80019bc: f000 fd08 bl 80023d0 /*Configure GPIO pin : QSPI_CLK_Pin */ GPIO_InitStruct.Pin = QSPI_CLK_Pin; 80019c0: 2304 movs r3, #4 80019c2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80019c4: 2302 movs r3, #2 80019c6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80019c8: 2300 movs r3, #0 80019ca: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 80019cc: 2303 movs r3, #3 80019ce: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; 80019d0: 2309 movs r3, #9 80019d2: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(QSPI_CLK_GPIO_Port, &GPIO_InitStruct); 80019d4: f107 0324 add.w r3, r7, #36 @ 0x24 80019d8: 4619 mov r1, r3 80019da: 482a ldr r0, [pc, #168] @ (8001a84 ) 80019dc: f000 fcf8 bl 80023d0 /*Configure GPIO pin : ARD_D9_TIM12_CH1_Pin */ GPIO_InitStruct.Pin = ARD_D9_TIM12_CH1_Pin; 80019e0: 2340 movs r3, #64 @ 0x40 80019e2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 80019e4: 2302 movs r3, #2 80019e6: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 80019e8: 2300 movs r3, #0 80019ea: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 80019ec: 2300 movs r3, #0 80019ee: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF9_TIM12; 80019f0: 2309 movs r3, #9 80019f2: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(ARD_D9_TIM12_CH1_GPIO_Port, &GPIO_InitStruct); 80019f4: f107 0324 add.w r3, r7, #36 @ 0x24 80019f8: 4619 mov r1, r3 80019fa: 4820 ldr r0, [pc, #128] @ (8001a7c ) 80019fc: f000 fce8 bl 80023d0 /*Configure GPIO pin : QSPI_D3_Pin */ GPIO_InitStruct.Pin = QSPI_D3_Pin; 8001a00: f44f 5300 mov.w r3, #8192 @ 0x2000 8001a04: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a06: 2302 movs r3, #2 8001a08: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a0a: 2300 movs r3, #0 8001a0c: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001a0e: 2303 movs r3, #3 8001a10: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF9_QUADSPI; 8001a12: 2309 movs r3, #9 8001a14: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(QSPI_D3_GPIO_Port, &GPIO_InitStruct); 8001a16: f107 0324 add.w r3, r7, #36 @ 0x24 8001a1a: 4619 mov r1, r3 8001a1c: 4816 ldr r0, [pc, #88] @ (8001a78 ) 8001a1e: f000 fcd7 bl 80023d0 /*Configure GPIO pin : PA0 */ GPIO_InitStruct.Pin = GPIO_PIN_0; 8001a22: 2301 movs r3, #1 8001a24: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001a26: 2300 movs r3, #0 8001a28: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a2a: 2300 movs r3, #0 8001a2c: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001a2e: f107 0324 add.w r3, r7, #36 @ 0x24 8001a32: 4619 mov r1, r3 8001a34: 480e ldr r0, [pc, #56] @ (8001a70 ) 8001a36: f000 fccb bl 80023d0 /*Configure GPIO pins : ARD_A1_Pin ARD_A0_Pin */ GPIO_InitStruct.Pin = ARD_A1_Pin|ARD_A0_Pin; 8001a3a: 2350 movs r3, #80 @ 0x50 8001a3c: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_ANALOG; 8001a3e: 2303 movs r3, #3 8001a40: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a42: 2300 movs r3, #0 8001a44: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001a46: f107 0324 add.w r3, r7, #36 @ 0x24 8001a4a: 4619 mov r1, r3 8001a4c: 4808 ldr r0, [pc, #32] @ (8001a70 ) 8001a4e: f000 fcbf bl 80023d0 /*Configure GPIO pins : ARD_D1_USART2_TX_Pin ARD_D0_USART2_RX_Pin */ GPIO_InitStruct.Pin = ARD_D1_USART2_TX_Pin|ARD_D0_USART2_RX_Pin; 8001a52: 230c movs r3, #12 8001a54: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001a56: 2302 movs r3, #2 8001a58: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a5a: 2300 movs r3, #0 8001a5c: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001a5e: 2303 movs r3, #3 8001a60: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF7_USART2; 8001a62: 2307 movs r3, #7 8001a64: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOA, &GPIO_InitStruct); 8001a66: f107 0324 add.w r3, r7, #36 @ 0x24 8001a6a: e00d b.n 8001a88 8001a6c: 40020800 .word 0x40020800 8001a70: 40020000 .word 0x40020000 8001a74: 40022000 .word 0x40022000 8001a78: 40020c00 .word 0x40020c00 8001a7c: 40021c00 .word 0x40021c00 8001a80: 40021400 .word 0x40021400 8001a84: 40020400 .word 0x40020400 8001a88: 4619 mov r1, r3 8001a8a: 4829 ldr r0, [pc, #164] @ (8001b30 ) 8001a8c: f000 fca0 bl 80023d0 /*Configure GPIO pins : USB_OTG_HS_ID_Pin SYS_LD_USER2_Pin */ GPIO_InitStruct.Pin = USB_OTG_HS_ID_Pin|SYS_LD_USER2_Pin; 8001a90: f241 0302 movw r3, #4098 @ 0x1002 8001a94: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_OUTPUT_PP; 8001a96: 2301 movs r3, #1 8001a98: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001a9a: 2300 movs r3, #0 8001a9c: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001a9e: 2300 movs r3, #0 8001aa0: 633b str r3, [r7, #48] @ 0x30 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001aa2: f107 0324 add.w r3, r7, #36 @ 0x24 8001aa6: 4619 mov r1, r3 8001aa8: 4822 ldr r0, [pc, #136] @ (8001b34 ) 8001aaa: f000 fc91 bl 80023d0 /*Configure GPIO pins : USB_OTG_HS_VBUS_Pin USB_OTGFS_OVCR_INT_Pin PMOD_INT_Pin */ GPIO_InitStruct.Pin = USB_OTG_HS_VBUS_Pin|USB_OTGFS_OVCR_INT_Pin|PMOD_INT_Pin; 8001aae: f44f 5330 mov.w r3, #11264 @ 0x2c00 8001ab2: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_IT_RISING; 8001ab4: f44f 1388 mov.w r3, #1114112 @ 0x110000 8001ab8: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001aba: 2300 movs r3, #0 8001abc: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001abe: f107 0324 add.w r3, r7, #36 @ 0x24 8001ac2: 4619 mov r1, r3 8001ac4: 481b ldr r0, [pc, #108] @ (8001b34 ) 8001ac6: f000 fc83 bl 80023d0 /*Configure GPIO pin : ARD_D5_STMOD_TIM3_CH3_Pin */ GPIO_InitStruct.Pin = ARD_D5_STMOD_TIM3_CH3_Pin; 8001aca: 2301 movs r3, #1 8001acc: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001ace: 2302 movs r3, #2 8001ad0: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001ad2: 2300 movs r3, #0 8001ad4: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_LOW; 8001ad6: 2300 movs r3, #0 8001ad8: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF2_TIM3; 8001ada: 2302 movs r3, #2 8001adc: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(ARD_D5_STMOD_TIM3_CH3_GPIO_Port, &GPIO_InitStruct); 8001ade: f107 0324 add.w r3, r7, #36 @ 0x24 8001ae2: 4619 mov r1, r3 8001ae4: 4813 ldr r0, [pc, #76] @ (8001b34 ) 8001ae6: f000 fc73 bl 80023d0 /*Configure GPIO pin : PMOD_RESET_Pin */ GPIO_InitStruct.Pin = PMOD_RESET_Pin; 8001aea: f44f 6300 mov.w r3, #2048 @ 0x800 8001aee: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_INPUT; 8001af0: 2300 movs r3, #0 8001af2: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001af4: 2300 movs r3, #0 8001af6: 62fb str r3, [r7, #44] @ 0x2c HAL_GPIO_Init(PMOD_RESET_GPIO_Port, &GPIO_InitStruct); 8001af8: f107 0324 add.w r3, r7, #36 @ 0x24 8001afc: 4619 mov r1, r3 8001afe: 480e ldr r0, [pc, #56] @ (8001b38 ) 8001b00: f000 fc66 bl 80023d0 /*Configure GPIO pins : PB14 PB15 */ GPIO_InitStruct.Pin = GPIO_PIN_14|GPIO_PIN_15; 8001b04: f44f 4340 mov.w r3, #49152 @ 0xc000 8001b08: 627b str r3, [r7, #36] @ 0x24 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001b0a: 2302 movs r3, #2 8001b0c: 62bb str r3, [r7, #40] @ 0x28 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001b0e: 2300 movs r3, #0 8001b10: 62fb str r3, [r7, #44] @ 0x2c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001b12: 2303 movs r3, #3 8001b14: 633b str r3, [r7, #48] @ 0x30 GPIO_InitStruct.Alternate = GPIO_AF12_OTG_HS_FS; 8001b16: 230c movs r3, #12 8001b18: 637b str r3, [r7, #52] @ 0x34 HAL_GPIO_Init(GPIOB, &GPIO_InitStruct); 8001b1a: f107 0324 add.w r3, r7, #36 @ 0x24 8001b1e: 4619 mov r1, r3 8001b20: 4804 ldr r0, [pc, #16] @ (8001b34 ) 8001b22: f000 fc55 bl 80023d0 /* USER CODE BEGIN MX_GPIO_Init_2 */ /* USER CODE END MX_GPIO_Init_2 */ } 8001b26: bf00 nop 8001b28: 3738 adds r7, #56 @ 0x38 8001b2a: 46bd mov sp, r7 8001b2c: bd80 pop {r7, pc} 8001b2e: bf00 nop 8001b30: 40020000 .word 0x40020000 8001b34: 40020400 .word 0x40020400 8001b38: 40021400 .word 0x40021400 08001b3c : * @param argument: Not used * @retval None */ /* USER CODE END Header_StartDefaultTask */ void StartDefaultTask(void const * argument) { 8001b3c: b580 push {r7, lr} 8001b3e: b082 sub sp, #8 8001b40: af00 add r7, sp, #0 8001b42: 6078 str r0, [r7, #4] /* USER CODE BEGIN 5 */ /* Infinite loop */ for(;;) { osDelay(1); 8001b44: 2001 movs r0, #1 8001b46: f003 fcb4 bl 80054b2 8001b4a: e7fb b.n 8001b44 08001b4c : * a global variable "uwTick" used as application time base. * @param htim : TIM handle * @retval None */ void HAL_TIM_PeriodElapsedCallback(TIM_HandleTypeDef *htim) { 8001b4c: b580 push {r7, lr} 8001b4e: b082 sub sp, #8 8001b50: af00 add r7, sp, #0 8001b52: 6078 str r0, [r7, #4] /* USER CODE BEGIN Callback 0 */ /* USER CODE END Callback 0 */ if (htim->Instance == TIM14) 8001b54: 687b ldr r3, [r7, #4] 8001b56: 681b ldr r3, [r3, #0] 8001b58: 4a04 ldr r2, [pc, #16] @ (8001b6c ) 8001b5a: 4293 cmp r3, r2 8001b5c: d101 bne.n 8001b62 { HAL_IncTick(); 8001b5e: f000 fb11 bl 8002184 } /* USER CODE BEGIN Callback 1 */ /* USER CODE END Callback 1 */ } 8001b62: bf00 nop 8001b64: 3708 adds r7, #8 8001b66: 46bd mov sp, r7 8001b68: bd80 pop {r7, pc} 8001b6a: bf00 nop 8001b6c: 40002000 .word 0x40002000 08001b70 : /** * @brief This function is executed in case of error occurrence. * @retval None */ void Error_Handler(void) { 8001b70: b480 push {r7} 8001b72: af00 add r7, sp, #0 __ASM volatile ("cpsid i" : : : "memory"); 8001b74: b672 cpsid i } 8001b76: bf00 nop /* USER CODE BEGIN Error_Handler_Debug */ /* User can add his own implementation to report the HAL error return state */ __disable_irq(); while (1) 8001b78: bf00 nop 8001b7a: e7fd b.n 8001b78 08001b7c : /* USER CODE END 0 */ /** * Initializes the Global MSP. */ void HAL_MspInit(void) { 8001b7c: b580 push {r7, lr} 8001b7e: b082 sub sp, #8 8001b80: af00 add r7, sp, #0 /* USER CODE BEGIN MspInit 0 */ /* USER CODE END MspInit 0 */ __HAL_RCC_PWR_CLK_ENABLE(); 8001b82: 4b11 ldr r3, [pc, #68] @ (8001bc8 ) 8001b84: 6c1b ldr r3, [r3, #64] @ 0x40 8001b86: 4a10 ldr r2, [pc, #64] @ (8001bc8 ) 8001b88: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8001b8c: 6413 str r3, [r2, #64] @ 0x40 8001b8e: 4b0e ldr r3, [pc, #56] @ (8001bc8 ) 8001b90: 6c1b ldr r3, [r3, #64] @ 0x40 8001b92: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8001b96: 607b str r3, [r7, #4] 8001b98: 687b ldr r3, [r7, #4] __HAL_RCC_SYSCFG_CLK_ENABLE(); 8001b9a: 4b0b ldr r3, [pc, #44] @ (8001bc8 ) 8001b9c: 6c5b ldr r3, [r3, #68] @ 0x44 8001b9e: 4a0a ldr r2, [pc, #40] @ (8001bc8 ) 8001ba0: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8001ba4: 6453 str r3, [r2, #68] @ 0x44 8001ba6: 4b08 ldr r3, [pc, #32] @ (8001bc8 ) 8001ba8: 6c5b ldr r3, [r3, #68] @ 0x44 8001baa: f403 4380 and.w r3, r3, #16384 @ 0x4000 8001bae: 603b str r3, [r7, #0] 8001bb0: 683b ldr r3, [r7, #0] /* System interrupt init*/ /* PendSV_IRQn interrupt configuration */ HAL_NVIC_SetPriority(PendSV_IRQn, 15, 0); 8001bb2: 2200 movs r2, #0 8001bb4: 210f movs r1, #15 8001bb6: f06f 0001 mvn.w r0, #1 8001bba: f000 fbdf bl 800237c /* USER CODE BEGIN MspInit 1 */ /* USER CODE END MspInit 1 */ } 8001bbe: bf00 nop 8001bc0: 3708 adds r7, #8 8001bc2: 46bd mov sp, r7 8001bc4: bd80 pop {r7, pc} 8001bc6: bf00 nop 8001bc8: 40023800 .word 0x40023800 08001bcc : * This function configures the hardware resources used in this example * @param hi2c: I2C handle pointer * @retval None */ void HAL_I2C_MspInit(I2C_HandleTypeDef* hi2c) { 8001bcc: b580 push {r7, lr} 8001bce: b0aa sub sp, #168 @ 0xa8 8001bd0: af00 add r7, sp, #0 8001bd2: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001bd4: f107 0394 add.w r3, r7, #148 @ 0x94 8001bd8: 2200 movs r2, #0 8001bda: 601a str r2, [r3, #0] 8001bdc: 605a str r2, [r3, #4] 8001bde: 609a str r2, [r3, #8] 8001be0: 60da str r2, [r3, #12] 8001be2: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8001be4: f107 0314 add.w r3, r7, #20 8001be8: 2280 movs r2, #128 @ 0x80 8001bea: 2100 movs r1, #0 8001bec: 4618 mov r0, r3 8001bee: f005 f8db bl 8006da8 if(hi2c->Instance==I2C3) 8001bf2: 687b ldr r3, [r7, #4] 8001bf4: 681b ldr r3, [r3, #0] 8001bf6: 4a33 ldr r2, [pc, #204] @ (8001cc4 ) 8001bf8: 4293 cmp r3, r2 8001bfa: d15e bne.n 8001cba /* USER CODE END I2C3_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_I2C3; 8001bfc: f44f 3380 mov.w r3, #65536 @ 0x10000 8001c00: 617b str r3, [r7, #20] PeriphClkInitStruct.I2c3ClockSelection = RCC_I2C3CLKSOURCE_PCLK1; 8001c02: 2300 movs r3, #0 8001c04: 67bb str r3, [r7, #120] @ 0x78 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8001c06: f107 0314 add.w r3, r7, #20 8001c0a: 4618 mov r0, r3 8001c0c: f001 ff6e bl 8003aec 8001c10: 4603 mov r3, r0 8001c12: 2b00 cmp r3, #0 8001c14: d001 beq.n 8001c1a { Error_Handler(); 8001c16: f7ff ffab bl 8001b70 } __HAL_RCC_GPIOA_CLK_ENABLE(); 8001c1a: 4b2b ldr r3, [pc, #172] @ (8001cc8 ) 8001c1c: 6b1b ldr r3, [r3, #48] @ 0x30 8001c1e: 4a2a ldr r2, [pc, #168] @ (8001cc8 ) 8001c20: f043 0301 orr.w r3, r3, #1 8001c24: 6313 str r3, [r2, #48] @ 0x30 8001c26: 4b28 ldr r3, [pc, #160] @ (8001cc8 ) 8001c28: 6b1b ldr r3, [r3, #48] @ 0x30 8001c2a: f003 0301 and.w r3, r3, #1 8001c2e: 613b str r3, [r7, #16] 8001c30: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOH_CLK_ENABLE(); 8001c32: 4b25 ldr r3, [pc, #148] @ (8001cc8 ) 8001c34: 6b1b ldr r3, [r3, #48] @ 0x30 8001c36: 4a24 ldr r2, [pc, #144] @ (8001cc8 ) 8001c38: f043 0380 orr.w r3, r3, #128 @ 0x80 8001c3c: 6313 str r3, [r2, #48] @ 0x30 8001c3e: 4b22 ldr r3, [pc, #136] @ (8001cc8 ) 8001c40: 6b1b ldr r3, [r3, #48] @ 0x30 8001c42: f003 0380 and.w r3, r3, #128 @ 0x80 8001c46: 60fb str r3, [r7, #12] 8001c48: 68fb ldr r3, [r7, #12] /**I2C3 GPIO Configuration PA8 ------> I2C3_SCL PH8 ------> I2C3_SDA */ GPIO_InitStruct.Pin = CTP_SCL_Pin; 8001c4a: f44f 7380 mov.w r3, #256 @ 0x100 8001c4e: f8c7 3094 str.w r3, [r7, #148] @ 0x94 GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8001c52: 2312 movs r3, #18 8001c54: f8c7 3098 str.w r3, [r7, #152] @ 0x98 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c58: 2300 movs r3, #0 8001c5a: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001c5e: 2303 movs r3, #3 8001c60: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Alternate = GPIO_AF4_I2C3; 8001c64: 2304 movs r3, #4 8001c66: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 HAL_GPIO_Init(CTP_SCL_GPIO_Port, &GPIO_InitStruct); 8001c6a: f107 0394 add.w r3, r7, #148 @ 0x94 8001c6e: 4619 mov r1, r3 8001c70: 4816 ldr r0, [pc, #88] @ (8001ccc ) 8001c72: f000 fbad bl 80023d0 GPIO_InitStruct.Pin = CTP_SDA_Pin; 8001c76: f44f 7380 mov.w r3, #256 @ 0x100 8001c7a: f8c7 3094 str.w r3, [r7, #148] @ 0x94 GPIO_InitStruct.Mode = GPIO_MODE_AF_OD; 8001c7e: 2312 movs r3, #18 8001c80: f8c7 3098 str.w r3, [r7, #152] @ 0x98 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001c84: 2300 movs r3, #0 8001c86: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001c8a: 2303 movs r3, #3 8001c8c: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Alternate = GPIO_AF4_I2C3; 8001c90: 2304 movs r3, #4 8001c92: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 HAL_GPIO_Init(CTP_SDA_GPIO_Port, &GPIO_InitStruct); 8001c96: f107 0394 add.w r3, r7, #148 @ 0x94 8001c9a: 4619 mov r1, r3 8001c9c: 480c ldr r0, [pc, #48] @ (8001cd0 ) 8001c9e: f000 fb97 bl 80023d0 /* Peripheral clock enable */ __HAL_RCC_I2C3_CLK_ENABLE(); 8001ca2: 4b09 ldr r3, [pc, #36] @ (8001cc8 ) 8001ca4: 6c1b ldr r3, [r3, #64] @ 0x40 8001ca6: 4a08 ldr r2, [pc, #32] @ (8001cc8 ) 8001ca8: f443 0300 orr.w r3, r3, #8388608 @ 0x800000 8001cac: 6413 str r3, [r2, #64] @ 0x40 8001cae: 4b06 ldr r3, [pc, #24] @ (8001cc8 ) 8001cb0: 6c1b ldr r3, [r3, #64] @ 0x40 8001cb2: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8001cb6: 60bb str r3, [r7, #8] 8001cb8: 68bb ldr r3, [r7, #8] /* USER CODE END I2C3_MspInit 1 */ } } 8001cba: bf00 nop 8001cbc: 37a8 adds r7, #168 @ 0xa8 8001cbe: 46bd mov sp, r7 8001cc0: bd80 pop {r7, pc} 8001cc2: bf00 nop 8001cc4: 40005c00 .word 0x40005c00 8001cc8: 40023800 .word 0x40023800 8001ccc: 40020000 .word 0x40020000 8001cd0: 40021c00 .word 0x40021c00 08001cd4 : * This function configures the hardware resources used in this example * @param huart: UART handle pointer * @retval None */ void HAL_UART_MspInit(UART_HandleTypeDef* huart) { 8001cd4: b580 push {r7, lr} 8001cd6: b0aa sub sp, #168 @ 0xa8 8001cd8: af00 add r7, sp, #0 8001cda: 6078 str r0, [r7, #4] GPIO_InitTypeDef GPIO_InitStruct = {0}; 8001cdc: f107 0394 add.w r3, r7, #148 @ 0x94 8001ce0: 2200 movs r2, #0 8001ce2: 601a str r2, [r3, #0] 8001ce4: 605a str r2, [r3, #4] 8001ce6: 609a str r2, [r3, #8] 8001ce8: 60da str r2, [r3, #12] 8001cea: 611a str r2, [r3, #16] RCC_PeriphCLKInitTypeDef PeriphClkInitStruct = {0}; 8001cec: f107 0314 add.w r3, r7, #20 8001cf0: 2280 movs r2, #128 @ 0x80 8001cf2: 2100 movs r1, #0 8001cf4: 4618 mov r0, r3 8001cf6: f005 f857 bl 8006da8 if(huart->Instance==USART6) 8001cfa: 687b ldr r3, [r7, #4] 8001cfc: 681b ldr r3, [r3, #0] 8001cfe: 4a21 ldr r2, [pc, #132] @ (8001d84 ) 8001d00: 4293 cmp r3, r2 8001d02: d13b bne.n 8001d7c /* USER CODE END USART6_MspInit 0 */ /** Initializes the peripherals clock */ PeriphClkInitStruct.PeriphClockSelection = RCC_PERIPHCLK_USART6; 8001d04: f44f 6300 mov.w r3, #2048 @ 0x800 8001d08: 617b str r3, [r7, #20] PeriphClkInitStruct.Usart6ClockSelection = RCC_USART6CLKSOURCE_PCLK2; 8001d0a: 2300 movs r3, #0 8001d0c: 667b str r3, [r7, #100] @ 0x64 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInitStruct) != HAL_OK) 8001d0e: f107 0314 add.w r3, r7, #20 8001d12: 4618 mov r0, r3 8001d14: f001 feea bl 8003aec 8001d18: 4603 mov r3, r0 8001d1a: 2b00 cmp r3, #0 8001d1c: d001 beq.n 8001d22 { Error_Handler(); 8001d1e: f7ff ff27 bl 8001b70 } /* Peripheral clock enable */ __HAL_RCC_USART6_CLK_ENABLE(); 8001d22: 4b19 ldr r3, [pc, #100] @ (8001d88 ) 8001d24: 6c5b ldr r3, [r3, #68] @ 0x44 8001d26: 4a18 ldr r2, [pc, #96] @ (8001d88 ) 8001d28: f043 0320 orr.w r3, r3, #32 8001d2c: 6453 str r3, [r2, #68] @ 0x44 8001d2e: 4b16 ldr r3, [pc, #88] @ (8001d88 ) 8001d30: 6c5b ldr r3, [r3, #68] @ 0x44 8001d32: f003 0320 and.w r3, r3, #32 8001d36: 613b str r3, [r7, #16] 8001d38: 693b ldr r3, [r7, #16] __HAL_RCC_GPIOC_CLK_ENABLE(); 8001d3a: 4b13 ldr r3, [pc, #76] @ (8001d88 ) 8001d3c: 6b1b ldr r3, [r3, #48] @ 0x30 8001d3e: 4a12 ldr r2, [pc, #72] @ (8001d88 ) 8001d40: f043 0304 orr.w r3, r3, #4 8001d44: 6313 str r3, [r2, #48] @ 0x30 8001d46: 4b10 ldr r3, [pc, #64] @ (8001d88 ) 8001d48: 6b1b ldr r3, [r3, #48] @ 0x30 8001d4a: f003 0304 and.w r3, r3, #4 8001d4e: 60fb str r3, [r7, #12] 8001d50: 68fb ldr r3, [r7, #12] /**USART6 GPIO Configuration PC7 ------> USART6_RX PC6 ------> USART6_TX */ GPIO_InitStruct.Pin = VCP_RX_Pin|VCP_TX_Pin; 8001d52: 23c0 movs r3, #192 @ 0xc0 8001d54: f8c7 3094 str.w r3, [r7, #148] @ 0x94 GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001d58: 2302 movs r3, #2 8001d5a: f8c7 3098 str.w r3, [r7, #152] @ 0x98 GPIO_InitStruct.Pull = GPIO_NOPULL; 8001d5e: 2300 movs r3, #0 8001d60: f8c7 309c str.w r3, [r7, #156] @ 0x9c GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001d64: 2303 movs r3, #3 8001d66: f8c7 30a0 str.w r3, [r7, #160] @ 0xa0 GPIO_InitStruct.Alternate = GPIO_AF8_USART6; 8001d6a: 2308 movs r3, #8 8001d6c: f8c7 30a4 str.w r3, [r7, #164] @ 0xa4 HAL_GPIO_Init(GPIOC, &GPIO_InitStruct); 8001d70: f107 0394 add.w r3, r7, #148 @ 0x94 8001d74: 4619 mov r1, r3 8001d76: 4805 ldr r0, [pc, #20] @ (8001d8c ) 8001d78: f000 fb2a bl 80023d0 /* USER CODE END USART6_MspInit 1 */ } } 8001d7c: bf00 nop 8001d7e: 37a8 adds r7, #168 @ 0xa8 8001d80: 46bd mov sp, r7 8001d82: bd80 pop {r7, pc} 8001d84: 40011400 .word 0x40011400 8001d88: 40023800 .word 0x40023800 8001d8c: 40020800 .word 0x40020800 08001d90 : } static uint32_t FMC_Initialized = 0; static void HAL_FMC_MspInit(void){ 8001d90: b580 push {r7, lr} 8001d92: b086 sub sp, #24 8001d94: af00 add r7, sp, #0 /* USER CODE BEGIN FMC_MspInit 0 */ /* USER CODE END FMC_MspInit 0 */ GPIO_InitTypeDef GPIO_InitStruct ={0}; 8001d96: 1d3b adds r3, r7, #4 8001d98: 2200 movs r2, #0 8001d9a: 601a str r2, [r3, #0] 8001d9c: 605a str r2, [r3, #4] 8001d9e: 609a str r2, [r3, #8] 8001da0: 60da str r2, [r3, #12] 8001da2: 611a str r2, [r3, #16] if (FMC_Initialized) { 8001da4: 4b33 ldr r3, [pc, #204] @ (8001e74 ) 8001da6: 681b ldr r3, [r3, #0] 8001da8: 2b00 cmp r3, #0 8001daa: d15e bne.n 8001e6a return; } FMC_Initialized = 1; 8001dac: 4b31 ldr r3, [pc, #196] @ (8001e74 ) 8001dae: 2201 movs r2, #1 8001db0: 601a str r2, [r3, #0] /* Peripheral clock enable */ __HAL_RCC_FMC_CLK_ENABLE(); 8001db2: 4b31 ldr r3, [pc, #196] @ (8001e78 ) 8001db4: 6b9b ldr r3, [r3, #56] @ 0x38 8001db6: 4a30 ldr r2, [pc, #192] @ (8001e78 ) 8001db8: f043 0301 orr.w r3, r3, #1 8001dbc: 6393 str r3, [r2, #56] @ 0x38 8001dbe: 4b2e ldr r3, [pc, #184] @ (8001e78 ) 8001dc0: 6b9b ldr r3, [r3, #56] @ 0x38 8001dc2: f003 0301 and.w r3, r3, #1 8001dc6: 603b str r3, [r7, #0] 8001dc8: 683b ldr r3, [r7, #0] PE7 ------> FMC_D4 PE10 ------> FMC_D7 PE12 ------> FMC_D9 PE15 ------> FMC_D12 */ GPIO_InitStruct.Pin = PSRAM_NBL1_Pin|PSRAM_NBL0_Pin|LCD_PSRAM_D10_Pin|LCD_PSRAM_D5_Pin 8001dca: f64f 7383 movw r3, #65411 @ 0xff83 8001dce: 607b str r3, [r7, #4] |LCD_PSRAM_D6_Pin|LCD_PSRAM_D8_Pin|LCD_PSRAM_D11_Pin|LCD_PSRAM_D4_Pin |LCD_PSRAM_D7_Pin|LCD_PSRAM_D9_Pin|LCD_PSRAM_D12_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001dd0: 2302 movs r3, #2 8001dd2: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001dd4: 2300 movs r3, #0 8001dd6: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001dd8: 2303 movs r3, #3 8001dda: 613b str r3, [r7, #16] GPIO_InitStruct.Alternate = GPIO_AF12_FMC; 8001ddc: 230c movs r3, #12 8001dde: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOE, &GPIO_InitStruct); 8001de0: 1d3b adds r3, r7, #4 8001de2: 4619 mov r1, r3 8001de4: 4825 ldr r0, [pc, #148] @ (8001e7c ) 8001de6: f000 faf3 bl 80023d0 GPIO_InitStruct.Pin = PSRAM_NE1_Pin|LCD_PSRAM_D2_Pin|LCD_PSRAM_NWE_Pin|LCD_PSRAM_D3_Pin 8001dea: f64d 73b3 movw r3, #57267 @ 0xdfb3 8001dee: 607b str r3, [r7, #4] |LCD_PSRAM_NWED4_Pin|LCD_PSRAM_D1_Pin|LCD_PSRAM_D0_Pin|PSRAM_A17_Pin |PSRAM_A16_Pin|LCD_PSRAM_D15_Pin|LCD_PSRAM_D14_Pin|LCD_PSRAM_D13_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001df0: 2302 movs r3, #2 8001df2: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001df4: 2300 movs r3, #0 8001df6: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001df8: 2303 movs r3, #3 8001dfa: 613b str r3, [r7, #16] GPIO_InitStruct.Alternate = GPIO_AF12_FMC; 8001dfc: 230c movs r3, #12 8001dfe: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOD, &GPIO_InitStruct); 8001e00: 1d3b adds r3, r7, #4 8001e02: 4619 mov r1, r3 8001e04: 481e ldr r0, [pc, #120] @ (8001e80 ) 8001e06: f000 fae3 bl 80023d0 GPIO_InitStruct.Pin = NC1_Pin; 8001e0a: 2380 movs r3, #128 @ 0x80 8001e0c: 607b str r3, [r7, #4] GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001e0e: 2302 movs r3, #2 8001e10: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001e12: 2300 movs r3, #0 8001e14: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001e16: 2303 movs r3, #3 8001e18: 613b str r3, [r7, #16] GPIO_InitStruct.Alternate = GPIO_AF12_FMC; 8001e1a: 230c movs r3, #12 8001e1c: 617b str r3, [r7, #20] HAL_GPIO_Init(NC1_GPIO_Port, &GPIO_InitStruct); 8001e1e: 1d3b adds r3, r7, #4 8001e20: 4619 mov r1, r3 8001e22: 4818 ldr r0, [pc, #96] @ (8001e84 ) 8001e24: f000 fad4 bl 80023d0 GPIO_InitStruct.Pin = LCD_NE_Pin|PSRAM_A15_Pin|PSRAM_A14_Pin|PSRAM_A13_Pin 8001e28: f240 233f movw r3, #575 @ 0x23f 8001e2c: 607b str r3, [r7, #4] |PSRAM_A12_Pin|PSRAM_A11_Pin|PSRAM_A10_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001e2e: 2302 movs r3, #2 8001e30: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001e32: 2300 movs r3, #0 8001e34: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001e36: 2303 movs r3, #3 8001e38: 613b str r3, [r7, #16] GPIO_InitStruct.Alternate = GPIO_AF12_FMC; 8001e3a: 230c movs r3, #12 8001e3c: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOG, &GPIO_InitStruct); 8001e3e: 1d3b adds r3, r7, #4 8001e40: 4619 mov r1, r3 8001e42: 4811 ldr r0, [pc, #68] @ (8001e88 ) 8001e44: f000 fac4 bl 80023d0 GPIO_InitStruct.Pin = PSRAM_A0_Pin|PSRAM_A2_Pin|PSRAM_A1_Pin|PSRAM_A3_Pin 8001e48: f24f 033f movw r3, #61503 @ 0xf03f 8001e4c: 607b str r3, [r7, #4] |PSRAM_A4_Pin|PSRAM_A5_Pin|PSRAM_A7_Pin|PSRAM_A6_Pin |PSRAM_A9_Pin|PSRAM_A8_Pin; GPIO_InitStruct.Mode = GPIO_MODE_AF_PP; 8001e4e: 2302 movs r3, #2 8001e50: 60bb str r3, [r7, #8] GPIO_InitStruct.Pull = GPIO_NOPULL; 8001e52: 2300 movs r3, #0 8001e54: 60fb str r3, [r7, #12] GPIO_InitStruct.Speed = GPIO_SPEED_FREQ_VERY_HIGH; 8001e56: 2303 movs r3, #3 8001e58: 613b str r3, [r7, #16] GPIO_InitStruct.Alternate = GPIO_AF12_FMC; 8001e5a: 230c movs r3, #12 8001e5c: 617b str r3, [r7, #20] HAL_GPIO_Init(GPIOF, &GPIO_InitStruct); 8001e5e: 1d3b adds r3, r7, #4 8001e60: 4619 mov r1, r3 8001e62: 480a ldr r0, [pc, #40] @ (8001e8c ) 8001e64: f000 fab4 bl 80023d0 8001e68: e000 b.n 8001e6c return; 8001e6a: bf00 nop /* USER CODE BEGIN FMC_MspInit 1 */ /* USER CODE END FMC_MspInit 1 */ } 8001e6c: 3718 adds r7, #24 8001e6e: 46bd mov sp, r7 8001e70: bd80 pop {r7, pc} 8001e72: bf00 nop 8001e74: 200006a8 .word 0x200006a8 8001e78: 40023800 .word 0x40023800 8001e7c: 40021000 .word 0x40021000 8001e80: 40020c00 .word 0x40020c00 8001e84: 40020400 .word 0x40020400 8001e88: 40021800 .word 0x40021800 8001e8c: 40021400 .word 0x40021400 08001e90 : void HAL_SRAM_MspInit(SRAM_HandleTypeDef* hsram){ 8001e90: b580 push {r7, lr} 8001e92: b082 sub sp, #8 8001e94: af00 add r7, sp, #0 8001e96: 6078 str r0, [r7, #4] /* USER CODE BEGIN SRAM_MspInit 0 */ /* USER CODE END SRAM_MspInit 0 */ HAL_FMC_MspInit(); 8001e98: f7ff ff7a bl 8001d90 /* USER CODE BEGIN SRAM_MspInit 1 */ /* USER CODE END SRAM_MspInit 1 */ } 8001e9c: bf00 nop 8001e9e: 3708 adds r7, #8 8001ea0: 46bd mov sp, r7 8001ea2: bd80 pop {r7, pc} 08001ea4 : * reset by HAL_Init() or at any time when clock is configured, by HAL_RCC_ClockConfig(). * @param TickPriority: Tick interrupt priority. * @retval HAL status */ HAL_StatusTypeDef HAL_InitTick(uint32_t TickPriority) { 8001ea4: b580 push {r7, lr} 8001ea6: b08e sub sp, #56 @ 0x38 8001ea8: af00 add r7, sp, #0 8001eaa: 6078 str r0, [r7, #4] RCC_ClkInitTypeDef clkconfig; uint32_t uwTimclock, uwAPB1Prescaler = 0U; 8001eac: 2300 movs r3, #0 8001eae: 62fb str r3, [r7, #44] @ 0x2c uint32_t uwPrescalerValue = 0U; 8001eb0: 2300 movs r3, #0 8001eb2: 62bb str r3, [r7, #40] @ 0x28 uint32_t pFLatency; HAL_StatusTypeDef status; /* Enable TIM14 clock */ __HAL_RCC_TIM14_CLK_ENABLE(); 8001eb4: 4b33 ldr r3, [pc, #204] @ (8001f84 ) 8001eb6: 6c1b ldr r3, [r3, #64] @ 0x40 8001eb8: 4a32 ldr r2, [pc, #200] @ (8001f84 ) 8001eba: f443 7380 orr.w r3, r3, #256 @ 0x100 8001ebe: 6413 str r3, [r2, #64] @ 0x40 8001ec0: 4b30 ldr r3, [pc, #192] @ (8001f84 ) 8001ec2: 6c1b ldr r3, [r3, #64] @ 0x40 8001ec4: f403 7380 and.w r3, r3, #256 @ 0x100 8001ec8: 60fb str r3, [r7, #12] 8001eca: 68fb ldr r3, [r7, #12] /* Get clock configuration */ HAL_RCC_GetClockConfig(&clkconfig, &pFLatency); 8001ecc: f107 0210 add.w r2, r7, #16 8001ed0: f107 0314 add.w r3, r7, #20 8001ed4: 4611 mov r1, r2 8001ed6: 4618 mov r0, r3 8001ed8: f001 fdd6 bl 8003a88 /* Get APB1 prescaler */ uwAPB1Prescaler = clkconfig.APB1CLKDivider; 8001edc: 6a3b ldr r3, [r7, #32] 8001ede: 62fb str r3, [r7, #44] @ 0x2c /* Compute TIM14 clock */ if (uwAPB1Prescaler == RCC_HCLK_DIV1) 8001ee0: 6afb ldr r3, [r7, #44] @ 0x2c 8001ee2: 2b00 cmp r3, #0 8001ee4: d103 bne.n 8001eee { uwTimclock = HAL_RCC_GetPCLK1Freq(); 8001ee6: f001 fda7 bl 8003a38 8001eea: 6378 str r0, [r7, #52] @ 0x34 8001eec: e004 b.n 8001ef8 } else { uwTimclock = 2UL * HAL_RCC_GetPCLK1Freq(); 8001eee: f001 fda3 bl 8003a38 8001ef2: 4603 mov r3, r0 8001ef4: 005b lsls r3, r3, #1 8001ef6: 637b str r3, [r7, #52] @ 0x34 } /* Compute the prescaler value to have TIM14 counter clock equal to 1MHz */ uwPrescalerValue = (uint32_t) ((uwTimclock / 1000000U) - 1U); 8001ef8: 6b7b ldr r3, [r7, #52] @ 0x34 8001efa: 4a23 ldr r2, [pc, #140] @ (8001f88 ) 8001efc: fba2 2303 umull r2, r3, r2, r3 8001f00: 0c9b lsrs r3, r3, #18 8001f02: 3b01 subs r3, #1 8001f04: 62bb str r3, [r7, #40] @ 0x28 /* Initialize TIM14 */ htim14.Instance = TIM14; 8001f06: 4b21 ldr r3, [pc, #132] @ (8001f8c ) 8001f08: 4a21 ldr r2, [pc, #132] @ (8001f90 ) 8001f0a: 601a str r2, [r3, #0] * Period = [(TIM14CLK/1000) - 1]. to have a (1/1000) s time base. * Prescaler = (uwTimclock/1000000 - 1) to have a 1MHz counter clock. * ClockDivision = 0 * Counter direction = Up */ htim14.Init.Period = (1000000U / 1000U) - 1U; 8001f0c: 4b1f ldr r3, [pc, #124] @ (8001f8c ) 8001f0e: f240 32e7 movw r2, #999 @ 0x3e7 8001f12: 60da str r2, [r3, #12] htim14.Init.Prescaler = uwPrescalerValue; 8001f14: 4a1d ldr r2, [pc, #116] @ (8001f8c ) 8001f16: 6abb ldr r3, [r7, #40] @ 0x28 8001f18: 6053 str r3, [r2, #4] htim14.Init.ClockDivision = 0; 8001f1a: 4b1c ldr r3, [pc, #112] @ (8001f8c ) 8001f1c: 2200 movs r2, #0 8001f1e: 611a str r2, [r3, #16] htim14.Init.CounterMode = TIM_COUNTERMODE_UP; 8001f20: 4b1a ldr r3, [pc, #104] @ (8001f8c ) 8001f22: 2200 movs r2, #0 8001f24: 609a str r2, [r3, #8] htim14.Init.AutoReloadPreload = TIM_AUTORELOAD_PRELOAD_DISABLE; 8001f26: 4b19 ldr r3, [pc, #100] @ (8001f8c ) 8001f28: 2200 movs r2, #0 8001f2a: 619a str r2, [r3, #24] status = HAL_TIM_Base_Init(&htim14); 8001f2c: 4817 ldr r0, [pc, #92] @ (8001f8c ) 8001f2e: f002 f96f bl 8004210 8001f32: 4603 mov r3, r0 8001f34: f887 3033 strb.w r3, [r7, #51] @ 0x33 if (status == HAL_OK) 8001f38: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 8001f3c: 2b00 cmp r3, #0 8001f3e: d11b bne.n 8001f78 { /* Start the TIM time Base generation in interrupt mode */ status = HAL_TIM_Base_Start_IT(&htim14); 8001f40: 4812 ldr r0, [pc, #72] @ (8001f8c ) 8001f42: f002 f9c7 bl 80042d4 8001f46: 4603 mov r3, r0 8001f48: f887 3033 strb.w r3, [r7, #51] @ 0x33 if (status == HAL_OK) 8001f4c: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 8001f50: 2b00 cmp r3, #0 8001f52: d111 bne.n 8001f78 { /* Enable the TIM14 global Interrupt */ HAL_NVIC_EnableIRQ(TIM8_TRG_COM_TIM14_IRQn); 8001f54: 202d movs r0, #45 @ 0x2d 8001f56: f000 fa2d bl 80023b4 /* Configure the SysTick IRQ priority */ if (TickPriority < (1UL << __NVIC_PRIO_BITS)) 8001f5a: 687b ldr r3, [r7, #4] 8001f5c: 2b0f cmp r3, #15 8001f5e: d808 bhi.n 8001f72 { /* Configure the TIM IRQ priority */ HAL_NVIC_SetPriority(TIM8_TRG_COM_TIM14_IRQn, TickPriority, 0U); 8001f60: 2200 movs r2, #0 8001f62: 6879 ldr r1, [r7, #4] 8001f64: 202d movs r0, #45 @ 0x2d 8001f66: f000 fa09 bl 800237c uwTickPrio = TickPriority; 8001f6a: 4a0a ldr r2, [pc, #40] @ (8001f94 ) 8001f6c: 687b ldr r3, [r7, #4] 8001f6e: 6013 str r3, [r2, #0] 8001f70: e002 b.n 8001f78 } else { status = HAL_ERROR; 8001f72: 2301 movs r3, #1 8001f74: f887 3033 strb.w r3, [r7, #51] @ 0x33 } } } /* Return function status */ return status; 8001f78: f897 3033 ldrb.w r3, [r7, #51] @ 0x33 } 8001f7c: 4618 mov r0, r3 8001f7e: 3738 adds r7, #56 @ 0x38 8001f80: 46bd mov sp, r7 8001f82: bd80 pop {r7, pc} 8001f84: 40023800 .word 0x40023800 8001f88: 431bde83 .word 0x431bde83 8001f8c: 200006ac .word 0x200006ac 8001f90: 40002000 .word 0x40002000 8001f94: 2000000c .word 0x2000000c 08001f98 : /******************************************************************************/ /** * @brief This function handles Non maskable interrupt. */ void NMI_Handler(void) { 8001f98: b480 push {r7} 8001f9a: af00 add r7, sp, #0 /* USER CODE BEGIN NonMaskableInt_IRQn 0 */ /* USER CODE END NonMaskableInt_IRQn 0 */ /* USER CODE BEGIN NonMaskableInt_IRQn 1 */ while (1) 8001f9c: bf00 nop 8001f9e: e7fd b.n 8001f9c 08001fa0 : /** * @brief This function handles Hard fault interrupt. */ void HardFault_Handler(void) { 8001fa0: b480 push {r7} 8001fa2: af00 add r7, sp, #0 /* USER CODE BEGIN HardFault_IRQn 0 */ /* USER CODE END HardFault_IRQn 0 */ while (1) 8001fa4: bf00 nop 8001fa6: e7fd b.n 8001fa4 08001fa8 : /** * @brief This function handles Memory management fault. */ void MemManage_Handler(void) { 8001fa8: b480 push {r7} 8001faa: af00 add r7, sp, #0 /* USER CODE BEGIN MemoryManagement_IRQn 0 */ /* USER CODE END MemoryManagement_IRQn 0 */ while (1) 8001fac: bf00 nop 8001fae: e7fd b.n 8001fac 08001fb0 : /** * @brief This function handles Pre-fetch fault, memory access fault. */ void BusFault_Handler(void) { 8001fb0: b480 push {r7} 8001fb2: af00 add r7, sp, #0 /* USER CODE BEGIN BusFault_IRQn 0 */ /* USER CODE END BusFault_IRQn 0 */ while (1) 8001fb4: bf00 nop 8001fb6: e7fd b.n 8001fb4 08001fb8 : /** * @brief This function handles Undefined instruction or illegal state. */ void UsageFault_Handler(void) { 8001fb8: b480 push {r7} 8001fba: af00 add r7, sp, #0 /* USER CODE BEGIN UsageFault_IRQn 0 */ /* USER CODE END UsageFault_IRQn 0 */ while (1) 8001fbc: bf00 nop 8001fbe: e7fd b.n 8001fbc 08001fc0 : /** * @brief This function handles Debug monitor. */ void DebugMon_Handler(void) { 8001fc0: b480 push {r7} 8001fc2: af00 add r7, sp, #0 /* USER CODE END DebugMonitor_IRQn 0 */ /* USER CODE BEGIN DebugMonitor_IRQn 1 */ /* USER CODE END DebugMonitor_IRQn 1 */ } 8001fc4: bf00 nop 8001fc6: 46bd mov sp, r7 8001fc8: f85d 7b04 ldr.w r7, [sp], #4 8001fcc: 4770 bx lr ... 08001fd0 : /** * @brief This function handles TIM8 trigger and commutation interrupts and TIM14 global interrupt. */ void TIM8_TRG_COM_TIM14_IRQHandler(void) { 8001fd0: b580 push {r7, lr} 8001fd2: af00 add r7, sp, #0 /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 0 */ /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 0 */ HAL_TIM_IRQHandler(&htim14); 8001fd4: 4802 ldr r0, [pc, #8] @ (8001fe0 ) 8001fd6: f002 f9f5 bl 80043c4 /* USER CODE BEGIN TIM8_TRG_COM_TIM14_IRQn 1 */ /* USER CODE END TIM8_TRG_COM_TIM14_IRQn 1 */ } 8001fda: bf00 nop 8001fdc: bd80 pop {r7, pc} 8001fde: bf00 nop 8001fe0: 200006ac .word 0x200006ac 08001fe4 <_read>: _kill(status, -1); while (1) {} /* Make sure we hang here */ } __attribute__((weak)) int _read(int file, char *ptr, int len) { 8001fe4: b580 push {r7, lr} 8001fe6: b086 sub sp, #24 8001fe8: af00 add r7, sp, #0 8001fea: 60f8 str r0, [r7, #12] 8001fec: 60b9 str r1, [r7, #8] 8001fee: 607a str r2, [r7, #4] (void)file; int DataIdx; for (DataIdx = 0; DataIdx < len; DataIdx++) 8001ff0: 2300 movs r3, #0 8001ff2: 617b str r3, [r7, #20] 8001ff4: e00a b.n 800200c <_read+0x28> { *ptr++ = __io_getchar(); 8001ff6: f3af 8000 nop.w 8001ffa: 4601 mov r1, r0 8001ffc: 68bb ldr r3, [r7, #8] 8001ffe: 1c5a adds r2, r3, #1 8002000: 60ba str r2, [r7, #8] 8002002: b2ca uxtb r2, r1 8002004: 701a strb r2, [r3, #0] for (DataIdx = 0; DataIdx < len; DataIdx++) 8002006: 697b ldr r3, [r7, #20] 8002008: 3301 adds r3, #1 800200a: 617b str r3, [r7, #20] 800200c: 697a ldr r2, [r7, #20] 800200e: 687b ldr r3, [r7, #4] 8002010: 429a cmp r2, r3 8002012: dbf0 blt.n 8001ff6 <_read+0x12> } return len; 8002014: 687b ldr r3, [r7, #4] } 8002016: 4618 mov r0, r3 8002018: 3718 adds r7, #24 800201a: 46bd mov sp, r7 800201c: bd80 pop {r7, pc} 0800201e <_close>: } return len; } int _close(int file) { 800201e: b480 push {r7} 8002020: b083 sub sp, #12 8002022: af00 add r7, sp, #0 8002024: 6078 str r0, [r7, #4] (void)file; return -1; 8002026: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff } 800202a: 4618 mov r0, r3 800202c: 370c adds r7, #12 800202e: 46bd mov sp, r7 8002030: f85d 7b04 ldr.w r7, [sp], #4 8002034: 4770 bx lr 08002036 <_fstat>: int _fstat(int file, struct stat *st) { 8002036: b480 push {r7} 8002038: b083 sub sp, #12 800203a: af00 add r7, sp, #0 800203c: 6078 str r0, [r7, #4] 800203e: 6039 str r1, [r7, #0] (void)file; st->st_mode = S_IFCHR; 8002040: 683b ldr r3, [r7, #0] 8002042: f44f 5200 mov.w r2, #8192 @ 0x2000 8002046: 605a str r2, [r3, #4] return 0; 8002048: 2300 movs r3, #0 } 800204a: 4618 mov r0, r3 800204c: 370c adds r7, #12 800204e: 46bd mov sp, r7 8002050: f85d 7b04 ldr.w r7, [sp], #4 8002054: 4770 bx lr 08002056 <_isatty>: int _isatty(int file) { 8002056: b480 push {r7} 8002058: b083 sub sp, #12 800205a: af00 add r7, sp, #0 800205c: 6078 str r0, [r7, #4] (void)file; return 1; 800205e: 2301 movs r3, #1 } 8002060: 4618 mov r0, r3 8002062: 370c adds r7, #12 8002064: 46bd mov sp, r7 8002066: f85d 7b04 ldr.w r7, [sp], #4 800206a: 4770 bx lr 0800206c <_lseek>: int _lseek(int file, int ptr, int dir) { 800206c: b480 push {r7} 800206e: b085 sub sp, #20 8002070: af00 add r7, sp, #0 8002072: 60f8 str r0, [r7, #12] 8002074: 60b9 str r1, [r7, #8] 8002076: 607a str r2, [r7, #4] (void)file; (void)ptr; (void)dir; return 0; 8002078: 2300 movs r3, #0 } 800207a: 4618 mov r0, r3 800207c: 3714 adds r7, #20 800207e: 46bd mov sp, r7 8002080: f85d 7b04 ldr.w r7, [sp], #4 8002084: 4770 bx lr ... 08002088 <_sbrk>: * * @param incr Memory size * @return Pointer to allocated memory */ void *_sbrk(ptrdiff_t incr) { 8002088: b580 push {r7, lr} 800208a: b086 sub sp, #24 800208c: af00 add r7, sp, #0 800208e: 6078 str r0, [r7, #4] extern uint8_t _end; /* Symbol defined in the linker script */ extern uint8_t _estack; /* Symbol defined in the linker script */ extern uint32_t _Min_Stack_Size; /* Symbol defined in the linker script */ const uint32_t stack_limit = (uint32_t)&_estack - (uint32_t)&_Min_Stack_Size; 8002090: 4a14 ldr r2, [pc, #80] @ (80020e4 <_sbrk+0x5c>) 8002092: 4b15 ldr r3, [pc, #84] @ (80020e8 <_sbrk+0x60>) 8002094: 1ad3 subs r3, r2, r3 8002096: 617b str r3, [r7, #20] const uint8_t *max_heap = (uint8_t *)stack_limit; 8002098: 697b ldr r3, [r7, #20] 800209a: 613b str r3, [r7, #16] uint8_t *prev_heap_end; /* Initialize heap end at first call */ if (NULL == __sbrk_heap_end) 800209c: 4b13 ldr r3, [pc, #76] @ (80020ec <_sbrk+0x64>) 800209e: 681b ldr r3, [r3, #0] 80020a0: 2b00 cmp r3, #0 80020a2: d102 bne.n 80020aa <_sbrk+0x22> { __sbrk_heap_end = &_end; 80020a4: 4b11 ldr r3, [pc, #68] @ (80020ec <_sbrk+0x64>) 80020a6: 4a12 ldr r2, [pc, #72] @ (80020f0 <_sbrk+0x68>) 80020a8: 601a str r2, [r3, #0] } /* Protect heap from growing into the reserved MSP stack */ if (__sbrk_heap_end + incr > max_heap) 80020aa: 4b10 ldr r3, [pc, #64] @ (80020ec <_sbrk+0x64>) 80020ac: 681a ldr r2, [r3, #0] 80020ae: 687b ldr r3, [r7, #4] 80020b0: 4413 add r3, r2 80020b2: 693a ldr r2, [r7, #16] 80020b4: 429a cmp r2, r3 80020b6: d207 bcs.n 80020c8 <_sbrk+0x40> { errno = ENOMEM; 80020b8: f004 ff22 bl 8006f00 <__errno> 80020bc: 4603 mov r3, r0 80020be: 220c movs r2, #12 80020c0: 601a str r2, [r3, #0] return (void *)-1; 80020c2: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 80020c6: e009 b.n 80020dc <_sbrk+0x54> } prev_heap_end = __sbrk_heap_end; 80020c8: 4b08 ldr r3, [pc, #32] @ (80020ec <_sbrk+0x64>) 80020ca: 681b ldr r3, [r3, #0] 80020cc: 60fb str r3, [r7, #12] __sbrk_heap_end += incr; 80020ce: 4b07 ldr r3, [pc, #28] @ (80020ec <_sbrk+0x64>) 80020d0: 681a ldr r2, [r3, #0] 80020d2: 687b ldr r3, [r7, #4] 80020d4: 4413 add r3, r2 80020d6: 4a05 ldr r2, [pc, #20] @ (80020ec <_sbrk+0x64>) 80020d8: 6013 str r3, [r2, #0] return (void *)prev_heap_end; 80020da: 68fb ldr r3, [r7, #12] } 80020dc: 4618 mov r0, r3 80020de: 3718 adds r7, #24 80020e0: 46bd mov sp, r7 80020e2: bd80 pop {r7, pc} 80020e4: 20040000 .word 0x20040000 80020e8: 00000400 .word 0x00000400 80020ec: 200006f8 .word 0x200006f8 80020f0: 200089a0 .word 0x200089a0 080020f4 : * SystemFrequency variable. * @param None * @retval None */ void SystemInit(void) { 80020f4: b480 push {r7} 80020f6: af00 add r7, sp, #0 /* FPU settings ------------------------------------------------------------*/ #if (__FPU_PRESENT == 1) && (__FPU_USED == 1) SCB->CPACR |= ((3UL << 10*2)|(3UL << 11*2)); /* set CP10 and CP11 Full Access */ 80020f8: 4b06 ldr r3, [pc, #24] @ (8002114 ) 80020fa: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80020fe: 4a05 ldr r2, [pc, #20] @ (8002114 ) 8002100: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8002104: f8c2 3088 str.w r3, [r2, #136] @ 0x88 /* Configure the Vector Table location -------------------------------------*/ #if defined(USER_VECT_TAB_ADDRESS) SCB->VTOR = VECT_TAB_BASE_ADDRESS | VECT_TAB_OFFSET; /* Vector Table Relocation in Internal SRAM */ #endif /* USER_VECT_TAB_ADDRESS */ } 8002108: bf00 nop 800210a: 46bd mov sp, r7 800210c: f85d 7b04 ldr.w r7, [sp], #4 8002110: 4770 bx lr 8002112: bf00 nop 8002114: e000ed00 .word 0xe000ed00 08002118 : .section .text.Reset_Handler .weak Reset_Handler .type Reset_Handler, %function Reset_Handler: ldr sp, =_estack /* set stack pointer */ 8002118: f8df d034 ldr.w sp, [pc, #52] @ 8002150 /* Call the clock system initialization function.*/ bl SystemInit 800211c: f7ff ffea bl 80020f4 /* Copy the data segment initializers from flash to SRAM */ ldr r0, =_sdata 8002120: 480c ldr r0, [pc, #48] @ (8002154 ) ldr r1, =_edata 8002122: 490d ldr r1, [pc, #52] @ (8002158 ) ldr r2, =_sidata 8002124: 4a0d ldr r2, [pc, #52] @ (800215c ) movs r3, #0 8002126: 2300 movs r3, #0 b LoopCopyDataInit 8002128: e002 b.n 8002130 0800212a : CopyDataInit: ldr r4, [r2, r3] 800212a: 58d4 ldr r4, [r2, r3] str r4, [r0, r3] 800212c: 50c4 str r4, [r0, r3] adds r3, r3, #4 800212e: 3304 adds r3, #4 08002130 : LoopCopyDataInit: adds r4, r0, r3 8002130: 18c4 adds r4, r0, r3 cmp r4, r1 8002132: 428c cmp r4, r1 bcc CopyDataInit 8002134: d3f9 bcc.n 800212a /* Zero fill the bss segment. */ ldr r2, =_sbss 8002136: 4a0a ldr r2, [pc, #40] @ (8002160 ) ldr r4, =_ebss 8002138: 4c0a ldr r4, [pc, #40] @ (8002164 ) movs r3, #0 800213a: 2300 movs r3, #0 b LoopFillZerobss 800213c: e001 b.n 8002142 0800213e : FillZerobss: str r3, [r2] 800213e: 6013 str r3, [r2, #0] adds r2, r2, #4 8002140: 3204 adds r2, #4 08002142 : LoopFillZerobss: cmp r2, r4 8002142: 42a2 cmp r2, r4 bcc FillZerobss 8002144: d3fb bcc.n 800213e /* Call static constructors */ bl __libc_init_array 8002146: f004 fee1 bl 8006f0c <__libc_init_array> /* Call the application's entry point.*/ bl main 800214a: f7fe ff07 bl 8000f5c
bx lr 800214e: 4770 bx lr ldr sp, =_estack /* set stack pointer */ 8002150: 20040000 .word 0x20040000 ldr r0, =_sdata 8002154: 20000000 .word 0x20000000 ldr r1, =_edata 8002158: 20000074 .word 0x20000074 ldr r2, =_sidata 800215c: 08009630 .word 0x08009630 ldr r2, =_sbss 8002160: 20000074 .word 0x20000074 ldr r4, =_ebss 8002164: 200089a0 .word 0x200089a0 08002168 : * @retval None */ .section .text.Default_Handler,"ax",%progbits Default_Handler: Infinite_Loop: b Infinite_Loop 8002168: e7fe b.n 8002168 0800216a : * need to ensure that the SysTick time base is always set to 1 millisecond * to have correct HAL operation. * @retval HAL status */ HAL_StatusTypeDef HAL_Init(void) { 800216a: b580 push {r7, lr} 800216c: af00 add r7, sp, #0 #if (PREFETCH_ENABLE != 0U) __HAL_FLASH_PREFETCH_BUFFER_ENABLE(); #endif /* PREFETCH_ENABLE */ /* Set Interrupt Group Priority */ HAL_NVIC_SetPriorityGrouping(NVIC_PRIORITYGROUP_4); 800216e: 2003 movs r0, #3 8002170: f000 f8f9 bl 8002366 /* Use systick as time base source and configure 1ms tick (default clock after Reset is HSI) */ HAL_InitTick(TICK_INT_PRIORITY); 8002174: 200f movs r0, #15 8002176: f7ff fe95 bl 8001ea4 /* Init the low level hardware */ HAL_MspInit(); 800217a: f7ff fcff bl 8001b7c /* Return function status */ return HAL_OK; 800217e: 2300 movs r3, #0 } 8002180: 4618 mov r0, r3 8002182: bd80 pop {r7, pc} 08002184 : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval None */ __weak void HAL_IncTick(void) { 8002184: b480 push {r7} 8002186: af00 add r7, sp, #0 uwTick += uwTickFreq; 8002188: 4b06 ldr r3, [pc, #24] @ (80021a4 ) 800218a: 781b ldrb r3, [r3, #0] 800218c: 461a mov r2, r3 800218e: 4b06 ldr r3, [pc, #24] @ (80021a8 ) 8002190: 681b ldr r3, [r3, #0] 8002192: 4413 add r3, r2 8002194: 4a04 ldr r2, [pc, #16] @ (80021a8 ) 8002196: 6013 str r3, [r2, #0] } 8002198: bf00 nop 800219a: 46bd mov sp, r7 800219c: f85d 7b04 ldr.w r7, [sp], #4 80021a0: 4770 bx lr 80021a2: bf00 nop 80021a4: 20000010 .word 0x20000010 80021a8: 200006fc .word 0x200006fc 080021ac : * @note This function is declared as __weak to be overwritten in case of other * implementations in user file. * @retval tick value */ __weak uint32_t HAL_GetTick(void) { 80021ac: b480 push {r7} 80021ae: af00 add r7, sp, #0 return uwTick; 80021b0: 4b03 ldr r3, [pc, #12] @ (80021c0 ) 80021b2: 681b ldr r3, [r3, #0] } 80021b4: 4618 mov r0, r3 80021b6: 46bd mov sp, r7 80021b8: f85d 7b04 ldr.w r7, [sp], #4 80021bc: 4770 bx lr 80021be: bf00 nop 80021c0: 200006fc .word 0x200006fc 080021c4 : * implementations in user file. * @param Delay specifies the delay time length, in milliseconds. * @retval None */ __weak void HAL_Delay(uint32_t Delay) { 80021c4: b580 push {r7, lr} 80021c6: b084 sub sp, #16 80021c8: af00 add r7, sp, #0 80021ca: 6078 str r0, [r7, #4] uint32_t tickstart = HAL_GetTick(); 80021cc: f7ff ffee bl 80021ac 80021d0: 60b8 str r0, [r7, #8] uint32_t wait = Delay; 80021d2: 687b ldr r3, [r7, #4] 80021d4: 60fb str r3, [r7, #12] /* Add a freq to guarantee minimum wait */ if (wait < HAL_MAX_DELAY) 80021d6: 68fb ldr r3, [r7, #12] 80021d8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80021dc: d005 beq.n 80021ea { wait += (uint32_t)(uwTickFreq); 80021de: 4b0a ldr r3, [pc, #40] @ (8002208 ) 80021e0: 781b ldrb r3, [r3, #0] 80021e2: 461a mov r2, r3 80021e4: 68fb ldr r3, [r7, #12] 80021e6: 4413 add r3, r2 80021e8: 60fb str r3, [r7, #12] } while ((HAL_GetTick() - tickstart) < wait) 80021ea: bf00 nop 80021ec: f7ff ffde bl 80021ac 80021f0: 4602 mov r2, r0 80021f2: 68bb ldr r3, [r7, #8] 80021f4: 1ad3 subs r3, r2, r3 80021f6: 68fa ldr r2, [r7, #12] 80021f8: 429a cmp r2, r3 80021fa: d8f7 bhi.n 80021ec { } } 80021fc: bf00 nop 80021fe: bf00 nop 8002200: 3710 adds r7, #16 8002202: 46bd mov sp, r7 8002204: bd80 pop {r7, pc} 8002206: bf00 nop 8002208: 20000010 .word 0x20000010 0800220c <__NVIC_SetPriorityGrouping>: In case of a conflict between priority grouping and available priority bits (__NVIC_PRIO_BITS), the smallest possible priority group is set. \param [in] PriorityGroup Priority grouping field. */ __STATIC_INLINE void __NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 800220c: b480 push {r7} 800220e: b085 sub sp, #20 8002210: af00 add r7, sp, #0 8002212: 6078 str r0, [r7, #4] uint32_t reg_value; uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 8002214: 687b ldr r3, [r7, #4] 8002216: f003 0307 and.w r3, r3, #7 800221a: 60fb str r3, [r7, #12] reg_value = SCB->AIRCR; /* read old register configuration */ 800221c: 4b0b ldr r3, [pc, #44] @ (800224c <__NVIC_SetPriorityGrouping+0x40>) 800221e: 68db ldr r3, [r3, #12] 8002220: 60bb str r3, [r7, #8] reg_value &= ~((uint32_t)(SCB_AIRCR_VECTKEY_Msk | SCB_AIRCR_PRIGROUP_Msk)); /* clear bits to change */ 8002222: 68ba ldr r2, [r7, #8] 8002224: f64f 03ff movw r3, #63743 @ 0xf8ff 8002228: 4013 ands r3, r2 800222a: 60bb str r3, [r7, #8] reg_value = (reg_value | ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | (PriorityGroupTmp << SCB_AIRCR_PRIGROUP_Pos) ); /* Insert write key and priority group */ 800222c: 68fb ldr r3, [r7, #12] 800222e: 021a lsls r2, r3, #8 ((uint32_t)0x5FAUL << SCB_AIRCR_VECTKEY_Pos) | 8002230: 68bb ldr r3, [r7, #8] 8002232: 431a orrs r2, r3 reg_value = (reg_value | 8002234: 4b06 ldr r3, [pc, #24] @ (8002250 <__NVIC_SetPriorityGrouping+0x44>) 8002236: 4313 orrs r3, r2 8002238: 60bb str r3, [r7, #8] SCB->AIRCR = reg_value; 800223a: 4a04 ldr r2, [pc, #16] @ (800224c <__NVIC_SetPriorityGrouping+0x40>) 800223c: 68bb ldr r3, [r7, #8] 800223e: 60d3 str r3, [r2, #12] } 8002240: bf00 nop 8002242: 3714 adds r7, #20 8002244: 46bd mov sp, r7 8002246: f85d 7b04 ldr.w r7, [sp], #4 800224a: 4770 bx lr 800224c: e000ed00 .word 0xe000ed00 8002250: 05fa0000 .word 0x05fa0000 08002254 <__NVIC_GetPriorityGrouping>: \brief Get Priority Grouping \details Reads the priority grouping field from the NVIC Interrupt Controller. \return Priority grouping field (SCB->AIRCR [10:8] PRIGROUP field). */ __STATIC_INLINE uint32_t __NVIC_GetPriorityGrouping(void) { 8002254: b480 push {r7} 8002256: af00 add r7, sp, #0 return ((uint32_t)((SCB->AIRCR & SCB_AIRCR_PRIGROUP_Msk) >> SCB_AIRCR_PRIGROUP_Pos)); 8002258: 4b04 ldr r3, [pc, #16] @ (800226c <__NVIC_GetPriorityGrouping+0x18>) 800225a: 68db ldr r3, [r3, #12] 800225c: 0a1b lsrs r3, r3, #8 800225e: f003 0307 and.w r3, r3, #7 } 8002262: 4618 mov r0, r3 8002264: 46bd mov sp, r7 8002266: f85d 7b04 ldr.w r7, [sp], #4 800226a: 4770 bx lr 800226c: e000ed00 .word 0xe000ed00 08002270 <__NVIC_EnableIRQ>: \details Enables a device specific interrupt in the NVIC interrupt controller. \param [in] IRQn Device specific interrupt number. \note IRQn must not be negative. */ __STATIC_INLINE void __NVIC_EnableIRQ(IRQn_Type IRQn) { 8002270: b480 push {r7} 8002272: b083 sub sp, #12 8002274: af00 add r7, sp, #0 8002276: 4603 mov r3, r0 8002278: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 800227a: f997 3007 ldrsb.w r3, [r7, #7] 800227e: 2b00 cmp r3, #0 8002280: db0b blt.n 800229a <__NVIC_EnableIRQ+0x2a> { NVIC->ISER[(((uint32_t)IRQn) >> 5UL)] = (uint32_t)(1UL << (((uint32_t)IRQn) & 0x1FUL)); 8002282: 79fb ldrb r3, [r7, #7] 8002284: f003 021f and.w r2, r3, #31 8002288: 4907 ldr r1, [pc, #28] @ (80022a8 <__NVIC_EnableIRQ+0x38>) 800228a: f997 3007 ldrsb.w r3, [r7, #7] 800228e: 095b lsrs r3, r3, #5 8002290: 2001 movs r0, #1 8002292: fa00 f202 lsl.w r2, r0, r2 8002296: f841 2023 str.w r2, [r1, r3, lsl #2] } } 800229a: bf00 nop 800229c: 370c adds r7, #12 800229e: 46bd mov sp, r7 80022a0: f85d 7b04 ldr.w r7, [sp], #4 80022a4: 4770 bx lr 80022a6: bf00 nop 80022a8: e000e100 .word 0xe000e100 080022ac <__NVIC_SetPriority>: \param [in] IRQn Interrupt number. \param [in] priority Priority to set. \note The priority cannot be set for every processor exception. */ __STATIC_INLINE void __NVIC_SetPriority(IRQn_Type IRQn, uint32_t priority) { 80022ac: b480 push {r7} 80022ae: b083 sub sp, #12 80022b0: af00 add r7, sp, #0 80022b2: 4603 mov r3, r0 80022b4: 6039 str r1, [r7, #0] 80022b6: 71fb strb r3, [r7, #7] if ((int32_t)(IRQn) >= 0) 80022b8: f997 3007 ldrsb.w r3, [r7, #7] 80022bc: 2b00 cmp r3, #0 80022be: db0a blt.n 80022d6 <__NVIC_SetPriority+0x2a> { NVIC->IP[((uint32_t)IRQn)] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80022c0: 683b ldr r3, [r7, #0] 80022c2: b2da uxtb r2, r3 80022c4: 490c ldr r1, [pc, #48] @ (80022f8 <__NVIC_SetPriority+0x4c>) 80022c6: f997 3007 ldrsb.w r3, [r7, #7] 80022ca: 0112 lsls r2, r2, #4 80022cc: b2d2 uxtb r2, r2 80022ce: 440b add r3, r1 80022d0: f883 2300 strb.w r2, [r3, #768] @ 0x300 } else { SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); } } 80022d4: e00a b.n 80022ec <__NVIC_SetPriority+0x40> SCB->SHPR[(((uint32_t)IRQn) & 0xFUL)-4UL] = (uint8_t)((priority << (8U - __NVIC_PRIO_BITS)) & (uint32_t)0xFFUL); 80022d6: 683b ldr r3, [r7, #0] 80022d8: b2da uxtb r2, r3 80022da: 4908 ldr r1, [pc, #32] @ (80022fc <__NVIC_SetPriority+0x50>) 80022dc: 79fb ldrb r3, [r7, #7] 80022de: f003 030f and.w r3, r3, #15 80022e2: 3b04 subs r3, #4 80022e4: 0112 lsls r2, r2, #4 80022e6: b2d2 uxtb r2, r2 80022e8: 440b add r3, r1 80022ea: 761a strb r2, [r3, #24] } 80022ec: bf00 nop 80022ee: 370c adds r7, #12 80022f0: 46bd mov sp, r7 80022f2: f85d 7b04 ldr.w r7, [sp], #4 80022f6: 4770 bx lr 80022f8: e000e100 .word 0xe000e100 80022fc: e000ed00 .word 0xe000ed00 08002300 : \param [in] PreemptPriority Preemptive priority value (starting from 0). \param [in] SubPriority Subpriority value (starting from 0). \return Encoded priority. Value can be used in the function \ref NVIC_SetPriority(). */ __STATIC_INLINE uint32_t NVIC_EncodePriority (uint32_t PriorityGroup, uint32_t PreemptPriority, uint32_t SubPriority) { 8002300: b480 push {r7} 8002302: b089 sub sp, #36 @ 0x24 8002304: af00 add r7, sp, #0 8002306: 60f8 str r0, [r7, #12] 8002308: 60b9 str r1, [r7, #8] 800230a: 607a str r2, [r7, #4] uint32_t PriorityGroupTmp = (PriorityGroup & (uint32_t)0x07UL); /* only values 0..7 are used */ 800230c: 68fb ldr r3, [r7, #12] 800230e: f003 0307 and.w r3, r3, #7 8002312: 61fb str r3, [r7, #28] uint32_t PreemptPriorityBits; uint32_t SubPriorityBits; PreemptPriorityBits = ((7UL - PriorityGroupTmp) > (uint32_t)(__NVIC_PRIO_BITS)) ? (uint32_t)(__NVIC_PRIO_BITS) : (uint32_t)(7UL - PriorityGroupTmp); 8002314: 69fb ldr r3, [r7, #28] 8002316: f1c3 0307 rsb r3, r3, #7 800231a: 2b04 cmp r3, #4 800231c: bf28 it cs 800231e: 2304 movcs r3, #4 8002320: 61bb str r3, [r7, #24] SubPriorityBits = ((PriorityGroupTmp + (uint32_t)(__NVIC_PRIO_BITS)) < (uint32_t)7UL) ? (uint32_t)0UL : (uint32_t)((PriorityGroupTmp - 7UL) + (uint32_t)(__NVIC_PRIO_BITS)); 8002322: 69fb ldr r3, [r7, #28] 8002324: 3304 adds r3, #4 8002326: 2b06 cmp r3, #6 8002328: d902 bls.n 8002330 800232a: 69fb ldr r3, [r7, #28] 800232c: 3b03 subs r3, #3 800232e: e000 b.n 8002332 8002330: 2300 movs r3, #0 8002332: 617b str r3, [r7, #20] return ( ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002334: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8002338: 69bb ldr r3, [r7, #24] 800233a: fa02 f303 lsl.w r3, r2, r3 800233e: 43da mvns r2, r3 8002340: 68bb ldr r3, [r7, #8] 8002342: 401a ands r2, r3 8002344: 697b ldr r3, [r7, #20] 8002346: 409a lsls r2, r3 ((SubPriority & (uint32_t)((1UL << (SubPriorityBits )) - 1UL))) 8002348: f04f 31ff mov.w r1, #4294967295 @ 0xffffffff 800234c: 697b ldr r3, [r7, #20] 800234e: fa01 f303 lsl.w r3, r1, r3 8002352: 43d9 mvns r1, r3 8002354: 687b ldr r3, [r7, #4] 8002356: 400b ands r3, r1 ((PreemptPriority & (uint32_t)((1UL << (PreemptPriorityBits)) - 1UL)) << SubPriorityBits) | 8002358: 4313 orrs r3, r2 ); } 800235a: 4618 mov r0, r3 800235c: 3724 adds r7, #36 @ 0x24 800235e: 46bd mov sp, r7 8002360: f85d 7b04 ldr.w r7, [sp], #4 8002364: 4770 bx lr 08002366 : * @note When the NVIC_PriorityGroup_0 is selected, IRQ preemption is no more possible. * The pending IRQ priority will be managed only by the subpriority. * @retval None */ void HAL_NVIC_SetPriorityGrouping(uint32_t PriorityGroup) { 8002366: b580 push {r7, lr} 8002368: b082 sub sp, #8 800236a: af00 add r7, sp, #0 800236c: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_NVIC_PRIORITY_GROUP(PriorityGroup)); /* Set the PRIGROUP[10:8] bits according to the PriorityGroup parameter value */ NVIC_SetPriorityGrouping(PriorityGroup); 800236e: 6878 ldr r0, [r7, #4] 8002370: f7ff ff4c bl 800220c <__NVIC_SetPriorityGrouping> } 8002374: bf00 nop 8002376: 3708 adds r7, #8 8002378: 46bd mov sp, r7 800237a: bd80 pop {r7, pc} 0800237c : * This parameter can be a value between 0 and 15 * A lower priority value indicates a higher priority. * @retval None */ void HAL_NVIC_SetPriority(IRQn_Type IRQn, uint32_t PreemptPriority, uint32_t SubPriority) { 800237c: b580 push {r7, lr} 800237e: b086 sub sp, #24 8002380: af00 add r7, sp, #0 8002382: 4603 mov r3, r0 8002384: 60b9 str r1, [r7, #8] 8002386: 607a str r2, [r7, #4] 8002388: 73fb strb r3, [r7, #15] uint32_t prioritygroup = 0x00; 800238a: 2300 movs r3, #0 800238c: 617b str r3, [r7, #20] /* Check the parameters */ assert_param(IS_NVIC_SUB_PRIORITY(SubPriority)); assert_param(IS_NVIC_PREEMPTION_PRIORITY(PreemptPriority)); prioritygroup = NVIC_GetPriorityGrouping(); 800238e: f7ff ff61 bl 8002254 <__NVIC_GetPriorityGrouping> 8002392: 6178 str r0, [r7, #20] NVIC_SetPriority(IRQn, NVIC_EncodePriority(prioritygroup, PreemptPriority, SubPriority)); 8002394: 687a ldr r2, [r7, #4] 8002396: 68b9 ldr r1, [r7, #8] 8002398: 6978 ldr r0, [r7, #20] 800239a: f7ff ffb1 bl 8002300 800239e: 4602 mov r2, r0 80023a0: f997 300f ldrsb.w r3, [r7, #15] 80023a4: 4611 mov r1, r2 80023a6: 4618 mov r0, r3 80023a8: f7ff ff80 bl 80022ac <__NVIC_SetPriority> } 80023ac: bf00 nop 80023ae: 3718 adds r7, #24 80023b0: 46bd mov sp, r7 80023b2: bd80 pop {r7, pc} 080023b4 : * This parameter can be an enumerator of IRQn_Type enumeration * (For the complete STM32 Devices IRQ Channels list, please refer to the appropriate CMSIS device file (stm32f7xxxx.h)) * @retval None */ void HAL_NVIC_EnableIRQ(IRQn_Type IRQn) { 80023b4: b580 push {r7, lr} 80023b6: b082 sub sp, #8 80023b8: af00 add r7, sp, #0 80023ba: 4603 mov r3, r0 80023bc: 71fb strb r3, [r7, #7] /* Check the parameters */ assert_param(IS_NVIC_DEVICE_IRQ(IRQn)); /* Enable interrupt */ NVIC_EnableIRQ(IRQn); 80023be: f997 3007 ldrsb.w r3, [r7, #7] 80023c2: 4618 mov r0, r3 80023c4: f7ff ff54 bl 8002270 <__NVIC_EnableIRQ> } 80023c8: bf00 nop 80023ca: 3708 adds r7, #8 80023cc: 46bd mov sp, r7 80023ce: bd80 pop {r7, pc} 080023d0 : * @param GPIO_Init pointer to a GPIO_InitTypeDef structure that contains * the configuration information for the specified GPIO peripheral. * @retval None */ void HAL_GPIO_Init(GPIO_TypeDef *GPIOx, GPIO_InitTypeDef *GPIO_Init) { 80023d0: b480 push {r7} 80023d2: b089 sub sp, #36 @ 0x24 80023d4: af00 add r7, sp, #0 80023d6: 6078 str r0, [r7, #4] 80023d8: 6039 str r1, [r7, #0] uint32_t position = 0x00; 80023da: 2300 movs r3, #0 80023dc: 61fb str r3, [r7, #28] uint32_t ioposition = 0x00; 80023de: 2300 movs r3, #0 80023e0: 617b str r3, [r7, #20] uint32_t iocurrent = 0x00; 80023e2: 2300 movs r3, #0 80023e4: 613b str r3, [r7, #16] uint32_t temp = 0x00; 80023e6: 2300 movs r3, #0 80023e8: 61bb str r3, [r7, #24] assert_param(IS_GPIO_ALL_INSTANCE(GPIOx)); assert_param(IS_GPIO_PIN(GPIO_Init->Pin)); assert_param(IS_GPIO_MODE(GPIO_Init->Mode)); /* Configure the port pins */ for (position = 0; position < GPIO_NUMBER; position++) 80023ea: 2300 movs r3, #0 80023ec: 61fb str r3, [r7, #28] 80023ee: e169 b.n 80026c4 { /* Get the IO position */ ioposition = ((uint32_t)0x01) << position; 80023f0: 2201 movs r2, #1 80023f2: 69fb ldr r3, [r7, #28] 80023f4: fa02 f303 lsl.w r3, r2, r3 80023f8: 617b str r3, [r7, #20] /* Get the current IO position */ iocurrent = (uint32_t)(GPIO_Init->Pin) & ioposition; 80023fa: 683b ldr r3, [r7, #0] 80023fc: 681b ldr r3, [r3, #0] 80023fe: 697a ldr r2, [r7, #20] 8002400: 4013 ands r3, r2 8002402: 613b str r3, [r7, #16] if (iocurrent == ioposition) 8002404: 693a ldr r2, [r7, #16] 8002406: 697b ldr r3, [r7, #20] 8002408: 429a cmp r2, r3 800240a: f040 8158 bne.w 80026be { /*--------------------- GPIO Mode Configuration ------------------------*/ /* In case of Output or Alternate function mode selection */ if (((GPIO_Init->Mode & GPIO_MODE) == MODE_OUTPUT) || ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF)) 800240e: 683b ldr r3, [r7, #0] 8002410: 685b ldr r3, [r3, #4] 8002412: f003 0303 and.w r3, r3, #3 8002416: 2b01 cmp r3, #1 8002418: d005 beq.n 8002426 800241a: 683b ldr r3, [r7, #0] 800241c: 685b ldr r3, [r3, #4] 800241e: f003 0303 and.w r3, r3, #3 8002422: 2b02 cmp r3, #2 8002424: d130 bne.n 8002488 { /* Check the Speed parameter */ assert_param(IS_GPIO_SPEED(GPIO_Init->Speed)); /* Configure the IO Speed */ temp = GPIOx->OSPEEDR; 8002426: 687b ldr r3, [r7, #4] 8002428: 689b ldr r3, [r3, #8] 800242a: 61bb str r3, [r7, #24] temp &= ~(GPIO_OSPEEDER_OSPEEDR0 << (position * 2)); 800242c: 69fb ldr r3, [r7, #28] 800242e: 005b lsls r3, r3, #1 8002430: 2203 movs r2, #3 8002432: fa02 f303 lsl.w r3, r2, r3 8002436: 43db mvns r3, r3 8002438: 69ba ldr r2, [r7, #24] 800243a: 4013 ands r3, r2 800243c: 61bb str r3, [r7, #24] temp |= (GPIO_Init->Speed << (position * 2)); 800243e: 683b ldr r3, [r7, #0] 8002440: 68da ldr r2, [r3, #12] 8002442: 69fb ldr r3, [r7, #28] 8002444: 005b lsls r3, r3, #1 8002446: fa02 f303 lsl.w r3, r2, r3 800244a: 69ba ldr r2, [r7, #24] 800244c: 4313 orrs r3, r2 800244e: 61bb str r3, [r7, #24] GPIOx->OSPEEDR = temp; 8002450: 687b ldr r3, [r7, #4] 8002452: 69ba ldr r2, [r7, #24] 8002454: 609a str r2, [r3, #8] /* Configure the IO Output Type */ temp = GPIOx->OTYPER; 8002456: 687b ldr r3, [r7, #4] 8002458: 685b ldr r3, [r3, #4] 800245a: 61bb str r3, [r7, #24] temp &= ~(GPIO_OTYPER_OT_0 << position) ; 800245c: 2201 movs r2, #1 800245e: 69fb ldr r3, [r7, #28] 8002460: fa02 f303 lsl.w r3, r2, r3 8002464: 43db mvns r3, r3 8002466: 69ba ldr r2, [r7, #24] 8002468: 4013 ands r3, r2 800246a: 61bb str r3, [r7, #24] temp |= (((GPIO_Init->Mode & OUTPUT_TYPE) >> OUTPUT_TYPE_Pos) << position); 800246c: 683b ldr r3, [r7, #0] 800246e: 685b ldr r3, [r3, #4] 8002470: 091b lsrs r3, r3, #4 8002472: f003 0201 and.w r2, r3, #1 8002476: 69fb ldr r3, [r7, #28] 8002478: fa02 f303 lsl.w r3, r2, r3 800247c: 69ba ldr r2, [r7, #24] 800247e: 4313 orrs r3, r2 8002480: 61bb str r3, [r7, #24] GPIOx->OTYPER = temp; 8002482: 687b ldr r3, [r7, #4] 8002484: 69ba ldr r2, [r7, #24] 8002486: 605a str r2, [r3, #4] } if ((GPIO_Init->Mode & GPIO_MODE) != MODE_ANALOG) 8002488: 683b ldr r3, [r7, #0] 800248a: 685b ldr r3, [r3, #4] 800248c: f003 0303 and.w r3, r3, #3 8002490: 2b03 cmp r3, #3 8002492: d017 beq.n 80024c4 { /* Check the Pull parameter */ assert_param(IS_GPIO_PULL(GPIO_Init->Pull)); /* Activate the Pull-up or Pull down resistor for the current IO */ temp = GPIOx->PUPDR; 8002494: 687b ldr r3, [r7, #4] 8002496: 68db ldr r3, [r3, #12] 8002498: 61bb str r3, [r7, #24] temp &= ~(GPIO_PUPDR_PUPDR0 << (position * 2)); 800249a: 69fb ldr r3, [r7, #28] 800249c: 005b lsls r3, r3, #1 800249e: 2203 movs r2, #3 80024a0: fa02 f303 lsl.w r3, r2, r3 80024a4: 43db mvns r3, r3 80024a6: 69ba ldr r2, [r7, #24] 80024a8: 4013 ands r3, r2 80024aa: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Pull) << (position * 2)); 80024ac: 683b ldr r3, [r7, #0] 80024ae: 689a ldr r2, [r3, #8] 80024b0: 69fb ldr r3, [r7, #28] 80024b2: 005b lsls r3, r3, #1 80024b4: fa02 f303 lsl.w r3, r2, r3 80024b8: 69ba ldr r2, [r7, #24] 80024ba: 4313 orrs r3, r2 80024bc: 61bb str r3, [r7, #24] GPIOx->PUPDR = temp; 80024be: 687b ldr r3, [r7, #4] 80024c0: 69ba ldr r2, [r7, #24] 80024c2: 60da str r2, [r3, #12] } /* In case of Alternate function mode selection */ if ((GPIO_Init->Mode & GPIO_MODE) == MODE_AF) 80024c4: 683b ldr r3, [r7, #0] 80024c6: 685b ldr r3, [r3, #4] 80024c8: f003 0303 and.w r3, r3, #3 80024cc: 2b02 cmp r3, #2 80024ce: d123 bne.n 8002518 { /* Check the Alternate function parameter */ assert_param(IS_GPIO_AF(GPIO_Init->Alternate)); /* Configure Alternate function mapped with the current IO */ temp = GPIOx->AFR[position >> 3]; 80024d0: 69fb ldr r3, [r7, #28] 80024d2: 08da lsrs r2, r3, #3 80024d4: 687b ldr r3, [r7, #4] 80024d6: 3208 adds r2, #8 80024d8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80024dc: 61bb str r3, [r7, #24] temp &= ~((uint32_t)0xF << ((uint32_t)(position & (uint32_t)0x07) * 4)) ; 80024de: 69fb ldr r3, [r7, #28] 80024e0: f003 0307 and.w r3, r3, #7 80024e4: 009b lsls r3, r3, #2 80024e6: 220f movs r2, #15 80024e8: fa02 f303 lsl.w r3, r2, r3 80024ec: 43db mvns r3, r3 80024ee: 69ba ldr r2, [r7, #24] 80024f0: 4013 ands r3, r2 80024f2: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_Init->Alternate) << (((uint32_t)position & (uint32_t)0x07) * 4)); 80024f4: 683b ldr r3, [r7, #0] 80024f6: 691a ldr r2, [r3, #16] 80024f8: 69fb ldr r3, [r7, #28] 80024fa: f003 0307 and.w r3, r3, #7 80024fe: 009b lsls r3, r3, #2 8002500: fa02 f303 lsl.w r3, r2, r3 8002504: 69ba ldr r2, [r7, #24] 8002506: 4313 orrs r3, r2 8002508: 61bb str r3, [r7, #24] GPIOx->AFR[position >> 3] = temp; 800250a: 69fb ldr r3, [r7, #28] 800250c: 08da lsrs r2, r3, #3 800250e: 687b ldr r3, [r7, #4] 8002510: 3208 adds r2, #8 8002512: 69b9 ldr r1, [r7, #24] 8002514: f843 1022 str.w r1, [r3, r2, lsl #2] } /* Configure IO Direction mode (Input, Output, Alternate or Analog) */ temp = GPIOx->MODER; 8002518: 687b ldr r3, [r7, #4] 800251a: 681b ldr r3, [r3, #0] 800251c: 61bb str r3, [r7, #24] temp &= ~(GPIO_MODER_MODER0 << (position * 2)); 800251e: 69fb ldr r3, [r7, #28] 8002520: 005b lsls r3, r3, #1 8002522: 2203 movs r2, #3 8002524: fa02 f303 lsl.w r3, r2, r3 8002528: 43db mvns r3, r3 800252a: 69ba ldr r2, [r7, #24] 800252c: 4013 ands r3, r2 800252e: 61bb str r3, [r7, #24] temp |= ((GPIO_Init->Mode & GPIO_MODE) << (position * 2)); 8002530: 683b ldr r3, [r7, #0] 8002532: 685b ldr r3, [r3, #4] 8002534: f003 0203 and.w r2, r3, #3 8002538: 69fb ldr r3, [r7, #28] 800253a: 005b lsls r3, r3, #1 800253c: fa02 f303 lsl.w r3, r2, r3 8002540: 69ba ldr r2, [r7, #24] 8002542: 4313 orrs r3, r2 8002544: 61bb str r3, [r7, #24] GPIOx->MODER = temp; 8002546: 687b ldr r3, [r7, #4] 8002548: 69ba ldr r2, [r7, #24] 800254a: 601a str r2, [r3, #0] /*--------------------- EXTI Mode Configuration ------------------------*/ /* Configure the External Interrupt or event for the current IO */ if ((GPIO_Init->Mode & EXTI_MODE) != 0x00u) 800254c: 683b ldr r3, [r7, #0] 800254e: 685b ldr r3, [r3, #4] 8002550: f403 3340 and.w r3, r3, #196608 @ 0x30000 8002554: 2b00 cmp r3, #0 8002556: f000 80b2 beq.w 80026be { /* Enable SYSCFG Clock */ __HAL_RCC_SYSCFG_CLK_ENABLE(); 800255a: 4b60 ldr r3, [pc, #384] @ (80026dc ) 800255c: 6c5b ldr r3, [r3, #68] @ 0x44 800255e: 4a5f ldr r2, [pc, #380] @ (80026dc ) 8002560: f443 4380 orr.w r3, r3, #16384 @ 0x4000 8002564: 6453 str r3, [r2, #68] @ 0x44 8002566: 4b5d ldr r3, [pc, #372] @ (80026dc ) 8002568: 6c5b ldr r3, [r3, #68] @ 0x44 800256a: f403 4380 and.w r3, r3, #16384 @ 0x4000 800256e: 60fb str r3, [r7, #12] 8002570: 68fb ldr r3, [r7, #12] temp = SYSCFG->EXTICR[position >> 2]; 8002572: 4a5b ldr r2, [pc, #364] @ (80026e0 ) 8002574: 69fb ldr r3, [r7, #28] 8002576: 089b lsrs r3, r3, #2 8002578: 3302 adds r3, #2 800257a: f852 3023 ldr.w r3, [r2, r3, lsl #2] 800257e: 61bb str r3, [r7, #24] temp &= ~(((uint32_t)0x0F) << (4 * (position & 0x03))); 8002580: 69fb ldr r3, [r7, #28] 8002582: f003 0303 and.w r3, r3, #3 8002586: 009b lsls r3, r3, #2 8002588: 220f movs r2, #15 800258a: fa02 f303 lsl.w r3, r2, r3 800258e: 43db mvns r3, r3 8002590: 69ba ldr r2, [r7, #24] 8002592: 4013 ands r3, r2 8002594: 61bb str r3, [r7, #24] temp |= ((uint32_t)(GPIO_GET_INDEX(GPIOx)) << (4 * (position & 0x03))); 8002596: 687b ldr r3, [r7, #4] 8002598: 4a52 ldr r2, [pc, #328] @ (80026e4 ) 800259a: 4293 cmp r3, r2 800259c: d02b beq.n 80025f6 800259e: 687b ldr r3, [r7, #4] 80025a0: 4a51 ldr r2, [pc, #324] @ (80026e8 ) 80025a2: 4293 cmp r3, r2 80025a4: d025 beq.n 80025f2 80025a6: 687b ldr r3, [r7, #4] 80025a8: 4a50 ldr r2, [pc, #320] @ (80026ec ) 80025aa: 4293 cmp r3, r2 80025ac: d01f beq.n 80025ee 80025ae: 687b ldr r3, [r7, #4] 80025b0: 4a4f ldr r2, [pc, #316] @ (80026f0 ) 80025b2: 4293 cmp r3, r2 80025b4: d019 beq.n 80025ea 80025b6: 687b ldr r3, [r7, #4] 80025b8: 4a4e ldr r2, [pc, #312] @ (80026f4 ) 80025ba: 4293 cmp r3, r2 80025bc: d013 beq.n 80025e6 80025be: 687b ldr r3, [r7, #4] 80025c0: 4a4d ldr r2, [pc, #308] @ (80026f8 ) 80025c2: 4293 cmp r3, r2 80025c4: d00d beq.n 80025e2 80025c6: 687b ldr r3, [r7, #4] 80025c8: 4a4c ldr r2, [pc, #304] @ (80026fc ) 80025ca: 4293 cmp r3, r2 80025cc: d007 beq.n 80025de 80025ce: 687b ldr r3, [r7, #4] 80025d0: 4a4b ldr r2, [pc, #300] @ (8002700 ) 80025d2: 4293 cmp r3, r2 80025d4: d101 bne.n 80025da 80025d6: 2307 movs r3, #7 80025d8: e00e b.n 80025f8 80025da: 2308 movs r3, #8 80025dc: e00c b.n 80025f8 80025de: 2306 movs r3, #6 80025e0: e00a b.n 80025f8 80025e2: 2305 movs r3, #5 80025e4: e008 b.n 80025f8 80025e6: 2304 movs r3, #4 80025e8: e006 b.n 80025f8 80025ea: 2303 movs r3, #3 80025ec: e004 b.n 80025f8 80025ee: 2302 movs r3, #2 80025f0: e002 b.n 80025f8 80025f2: 2301 movs r3, #1 80025f4: e000 b.n 80025f8 80025f6: 2300 movs r3, #0 80025f8: 69fa ldr r2, [r7, #28] 80025fa: f002 0203 and.w r2, r2, #3 80025fe: 0092 lsls r2, r2, #2 8002600: 4093 lsls r3, r2 8002602: 69ba ldr r2, [r7, #24] 8002604: 4313 orrs r3, r2 8002606: 61bb str r3, [r7, #24] SYSCFG->EXTICR[position >> 2] = temp; 8002608: 4935 ldr r1, [pc, #212] @ (80026e0 ) 800260a: 69fb ldr r3, [r7, #28] 800260c: 089b lsrs r3, r3, #2 800260e: 3302 adds r3, #2 8002610: 69ba ldr r2, [r7, #24] 8002612: f841 2023 str.w r2, [r1, r3, lsl #2] /* Clear Rising Falling edge configuration */ temp = EXTI->RTSR; 8002616: 4b3b ldr r3, [pc, #236] @ (8002704 ) 8002618: 689b ldr r3, [r3, #8] 800261a: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 800261c: 693b ldr r3, [r7, #16] 800261e: 43db mvns r3, r3 8002620: 69ba ldr r2, [r7, #24] 8002622: 4013 ands r3, r2 8002624: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_RISING) != 0x00u) 8002626: 683b ldr r3, [r7, #0] 8002628: 685b ldr r3, [r3, #4] 800262a: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800262e: 2b00 cmp r3, #0 8002630: d003 beq.n 800263a { temp |= iocurrent; 8002632: 69ba ldr r2, [r7, #24] 8002634: 693b ldr r3, [r7, #16] 8002636: 4313 orrs r3, r2 8002638: 61bb str r3, [r7, #24] } EXTI->RTSR = temp; 800263a: 4a32 ldr r2, [pc, #200] @ (8002704 ) 800263c: 69bb ldr r3, [r7, #24] 800263e: 6093 str r3, [r2, #8] temp = EXTI->FTSR; 8002640: 4b30 ldr r3, [pc, #192] @ (8002704 ) 8002642: 68db ldr r3, [r3, #12] 8002644: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8002646: 693b ldr r3, [r7, #16] 8002648: 43db mvns r3, r3 800264a: 69ba ldr r2, [r7, #24] 800264c: 4013 ands r3, r2 800264e: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & TRIGGER_FALLING) != 0x00u) 8002650: 683b ldr r3, [r7, #0] 8002652: 685b ldr r3, [r3, #4] 8002654: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8002658: 2b00 cmp r3, #0 800265a: d003 beq.n 8002664 { temp |= iocurrent; 800265c: 69ba ldr r2, [r7, #24] 800265e: 693b ldr r3, [r7, #16] 8002660: 4313 orrs r3, r2 8002662: 61bb str r3, [r7, #24] } EXTI->FTSR = temp; 8002664: 4a27 ldr r2, [pc, #156] @ (8002704 ) 8002666: 69bb ldr r3, [r7, #24] 8002668: 60d3 str r3, [r2, #12] temp = EXTI->EMR; 800266a: 4b26 ldr r3, [pc, #152] @ (8002704 ) 800266c: 685b ldr r3, [r3, #4] 800266e: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 8002670: 693b ldr r3, [r7, #16] 8002672: 43db mvns r3, r3 8002674: 69ba ldr r2, [r7, #24] 8002676: 4013 ands r3, r2 8002678: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_EVT) != 0x00u) 800267a: 683b ldr r3, [r7, #0] 800267c: 685b ldr r3, [r3, #4] 800267e: f403 3300 and.w r3, r3, #131072 @ 0x20000 8002682: 2b00 cmp r3, #0 8002684: d003 beq.n 800268e { temp |= iocurrent; 8002686: 69ba ldr r2, [r7, #24] 8002688: 693b ldr r3, [r7, #16] 800268a: 4313 orrs r3, r2 800268c: 61bb str r3, [r7, #24] } EXTI->EMR = temp; 800268e: 4a1d ldr r2, [pc, #116] @ (8002704 ) 8002690: 69bb ldr r3, [r7, #24] 8002692: 6053 str r3, [r2, #4] /* Clear EXTI line configuration */ temp = EXTI->IMR; 8002694: 4b1b ldr r3, [pc, #108] @ (8002704 ) 8002696: 681b ldr r3, [r3, #0] 8002698: 61bb str r3, [r7, #24] temp &= ~((uint32_t)iocurrent); 800269a: 693b ldr r3, [r7, #16] 800269c: 43db mvns r3, r3 800269e: 69ba ldr r2, [r7, #24] 80026a0: 4013 ands r3, r2 80026a2: 61bb str r3, [r7, #24] if ((GPIO_Init->Mode & EXTI_IT) != 0x00u) 80026a4: 683b ldr r3, [r7, #0] 80026a6: 685b ldr r3, [r3, #4] 80026a8: f403 3380 and.w r3, r3, #65536 @ 0x10000 80026ac: 2b00 cmp r3, #0 80026ae: d003 beq.n 80026b8 { temp |= iocurrent; 80026b0: 69ba ldr r2, [r7, #24] 80026b2: 693b ldr r3, [r7, #16] 80026b4: 4313 orrs r3, r2 80026b6: 61bb str r3, [r7, #24] } EXTI->IMR = temp; 80026b8: 4a12 ldr r2, [pc, #72] @ (8002704 ) 80026ba: 69bb ldr r3, [r7, #24] 80026bc: 6013 str r3, [r2, #0] for (position = 0; position < GPIO_NUMBER; position++) 80026be: 69fb ldr r3, [r7, #28] 80026c0: 3301 adds r3, #1 80026c2: 61fb str r3, [r7, #28] 80026c4: 69fb ldr r3, [r7, #28] 80026c6: 2b0f cmp r3, #15 80026c8: f67f ae92 bls.w 80023f0 } } } } 80026cc: bf00 nop 80026ce: bf00 nop 80026d0: 3724 adds r7, #36 @ 0x24 80026d2: 46bd mov sp, r7 80026d4: f85d 7b04 ldr.w r7, [sp], #4 80026d8: 4770 bx lr 80026da: bf00 nop 80026dc: 40023800 .word 0x40023800 80026e0: 40013800 .word 0x40013800 80026e4: 40020000 .word 0x40020000 80026e8: 40020400 .word 0x40020400 80026ec: 40020800 .word 0x40020800 80026f0: 40020c00 .word 0x40020c00 80026f4: 40021000 .word 0x40021000 80026f8: 40021400 .word 0x40021400 80026fc: 40021800 .word 0x40021800 8002700: 40021c00 .word 0x40021c00 8002704: 40013c00 .word 0x40013c00 08002708 : * @arg GPIO_PIN_RESET: to clear the port pin * @arg GPIO_PIN_SET: to set the port pin * @retval None */ void HAL_GPIO_WritePin(GPIO_TypeDef *GPIOx, uint16_t GPIO_Pin, GPIO_PinState PinState) { 8002708: b480 push {r7} 800270a: b083 sub sp, #12 800270c: af00 add r7, sp, #0 800270e: 6078 str r0, [r7, #4] 8002710: 460b mov r3, r1 8002712: 807b strh r3, [r7, #2] 8002714: 4613 mov r3, r2 8002716: 707b strb r3, [r7, #1] /* Check the parameters */ assert_param(IS_GPIO_PIN(GPIO_Pin)); assert_param(IS_GPIO_PIN_ACTION(PinState)); if (PinState != GPIO_PIN_RESET) 8002718: 787b ldrb r3, [r7, #1] 800271a: 2b00 cmp r3, #0 800271c: d003 beq.n 8002726 { GPIOx->BSRR = GPIO_Pin; 800271e: 887a ldrh r2, [r7, #2] 8002720: 687b ldr r3, [r7, #4] 8002722: 619a str r2, [r3, #24] } else { GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; } } 8002724: e003 b.n 800272e GPIOx->BSRR = (uint32_t)GPIO_Pin << 16; 8002726: 887b ldrh r3, [r7, #2] 8002728: 041a lsls r2, r3, #16 800272a: 687b ldr r3, [r7, #4] 800272c: 619a str r2, [r3, #24] } 800272e: bf00 nop 8002730: 370c adds r7, #12 8002732: 46bd mov sp, r7 8002734: f85d 7b04 ldr.w r7, [sp], #4 8002738: 4770 bx lr ... 0800273c : * @param hi2c Pointer to a I2C_HandleTypeDef structure that contains * the configuration information for the specified I2C. * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Init(I2C_HandleTypeDef *hi2c) { 800273c: b580 push {r7, lr} 800273e: b082 sub sp, #8 8002740: af00 add r7, sp, #0 8002742: 6078 str r0, [r7, #4] /* Check the I2C handle allocation */ if (hi2c == NULL) 8002744: 687b ldr r3, [r7, #4] 8002746: 2b00 cmp r3, #0 8002748: d101 bne.n 800274e { return HAL_ERROR; 800274a: 2301 movs r3, #1 800274c: e08b b.n 8002866 assert_param(IS_I2C_OWN_ADDRESS2(hi2c->Init.OwnAddress2)); assert_param(IS_I2C_OWN_ADDRESS2_MASK(hi2c->Init.OwnAddress2Masks)); assert_param(IS_I2C_GENERAL_CALL(hi2c->Init.GeneralCallMode)); assert_param(IS_I2C_NO_STRETCH(hi2c->Init.NoStretchMode)); if (hi2c->State == HAL_I2C_STATE_RESET) 800274e: 687b ldr r3, [r7, #4] 8002750: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002754: b2db uxtb r3, r3 8002756: 2b00 cmp r3, #0 8002758: d106 bne.n 8002768 { /* Allocate lock resource and initialize it */ hi2c->Lock = HAL_UNLOCKED; 800275a: 687b ldr r3, [r7, #4] 800275c: 2200 movs r2, #0 800275e: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ hi2c->MspInitCallback(hi2c); #else /* Init the low level hardware : GPIO, CLOCK, CORTEX...etc */ HAL_I2C_MspInit(hi2c); 8002762: 6878 ldr r0, [r7, #4] 8002764: f7ff fa32 bl 8001bcc #endif /* USE_HAL_I2C_REGISTER_CALLBACKS */ } hi2c->State = HAL_I2C_STATE_BUSY; 8002768: 687b ldr r3, [r7, #4] 800276a: 2224 movs r2, #36 @ 0x24 800276c: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8002770: 687b ldr r3, [r7, #4] 8002772: 681b ldr r3, [r3, #0] 8002774: 681a ldr r2, [r3, #0] 8002776: 687b ldr r3, [r7, #4] 8002778: 681b ldr r3, [r3, #0] 800277a: f022 0201 bic.w r2, r2, #1 800277e: 601a str r2, [r3, #0] /*---------------------------- I2Cx TIMINGR Configuration ------------------*/ /* Configure I2Cx: Frequency range */ hi2c->Instance->TIMINGR = hi2c->Init.Timing & TIMING_CLEAR_MASK; 8002780: 687b ldr r3, [r7, #4] 8002782: 685a ldr r2, [r3, #4] 8002784: 687b ldr r3, [r7, #4] 8002786: 681b ldr r3, [r3, #0] 8002788: f022 6270 bic.w r2, r2, #251658240 @ 0xf000000 800278c: 611a str r2, [r3, #16] /*---------------------------- I2Cx OAR1 Configuration ---------------------*/ /* Disable Own Address1 before set the Own Address1 configuration */ hi2c->Instance->OAR1 &= ~I2C_OAR1_OA1EN; 800278e: 687b ldr r3, [r7, #4] 8002790: 681b ldr r3, [r3, #0] 8002792: 689a ldr r2, [r3, #8] 8002794: 687b ldr r3, [r7, #4] 8002796: 681b ldr r3, [r3, #0] 8002798: f422 4200 bic.w r2, r2, #32768 @ 0x8000 800279c: 609a str r2, [r3, #8] /* Configure I2Cx: Own Address1 and ack own address1 mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_7BIT) 800279e: 687b ldr r3, [r7, #4] 80027a0: 68db ldr r3, [r3, #12] 80027a2: 2b01 cmp r3, #1 80027a4: d107 bne.n 80027b6 { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | hi2c->Init.OwnAddress1); 80027a6: 687b ldr r3, [r7, #4] 80027a8: 689a ldr r2, [r3, #8] 80027aa: 687b ldr r3, [r7, #4] 80027ac: 681b ldr r3, [r3, #0] 80027ae: f442 4200 orr.w r2, r2, #32768 @ 0x8000 80027b2: 609a str r2, [r3, #8] 80027b4: e006 b.n 80027c4 } else /* I2C_ADDRESSINGMODE_10BIT */ { hi2c->Instance->OAR1 = (I2C_OAR1_OA1EN | I2C_OAR1_OA1MODE | hi2c->Init.OwnAddress1); 80027b6: 687b ldr r3, [r7, #4] 80027b8: 689a ldr r2, [r3, #8] 80027ba: 687b ldr r3, [r7, #4] 80027bc: 681b ldr r3, [r3, #0] 80027be: f442 4204 orr.w r2, r2, #33792 @ 0x8400 80027c2: 609a str r2, [r3, #8] } /*---------------------------- I2Cx CR2 Configuration ----------------------*/ /* Configure I2Cx: Addressing Master mode */ if (hi2c->Init.AddressingMode == I2C_ADDRESSINGMODE_10BIT) 80027c4: 687b ldr r3, [r7, #4] 80027c6: 68db ldr r3, [r3, #12] 80027c8: 2b02 cmp r3, #2 80027ca: d108 bne.n 80027de { SET_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 80027cc: 687b ldr r3, [r7, #4] 80027ce: 681b ldr r3, [r3, #0] 80027d0: 685a ldr r2, [r3, #4] 80027d2: 687b ldr r3, [r7, #4] 80027d4: 681b ldr r3, [r3, #0] 80027d6: f442 6200 orr.w r2, r2, #2048 @ 0x800 80027da: 605a str r2, [r3, #4] 80027dc: e007 b.n 80027ee } else { /* Clear the I2C ADD10 bit */ CLEAR_BIT(hi2c->Instance->CR2, I2C_CR2_ADD10); 80027de: 687b ldr r3, [r7, #4] 80027e0: 681b ldr r3, [r3, #0] 80027e2: 685a ldr r2, [r3, #4] 80027e4: 687b ldr r3, [r7, #4] 80027e6: 681b ldr r3, [r3, #0] 80027e8: f422 6200 bic.w r2, r2, #2048 @ 0x800 80027ec: 605a str r2, [r3, #4] } /* Enable the AUTOEND by default, and enable NACK (should be disable only during Slave process */ hi2c->Instance->CR2 |= (I2C_CR2_AUTOEND | I2C_CR2_NACK); 80027ee: 687b ldr r3, [r7, #4] 80027f0: 681b ldr r3, [r3, #0] 80027f2: 6859 ldr r1, [r3, #4] 80027f4: 687b ldr r3, [r7, #4] 80027f6: 681a ldr r2, [r3, #0] 80027f8: 4b1d ldr r3, [pc, #116] @ (8002870 ) 80027fa: 430b orrs r3, r1 80027fc: 6053 str r3, [r2, #4] /*---------------------------- I2Cx OAR2 Configuration ---------------------*/ /* Disable Own Address2 before set the Own Address2 configuration */ hi2c->Instance->OAR2 &= ~I2C_DUALADDRESS_ENABLE; 80027fe: 687b ldr r3, [r7, #4] 8002800: 681b ldr r3, [r3, #0] 8002802: 68da ldr r2, [r3, #12] 8002804: 687b ldr r3, [r7, #4] 8002806: 681b ldr r3, [r3, #0] 8002808: f422 4200 bic.w r2, r2, #32768 @ 0x8000 800280c: 60da str r2, [r3, #12] /* Configure I2Cx: Dual mode and Own Address2 */ hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 800280e: 687b ldr r3, [r7, #4] 8002810: 691a ldr r2, [r3, #16] 8002812: 687b ldr r3, [r7, #4] 8002814: 695b ldr r3, [r3, #20] 8002816: ea42 0103 orr.w r1, r2, r3 (hi2c->Init.OwnAddress2Masks << 8)); 800281a: 687b ldr r3, [r7, #4] 800281c: 699b ldr r3, [r3, #24] 800281e: 021a lsls r2, r3, #8 hi2c->Instance->OAR2 = (hi2c->Init.DualAddressMode | hi2c->Init.OwnAddress2 | \ 8002820: 687b ldr r3, [r7, #4] 8002822: 681b ldr r3, [r3, #0] 8002824: 430a orrs r2, r1 8002826: 60da str r2, [r3, #12] /*---------------------------- I2Cx CR1 Configuration ----------------------*/ /* Configure I2Cx: Generalcall and NoStretch mode */ hi2c->Instance->CR1 = (hi2c->Init.GeneralCallMode | hi2c->Init.NoStretchMode); 8002828: 687b ldr r3, [r7, #4] 800282a: 69d9 ldr r1, [r3, #28] 800282c: 687b ldr r3, [r7, #4] 800282e: 6a1a ldr r2, [r3, #32] 8002830: 687b ldr r3, [r7, #4] 8002832: 681b ldr r3, [r3, #0] 8002834: 430a orrs r2, r1 8002836: 601a str r2, [r3, #0] /* Enable the selected I2C peripheral */ __HAL_I2C_ENABLE(hi2c); 8002838: 687b ldr r3, [r7, #4] 800283a: 681b ldr r3, [r3, #0] 800283c: 681a ldr r2, [r3, #0] 800283e: 687b ldr r3, [r7, #4] 8002840: 681b ldr r3, [r3, #0] 8002842: f042 0201 orr.w r2, r2, #1 8002846: 601a str r2, [r3, #0] hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 8002848: 687b ldr r3, [r7, #4] 800284a: 2200 movs r2, #0 800284c: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 800284e: 687b ldr r3, [r7, #4] 8002850: 2220 movs r2, #32 8002852: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->PreviousState = I2C_STATE_NONE; 8002856: 687b ldr r3, [r7, #4] 8002858: 2200 movs r2, #0 800285a: 631a str r2, [r3, #48] @ 0x30 hi2c->Mode = HAL_I2C_MODE_NONE; 800285c: 687b ldr r3, [r7, #4] 800285e: 2200 movs r2, #0 8002860: f883 2042 strb.w r2, [r3, #66] @ 0x42 return HAL_OK; 8002864: 2300 movs r3, #0 } 8002866: 4618 mov r0, r3 8002868: 3708 adds r7, #8 800286a: 46bd mov sp, r7 800286c: bd80 pop {r7, pc} 800286e: bf00 nop 8002870: 02008000 .word 0x02008000 08002874 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef HAL_I2C_Mem_Read(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8002874: b580 push {r7, lr} 8002876: b088 sub sp, #32 8002878: af02 add r7, sp, #8 800287a: 60f8 str r0, [r7, #12] 800287c: 4608 mov r0, r1 800287e: 4611 mov r1, r2 8002880: 461a mov r2, r3 8002882: 4603 mov r3, r0 8002884: 817b strh r3, [r7, #10] 8002886: 460b mov r3, r1 8002888: 813b strh r3, [r7, #8] 800288a: 4613 mov r3, r2 800288c: 80fb strh r3, [r7, #6] uint32_t tickstart; /* Check the parameters */ assert_param(IS_I2C_MEMADD_SIZE(MemAddSize)); if (hi2c->State == HAL_I2C_STATE_READY) 800288e: 68fb ldr r3, [r7, #12] 8002890: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002894: b2db uxtb r3, r3 8002896: 2b20 cmp r3, #32 8002898: f040 80fd bne.w 8002a96 { if ((pData == NULL) || (Size == 0U)) 800289c: 6a3b ldr r3, [r7, #32] 800289e: 2b00 cmp r3, #0 80028a0: d002 beq.n 80028a8 80028a2: 8cbb ldrh r3, [r7, #36] @ 0x24 80028a4: 2b00 cmp r3, #0 80028a6: d105 bne.n 80028b4 { hi2c->ErrorCode = HAL_I2C_ERROR_INVALID_PARAM; 80028a8: 68fb ldr r3, [r7, #12] 80028aa: f44f 7200 mov.w r2, #512 @ 0x200 80028ae: 645a str r2, [r3, #68] @ 0x44 return HAL_ERROR; 80028b0: 2301 movs r3, #1 80028b2: e0f1 b.n 8002a98 } /* Process Locked */ __HAL_LOCK(hi2c); 80028b4: 68fb ldr r3, [r7, #12] 80028b6: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 80028ba: 2b01 cmp r3, #1 80028bc: d101 bne.n 80028c2 80028be: 2302 movs r3, #2 80028c0: e0ea b.n 8002a98 80028c2: 68fb ldr r3, [r7, #12] 80028c4: 2201 movs r2, #1 80028c6: f883 2040 strb.w r2, [r3, #64] @ 0x40 /* Init tickstart for timeout management*/ tickstart = HAL_GetTick(); 80028ca: f7ff fc6f bl 80021ac 80028ce: 6178 str r0, [r7, #20] if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_BUSY, SET, I2C_TIMEOUT_BUSY, tickstart) != HAL_OK) 80028d0: 697b ldr r3, [r7, #20] 80028d2: 9300 str r3, [sp, #0] 80028d4: 2319 movs r3, #25 80028d6: 2201 movs r2, #1 80028d8: f44f 4100 mov.w r1, #32768 @ 0x8000 80028dc: 68f8 ldr r0, [r7, #12] 80028de: f000 f95b bl 8002b98 80028e2: 4603 mov r3, r0 80028e4: 2b00 cmp r3, #0 80028e6: d001 beq.n 80028ec { return HAL_ERROR; 80028e8: 2301 movs r3, #1 80028ea: e0d5 b.n 8002a98 } hi2c->State = HAL_I2C_STATE_BUSY_RX; 80028ec: 68fb ldr r3, [r7, #12] 80028ee: 2222 movs r2, #34 @ 0x22 80028f0: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_MEM; 80028f4: 68fb ldr r3, [r7, #12] 80028f6: 2240 movs r2, #64 @ 0x40 80028f8: f883 2042 strb.w r2, [r3, #66] @ 0x42 hi2c->ErrorCode = HAL_I2C_ERROR_NONE; 80028fc: 68fb ldr r3, [r7, #12] 80028fe: 2200 movs r2, #0 8002900: 645a str r2, [r3, #68] @ 0x44 /* Prepare transfer parameters */ hi2c->pBuffPtr = pData; 8002902: 68fb ldr r3, [r7, #12] 8002904: 6a3a ldr r2, [r7, #32] 8002906: 625a str r2, [r3, #36] @ 0x24 hi2c->XferCount = Size; 8002908: 68fb ldr r3, [r7, #12] 800290a: 8cba ldrh r2, [r7, #36] @ 0x24 800290c: 855a strh r2, [r3, #42] @ 0x2a hi2c->XferISR = NULL; 800290e: 68fb ldr r3, [r7, #12] 8002910: 2200 movs r2, #0 8002912: 635a str r2, [r3, #52] @ 0x34 /* Send Slave Address and Memory Address */ if (I2C_RequestMemoryRead(hi2c, DevAddress, MemAddress, MemAddSize, Timeout, tickstart) != HAL_OK) 8002914: 88f8 ldrh r0, [r7, #6] 8002916: 893a ldrh r2, [r7, #8] 8002918: 8979 ldrh r1, [r7, #10] 800291a: 697b ldr r3, [r7, #20] 800291c: 9301 str r3, [sp, #4] 800291e: 6abb ldr r3, [r7, #40] @ 0x28 8002920: 9300 str r3, [sp, #0] 8002922: 4603 mov r3, r0 8002924: 68f8 ldr r0, [r7, #12] 8002926: f000 f8bf bl 8002aa8 800292a: 4603 mov r3, r0 800292c: 2b00 cmp r3, #0 800292e: d005 beq.n 800293c { /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002930: 68fb ldr r3, [r7, #12] 8002932: 2200 movs r2, #0 8002934: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8002938: 2301 movs r3, #1 800293a: e0ad b.n 8002a98 } /* Send Slave Address */ /* Set NBYTES to write and reload if hi2c->XferCount > MAX_NBYTE_SIZE and generate RESTART */ if (hi2c->XferCount > MAX_NBYTE_SIZE) 800293c: 68fb ldr r3, [r7, #12] 800293e: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002940: b29b uxth r3, r3 8002942: 2bff cmp r3, #255 @ 0xff 8002944: d90e bls.n 8002964 { hi2c->XferSize = 1U; 8002946: 68fb ldr r3, [r7, #12] 8002948: 2201 movs r2, #1 800294a: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_RELOAD_MODE, 800294c: 68fb ldr r3, [r7, #12] 800294e: 8d1b ldrh r3, [r3, #40] @ 0x28 8002950: b2da uxtb r2, r3 8002952: 8979 ldrh r1, [r7, #10] 8002954: 4b52 ldr r3, [pc, #328] @ (8002aa0 ) 8002956: 9300 str r3, [sp, #0] 8002958: f04f 7380 mov.w r3, #16777216 @ 0x1000000 800295c: 68f8 ldr r0, [r7, #12] 800295e: f000 fadf bl 8002f20 8002962: e00f b.n 8002984 I2C_GENERATE_START_READ); } else { hi2c->XferSize = hi2c->XferCount; 8002964: 68fb ldr r3, [r7, #12] 8002966: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002968: b29a uxth r2, r3 800296a: 68fb ldr r3, [r7, #12] 800296c: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 800296e: 68fb ldr r3, [r7, #12] 8002970: 8d1b ldrh r3, [r3, #40] @ 0x28 8002972: b2da uxtb r2, r3 8002974: 8979 ldrh r1, [r7, #10] 8002976: 4b4a ldr r3, [pc, #296] @ (8002aa0 ) 8002978: 9300 str r3, [sp, #0] 800297a: f04f 7300 mov.w r3, #33554432 @ 0x2000000 800297e: 68f8 ldr r0, [r7, #12] 8002980: f000 face bl 8002f20 } do { /* Wait until RXNE flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_RXNE, RESET, Timeout, tickstart) != HAL_OK) 8002984: 697b ldr r3, [r7, #20] 8002986: 9300 str r3, [sp, #0] 8002988: 6abb ldr r3, [r7, #40] @ 0x28 800298a: 2200 movs r2, #0 800298c: 2104 movs r1, #4 800298e: 68f8 ldr r0, [r7, #12] 8002990: f000 f902 bl 8002b98 8002994: 4603 mov r3, r0 8002996: 2b00 cmp r3, #0 8002998: d001 beq.n 800299e { return HAL_ERROR; 800299a: 2301 movs r3, #1 800299c: e07c b.n 8002a98 } /* Read data from RXDR */ *hi2c->pBuffPtr = (uint8_t)hi2c->Instance->RXDR; 800299e: 68fb ldr r3, [r7, #12] 80029a0: 681b ldr r3, [r3, #0] 80029a2: 6a5a ldr r2, [r3, #36] @ 0x24 80029a4: 68fb ldr r3, [r7, #12] 80029a6: 6a5b ldr r3, [r3, #36] @ 0x24 80029a8: b2d2 uxtb r2, r2 80029aa: 701a strb r2, [r3, #0] /* Increment Buffer pointer */ hi2c->pBuffPtr++; 80029ac: 68fb ldr r3, [r7, #12] 80029ae: 6a5b ldr r3, [r3, #36] @ 0x24 80029b0: 1c5a adds r2, r3, #1 80029b2: 68fb ldr r3, [r7, #12] 80029b4: 625a str r2, [r3, #36] @ 0x24 hi2c->XferSize--; 80029b6: 68fb ldr r3, [r7, #12] 80029b8: 8d1b ldrh r3, [r3, #40] @ 0x28 80029ba: 3b01 subs r3, #1 80029bc: b29a uxth r2, r3 80029be: 68fb ldr r3, [r7, #12] 80029c0: 851a strh r2, [r3, #40] @ 0x28 hi2c->XferCount--; 80029c2: 68fb ldr r3, [r7, #12] 80029c4: 8d5b ldrh r3, [r3, #42] @ 0x2a 80029c6: b29b uxth r3, r3 80029c8: 3b01 subs r3, #1 80029ca: b29a uxth r2, r3 80029cc: 68fb ldr r3, [r7, #12] 80029ce: 855a strh r2, [r3, #42] @ 0x2a if ((hi2c->XferCount != 0U) && (hi2c->XferSize == 0U)) 80029d0: 68fb ldr r3, [r7, #12] 80029d2: 8d5b ldrh r3, [r3, #42] @ 0x2a 80029d4: b29b uxth r3, r3 80029d6: 2b00 cmp r3, #0 80029d8: d034 beq.n 8002a44 80029da: 68fb ldr r3, [r7, #12] 80029dc: 8d1b ldrh r3, [r3, #40] @ 0x28 80029de: 2b00 cmp r3, #0 80029e0: d130 bne.n 8002a44 { /* Wait until TCR flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TCR, RESET, Timeout, tickstart) != HAL_OK) 80029e2: 697b ldr r3, [r7, #20] 80029e4: 9300 str r3, [sp, #0] 80029e6: 6abb ldr r3, [r7, #40] @ 0x28 80029e8: 2200 movs r2, #0 80029ea: 2180 movs r1, #128 @ 0x80 80029ec: 68f8 ldr r0, [r7, #12] 80029ee: f000 f8d3 bl 8002b98 80029f2: 4603 mov r3, r0 80029f4: 2b00 cmp r3, #0 80029f6: d001 beq.n 80029fc { return HAL_ERROR; 80029f8: 2301 movs r3, #1 80029fa: e04d b.n 8002a98 } if (hi2c->XferCount > MAX_NBYTE_SIZE) 80029fc: 68fb ldr r3, [r7, #12] 80029fe: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002a00: b29b uxth r3, r3 8002a02: 2bff cmp r3, #255 @ 0xff 8002a04: d90e bls.n 8002a24 { hi2c->XferSize = 1U; 8002a06: 68fb ldr r3, [r7, #12] 8002a08: 2201 movs r2, #1 8002a0a: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t) hi2c->XferSize, I2C_RELOAD_MODE, 8002a0c: 68fb ldr r3, [r7, #12] 8002a0e: 8d1b ldrh r3, [r3, #40] @ 0x28 8002a10: b2da uxtb r2, r3 8002a12: 8979 ldrh r1, [r7, #10] 8002a14: 2300 movs r3, #0 8002a16: 9300 str r3, [sp, #0] 8002a18: f04f 7380 mov.w r3, #16777216 @ 0x1000000 8002a1c: 68f8 ldr r0, [r7, #12] 8002a1e: f000 fa7f bl 8002f20 8002a22: e00f b.n 8002a44 I2C_NO_STARTSTOP); } else { hi2c->XferSize = hi2c->XferCount; 8002a24: 68fb ldr r3, [r7, #12] 8002a26: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002a28: b29a uxth r2, r3 8002a2a: 68fb ldr r3, [r7, #12] 8002a2c: 851a strh r2, [r3, #40] @ 0x28 I2C_TransferConfig(hi2c, DevAddress, (uint8_t)hi2c->XferSize, I2C_AUTOEND_MODE, 8002a2e: 68fb ldr r3, [r7, #12] 8002a30: 8d1b ldrh r3, [r3, #40] @ 0x28 8002a32: b2da uxtb r2, r3 8002a34: 8979 ldrh r1, [r7, #10] 8002a36: 2300 movs r3, #0 8002a38: 9300 str r3, [sp, #0] 8002a3a: f04f 7300 mov.w r3, #33554432 @ 0x2000000 8002a3e: 68f8 ldr r0, [r7, #12] 8002a40: f000 fa6e bl 8002f20 I2C_NO_STARTSTOP); } } } while (hi2c->XferCount > 0U); 8002a44: 68fb ldr r3, [r7, #12] 8002a46: 8d5b ldrh r3, [r3, #42] @ 0x2a 8002a48: b29b uxth r3, r3 8002a4a: 2b00 cmp r3, #0 8002a4c: d19a bne.n 8002984 /* No need to Check TC flag, with AUTOEND mode the stop is automatically generated */ /* Wait until STOPF flag is reset */ if (I2C_WaitOnSTOPFlagUntilTimeout(hi2c, Timeout, tickstart) != HAL_OK) 8002a4e: 697a ldr r2, [r7, #20] 8002a50: 6ab9 ldr r1, [r7, #40] @ 0x28 8002a52: 68f8 ldr r0, [r7, #12] 8002a54: f000 f940 bl 8002cd8 8002a58: 4603 mov r3, r0 8002a5a: 2b00 cmp r3, #0 8002a5c: d001 beq.n 8002a62 { return HAL_ERROR; 8002a5e: 2301 movs r3, #1 8002a60: e01a b.n 8002a98 } /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8002a62: 68fb ldr r3, [r7, #12] 8002a64: 681b ldr r3, [r3, #0] 8002a66: 2220 movs r2, #32 8002a68: 61da str r2, [r3, #28] /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8002a6a: 68fb ldr r3, [r7, #12] 8002a6c: 681b ldr r3, [r3, #0] 8002a6e: 6859 ldr r1, [r3, #4] 8002a70: 68fb ldr r3, [r7, #12] 8002a72: 681a ldr r2, [r3, #0] 8002a74: 4b0b ldr r3, [pc, #44] @ (8002aa4 ) 8002a76: 400b ands r3, r1 8002a78: 6053 str r3, [r2, #4] hi2c->State = HAL_I2C_STATE_READY; 8002a7a: 68fb ldr r3, [r7, #12] 8002a7c: 2220 movs r2, #32 8002a7e: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002a82: 68fb ldr r3, [r7, #12] 8002a84: 2200 movs r2, #0 8002a86: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002a8a: 68fb ldr r3, [r7, #12] 8002a8c: 2200 movs r2, #0 8002a8e: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8002a92: 2300 movs r3, #0 8002a94: e000 b.n 8002a98 } else { return HAL_BUSY; 8002a96: 2302 movs r3, #2 } } 8002a98: 4618 mov r0, r3 8002a9a: 3718 adds r7, #24 8002a9c: 46bd mov sp, r7 8002a9e: bd80 pop {r7, pc} 8002aa0: 80002400 .word 0x80002400 8002aa4: fe00e800 .word 0xfe00e800 08002aa8 : * @retval HAL status */ static HAL_StatusTypeDef I2C_RequestMemoryRead(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint16_t MemAddress, uint16_t MemAddSize, uint32_t Timeout, uint32_t Tickstart) { 8002aa8: b580 push {r7, lr} 8002aaa: b086 sub sp, #24 8002aac: af02 add r7, sp, #8 8002aae: 60f8 str r0, [r7, #12] 8002ab0: 4608 mov r0, r1 8002ab2: 4611 mov r1, r2 8002ab4: 461a mov r2, r3 8002ab6: 4603 mov r3, r0 8002ab8: 817b strh r3, [r7, #10] 8002aba: 460b mov r3, r1 8002abc: 813b strh r3, [r7, #8] 8002abe: 4613 mov r3, r2 8002ac0: 80fb strh r3, [r7, #6] I2C_TransferConfig(hi2c, DevAddress, (uint8_t)MemAddSize, I2C_SOFTEND_MODE, I2C_GENERATE_START_WRITE); 8002ac2: 88fb ldrh r3, [r7, #6] 8002ac4: b2da uxtb r2, r3 8002ac6: 8979 ldrh r1, [r7, #10] 8002ac8: 4b20 ldr r3, [pc, #128] @ (8002b4c ) 8002aca: 9300 str r3, [sp, #0] 8002acc: 2300 movs r3, #0 8002ace: 68f8 ldr r0, [r7, #12] 8002ad0: f000 fa26 bl 8002f20 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002ad4: 69fa ldr r2, [r7, #28] 8002ad6: 69b9 ldr r1, [r7, #24] 8002ad8: 68f8 ldr r0, [r7, #12] 8002ada: f000 f8b6 bl 8002c4a 8002ade: 4603 mov r3, r0 8002ae0: 2b00 cmp r3, #0 8002ae2: d001 beq.n 8002ae8 { return HAL_ERROR; 8002ae4: 2301 movs r3, #1 8002ae6: e02c b.n 8002b42 } /* If Memory address size is 8Bit */ if (MemAddSize == I2C_MEMADD_SIZE_8BIT) 8002ae8: 88fb ldrh r3, [r7, #6] 8002aea: 2b01 cmp r3, #1 8002aec: d105 bne.n 8002afa { /* Send Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8002aee: 893b ldrh r3, [r7, #8] 8002af0: b2da uxtb r2, r3 8002af2: 68fb ldr r3, [r7, #12] 8002af4: 681b ldr r3, [r3, #0] 8002af6: 629a str r2, [r3, #40] @ 0x28 8002af8: e015 b.n 8002b26 } /* If Memory address size is 16Bit */ else { /* Send MSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_MSB(MemAddress); 8002afa: 893b ldrh r3, [r7, #8] 8002afc: 0a1b lsrs r3, r3, #8 8002afe: b29b uxth r3, r3 8002b00: b2da uxtb r2, r3 8002b02: 68fb ldr r3, [r7, #12] 8002b04: 681b ldr r3, [r3, #0] 8002b06: 629a str r2, [r3, #40] @ 0x28 /* Wait until TXIS flag is set */ if (I2C_WaitOnTXISFlagUntilTimeout(hi2c, Timeout, Tickstart) != HAL_OK) 8002b08: 69fa ldr r2, [r7, #28] 8002b0a: 69b9 ldr r1, [r7, #24] 8002b0c: 68f8 ldr r0, [r7, #12] 8002b0e: f000 f89c bl 8002c4a 8002b12: 4603 mov r3, r0 8002b14: 2b00 cmp r3, #0 8002b16: d001 beq.n 8002b1c { return HAL_ERROR; 8002b18: 2301 movs r3, #1 8002b1a: e012 b.n 8002b42 } /* Send LSB of Memory Address */ hi2c->Instance->TXDR = I2C_MEM_ADD_LSB(MemAddress); 8002b1c: 893b ldrh r3, [r7, #8] 8002b1e: b2da uxtb r2, r3 8002b20: 68fb ldr r3, [r7, #12] 8002b22: 681b ldr r3, [r3, #0] 8002b24: 629a str r2, [r3, #40] @ 0x28 } /* Wait until TC flag is set */ if (I2C_WaitOnFlagUntilTimeout(hi2c, I2C_FLAG_TC, RESET, Timeout, Tickstart) != HAL_OK) 8002b26: 69fb ldr r3, [r7, #28] 8002b28: 9300 str r3, [sp, #0] 8002b2a: 69bb ldr r3, [r7, #24] 8002b2c: 2200 movs r2, #0 8002b2e: 2140 movs r1, #64 @ 0x40 8002b30: 68f8 ldr r0, [r7, #12] 8002b32: f000 f831 bl 8002b98 8002b36: 4603 mov r3, r0 8002b38: 2b00 cmp r3, #0 8002b3a: d001 beq.n 8002b40 { return HAL_ERROR; 8002b3c: 2301 movs r3, #1 8002b3e: e000 b.n 8002b42 } return HAL_OK; 8002b40: 2300 movs r3, #0 } 8002b42: 4618 mov r0, r3 8002b44: 3710 adds r7, #16 8002b46: 46bd mov sp, r7 8002b48: bd80 pop {r7, pc} 8002b4a: bf00 nop 8002b4c: 80002000 .word 0x80002000 08002b50 : * @brief I2C Tx data register flush process. * @param hi2c I2C handle. * @retval None */ static void I2C_Flush_TXDR(I2C_HandleTypeDef *hi2c) { 8002b50: b480 push {r7} 8002b52: b083 sub sp, #12 8002b54: af00 add r7, sp, #0 8002b56: 6078 str r0, [r7, #4] /* If a pending TXIS flag is set */ /* Write a dummy data in TXDR to clear it */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) != RESET) 8002b58: 687b ldr r3, [r7, #4] 8002b5a: 681b ldr r3, [r3, #0] 8002b5c: 699b ldr r3, [r3, #24] 8002b5e: f003 0302 and.w r3, r3, #2 8002b62: 2b02 cmp r3, #2 8002b64: d103 bne.n 8002b6e { hi2c->Instance->TXDR = 0x00U; 8002b66: 687b ldr r3, [r7, #4] 8002b68: 681b ldr r3, [r3, #0] 8002b6a: 2200 movs r2, #0 8002b6c: 629a str r2, [r3, #40] @ 0x28 } /* Flush TX register if not empty */ if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXE) == RESET) 8002b6e: 687b ldr r3, [r7, #4] 8002b70: 681b ldr r3, [r3, #0] 8002b72: 699b ldr r3, [r3, #24] 8002b74: f003 0301 and.w r3, r3, #1 8002b78: 2b01 cmp r3, #1 8002b7a: d007 beq.n 8002b8c { __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_TXE); 8002b7c: 687b ldr r3, [r7, #4] 8002b7e: 681b ldr r3, [r3, #0] 8002b80: 699a ldr r2, [r3, #24] 8002b82: 687b ldr r3, [r7, #4] 8002b84: 681b ldr r3, [r3, #0] 8002b86: f042 0201 orr.w r2, r2, #1 8002b8a: 619a str r2, [r3, #24] } } 8002b8c: bf00 nop 8002b8e: 370c adds r7, #12 8002b90: 46bd mov sp, r7 8002b92: f85d 7b04 ldr.w r7, [sp], #4 8002b96: 4770 bx lr 08002b98 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Flag, FlagStatus Status, uint32_t Timeout, uint32_t Tickstart) { 8002b98: b580 push {r7, lr} 8002b9a: b084 sub sp, #16 8002b9c: af00 add r7, sp, #0 8002b9e: 60f8 str r0, [r7, #12] 8002ba0: 60b9 str r1, [r7, #8] 8002ba2: 603b str r3, [r7, #0] 8002ba4: 4613 mov r3, r2 8002ba6: 71fb strb r3, [r7, #7] while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002ba8: e03b b.n 8002c22 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8002baa: 69ba ldr r2, [r7, #24] 8002bac: 6839 ldr r1, [r7, #0] 8002bae: 68f8 ldr r0, [r7, #12] 8002bb0: f000 f8d6 bl 8002d60 8002bb4: 4603 mov r3, r0 8002bb6: 2b00 cmp r3, #0 8002bb8: d001 beq.n 8002bbe { return HAL_ERROR; 8002bba: 2301 movs r3, #1 8002bbc: e041 b.n 8002c42 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002bbe: 683b ldr r3, [r7, #0] 8002bc0: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8002bc4: d02d beq.n 8002c22 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002bc6: f7ff faf1 bl 80021ac 8002bca: 4602 mov r2, r0 8002bcc: 69bb ldr r3, [r7, #24] 8002bce: 1ad3 subs r3, r2, r3 8002bd0: 683a ldr r2, [r7, #0] 8002bd2: 429a cmp r2, r3 8002bd4: d302 bcc.n 8002bdc 8002bd6: 683b ldr r3, [r7, #0] 8002bd8: 2b00 cmp r3, #0 8002bda: d122 bne.n 8002c22 { if (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002bdc: 68fb ldr r3, [r7, #12] 8002bde: 681b ldr r3, [r3, #0] 8002be0: 699a ldr r2, [r3, #24] 8002be2: 68bb ldr r3, [r7, #8] 8002be4: 4013 ands r3, r2 8002be6: 68ba ldr r2, [r7, #8] 8002be8: 429a cmp r2, r3 8002bea: bf0c ite eq 8002bec: 2301 moveq r3, #1 8002bee: 2300 movne r3, #0 8002bf0: b2db uxtb r3, r3 8002bf2: 461a mov r2, r3 8002bf4: 79fb ldrb r3, [r7, #7] 8002bf6: 429a cmp r2, r3 8002bf8: d113 bne.n 8002c22 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002bfa: 68fb ldr r3, [r7, #12] 8002bfc: 6c5b ldr r3, [r3, #68] @ 0x44 8002bfe: f043 0220 orr.w r2, r3, #32 8002c02: 68fb ldr r3, [r7, #12] 8002c04: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8002c06: 68fb ldr r3, [r7, #12] 8002c08: 2220 movs r2, #32 8002c0a: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002c0e: 68fb ldr r3, [r7, #12] 8002c10: 2200 movs r2, #0 8002c12: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002c16: 68fb ldr r3, [r7, #12] 8002c18: 2200 movs r2, #0 8002c1a: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8002c1e: 2301 movs r3, #1 8002c20: e00f b.n 8002c42 while (__HAL_I2C_GET_FLAG(hi2c, Flag) == Status) 8002c22: 68fb ldr r3, [r7, #12] 8002c24: 681b ldr r3, [r3, #0] 8002c26: 699a ldr r2, [r3, #24] 8002c28: 68bb ldr r3, [r7, #8] 8002c2a: 4013 ands r3, r2 8002c2c: 68ba ldr r2, [r7, #8] 8002c2e: 429a cmp r2, r3 8002c30: bf0c ite eq 8002c32: 2301 moveq r3, #1 8002c34: 2300 movne r3, #0 8002c36: b2db uxtb r3, r3 8002c38: 461a mov r2, r3 8002c3a: 79fb ldrb r3, [r7, #7] 8002c3c: 429a cmp r2, r3 8002c3e: d0b4 beq.n 8002baa } } } } return HAL_OK; 8002c40: 2300 movs r3, #0 } 8002c42: 4618 mov r0, r3 8002c44: 3710 adds r7, #16 8002c46: 46bd mov sp, r7 8002c48: bd80 pop {r7, pc} 08002c4a : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnTXISFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002c4a: b580 push {r7, lr} 8002c4c: b084 sub sp, #16 8002c4e: af00 add r7, sp, #0 8002c50: 60f8 str r0, [r7, #12] 8002c52: 60b9 str r1, [r7, #8] 8002c54: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8002c56: e033 b.n 8002cc0 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8002c58: 687a ldr r2, [r7, #4] 8002c5a: 68b9 ldr r1, [r7, #8] 8002c5c: 68f8 ldr r0, [r7, #12] 8002c5e: f000 f87f bl 8002d60 8002c62: 4603 mov r3, r0 8002c64: 2b00 cmp r3, #0 8002c66: d001 beq.n 8002c6c { return HAL_ERROR; 8002c68: 2301 movs r3, #1 8002c6a: e031 b.n 8002cd0 } /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002c6c: 68bb ldr r3, [r7, #8] 8002c6e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8002c72: d025 beq.n 8002cc0 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002c74: f7ff fa9a bl 80021ac 8002c78: 4602 mov r2, r0 8002c7a: 687b ldr r3, [r7, #4] 8002c7c: 1ad3 subs r3, r2, r3 8002c7e: 68ba ldr r2, [r7, #8] 8002c80: 429a cmp r2, r3 8002c82: d302 bcc.n 8002c8a 8002c84: 68bb ldr r3, [r7, #8] 8002c86: 2b00 cmp r3, #0 8002c88: d11a bne.n 8002cc0 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8002c8a: 68fb ldr r3, [r7, #12] 8002c8c: 681b ldr r3, [r3, #0] 8002c8e: 699b ldr r3, [r3, #24] 8002c90: f003 0302 and.w r3, r3, #2 8002c94: 2b02 cmp r3, #2 8002c96: d013 beq.n 8002cc0 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002c98: 68fb ldr r3, [r7, #12] 8002c9a: 6c5b ldr r3, [r3, #68] @ 0x44 8002c9c: f043 0220 orr.w r2, r3, #32 8002ca0: 68fb ldr r3, [r7, #12] 8002ca2: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8002ca4: 68fb ldr r3, [r7, #12] 8002ca6: 2220 movs r2, #32 8002ca8: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002cac: 68fb ldr r3, [r7, #12] 8002cae: 2200 movs r2, #0 8002cb0: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002cb4: 68fb ldr r3, [r7, #12] 8002cb6: 2200 movs r2, #0 8002cb8: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8002cbc: 2301 movs r3, #1 8002cbe: e007 b.n 8002cd0 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_TXIS) == RESET) 8002cc0: 68fb ldr r3, [r7, #12] 8002cc2: 681b ldr r3, [r3, #0] 8002cc4: 699b ldr r3, [r3, #24] 8002cc6: f003 0302 and.w r3, r3, #2 8002cca: 2b02 cmp r3, #2 8002ccc: d1c4 bne.n 8002c58 } } } } return HAL_OK; 8002cce: 2300 movs r3, #0 } 8002cd0: 4618 mov r0, r3 8002cd2: 3710 adds r7, #16 8002cd4: 46bd mov sp, r7 8002cd6: bd80 pop {r7, pc} 08002cd8 : * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_WaitOnSTOPFlagUntilTimeout(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002cd8: b580 push {r7, lr} 8002cda: b084 sub sp, #16 8002cdc: af00 add r7, sp, #0 8002cde: 60f8 str r0, [r7, #12] 8002ce0: 60b9 str r1, [r7, #8] 8002ce2: 607a str r2, [r7, #4] while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8002ce4: e02f b.n 8002d46 { /* Check if an error is detected */ if (I2C_IsErrorOccurred(hi2c, Timeout, Tickstart) != HAL_OK) 8002ce6: 687a ldr r2, [r7, #4] 8002ce8: 68b9 ldr r1, [r7, #8] 8002cea: 68f8 ldr r0, [r7, #12] 8002cec: f000 f838 bl 8002d60 8002cf0: 4603 mov r3, r0 8002cf2: 2b00 cmp r3, #0 8002cf4: d001 beq.n 8002cfa { return HAL_ERROR; 8002cf6: 2301 movs r3, #1 8002cf8: e02d b.n 8002d56 } /* Check for the Timeout */ if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8002cfa: f7ff fa57 bl 80021ac 8002cfe: 4602 mov r2, r0 8002d00: 687b ldr r3, [r7, #4] 8002d02: 1ad3 subs r3, r2, r3 8002d04: 68ba ldr r2, [r7, #8] 8002d06: 429a cmp r2, r3 8002d08: d302 bcc.n 8002d10 8002d0a: 68bb ldr r3, [r7, #8] 8002d0c: 2b00 cmp r3, #0 8002d0e: d11a bne.n 8002d46 { if (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8002d10: 68fb ldr r3, [r7, #12] 8002d12: 681b ldr r3, [r3, #0] 8002d14: 699b ldr r3, [r3, #24] 8002d16: f003 0320 and.w r3, r3, #32 8002d1a: 2b20 cmp r3, #32 8002d1c: d013 beq.n 8002d46 { hi2c->ErrorCode |= HAL_I2C_ERROR_TIMEOUT; 8002d1e: 68fb ldr r3, [r7, #12] 8002d20: 6c5b ldr r3, [r3, #68] @ 0x44 8002d22: f043 0220 orr.w r2, r3, #32 8002d26: 68fb ldr r3, [r7, #12] 8002d28: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8002d2a: 68fb ldr r3, [r7, #12] 8002d2c: 2220 movs r2, #32 8002d2e: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002d32: 68fb ldr r3, [r7, #12] 8002d34: 2200 movs r2, #0 8002d36: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002d3a: 68fb ldr r3, [r7, #12] 8002d3c: 2200 movs r2, #0 8002d3e: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_ERROR; 8002d42: 2301 movs r3, #1 8002d44: e007 b.n 8002d56 while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8002d46: 68fb ldr r3, [r7, #12] 8002d48: 681b ldr r3, [r3, #0] 8002d4a: 699b ldr r3, [r3, #24] 8002d4c: f003 0320 and.w r3, r3, #32 8002d50: 2b20 cmp r3, #32 8002d52: d1c8 bne.n 8002ce6 } } } return HAL_OK; 8002d54: 2300 movs r3, #0 } 8002d56: 4618 mov r0, r3 8002d58: 3710 adds r7, #16 8002d5a: 46bd mov sp, r7 8002d5c: bd80 pop {r7, pc} ... 08002d60 : * @param Timeout Timeout duration * @param Tickstart Tick start value * @retval HAL status */ static HAL_StatusTypeDef I2C_IsErrorOccurred(I2C_HandleTypeDef *hi2c, uint32_t Timeout, uint32_t Tickstart) { 8002d60: b580 push {r7, lr} 8002d62: b08a sub sp, #40 @ 0x28 8002d64: af00 add r7, sp, #0 8002d66: 60f8 str r0, [r7, #12] 8002d68: 60b9 str r1, [r7, #8] 8002d6a: 607a str r2, [r7, #4] HAL_StatusTypeDef status = HAL_OK; 8002d6c: 2300 movs r3, #0 8002d6e: f887 3027 strb.w r3, [r7, #39] @ 0x27 uint32_t itflag = hi2c->Instance->ISR; 8002d72: 68fb ldr r3, [r7, #12] 8002d74: 681b ldr r3, [r3, #0] 8002d76: 699b ldr r3, [r3, #24] 8002d78: 61bb str r3, [r7, #24] uint32_t error_code = 0; 8002d7a: 2300 movs r3, #0 8002d7c: 623b str r3, [r7, #32] uint32_t tickstart = Tickstart; 8002d7e: 687b ldr r3, [r7, #4] 8002d80: 61fb str r3, [r7, #28] uint32_t tmp1; HAL_I2C_ModeTypeDef tmp2; if (HAL_IS_BIT_SET(itflag, I2C_FLAG_AF)) 8002d82: 69bb ldr r3, [r7, #24] 8002d84: f003 0310 and.w r3, r3, #16 8002d88: 2b00 cmp r3, #0 8002d8a: d068 beq.n 8002e5e { /* Clear NACKF Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_AF); 8002d8c: 68fb ldr r3, [r7, #12] 8002d8e: 681b ldr r3, [r3, #0] 8002d90: 2210 movs r2, #16 8002d92: 61da str r2, [r3, #28] /* Wait until STOP Flag is set or timeout occurred */ /* AutoEnd should be initiate after AF */ while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 8002d94: e049 b.n 8002e2a { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8002d96: 68bb ldr r3, [r7, #8] 8002d98: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8002d9c: d045 beq.n 8002e2a { if (((HAL_GetTick() - tickstart) > Timeout) || (Timeout == 0U)) 8002d9e: f7ff fa05 bl 80021ac 8002da2: 4602 mov r2, r0 8002da4: 69fb ldr r3, [r7, #28] 8002da6: 1ad3 subs r3, r2, r3 8002da8: 68ba ldr r2, [r7, #8] 8002daa: 429a cmp r2, r3 8002dac: d302 bcc.n 8002db4 8002dae: 68bb ldr r3, [r7, #8] 8002db0: 2b00 cmp r3, #0 8002db2: d13a bne.n 8002e2a { tmp1 = (uint32_t)(hi2c->Instance->CR2 & I2C_CR2_STOP); 8002db4: 68fb ldr r3, [r7, #12] 8002db6: 681b ldr r3, [r3, #0] 8002db8: 685b ldr r3, [r3, #4] 8002dba: f403 4380 and.w r3, r3, #16384 @ 0x4000 8002dbe: 617b str r3, [r7, #20] tmp2 = hi2c->Mode; 8002dc0: 68fb ldr r3, [r7, #12] 8002dc2: f893 3042 ldrb.w r3, [r3, #66] @ 0x42 8002dc6: 74fb strb r3, [r7, #19] /* In case of I2C still busy, try to regenerate a STOP manually */ if ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_BUSY) != RESET) && \ 8002dc8: 68fb ldr r3, [r7, #12] 8002dca: 681b ldr r3, [r3, #0] 8002dcc: 699b ldr r3, [r3, #24] 8002dce: f403 4300 and.w r3, r3, #32768 @ 0x8000 8002dd2: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8002dd6: d121 bne.n 8002e1c 8002dd8: 697b ldr r3, [r7, #20] 8002dda: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 8002dde: d01d beq.n 8002e1c (tmp1 != I2C_CR2_STOP) && \ 8002de0: 7cfb ldrb r3, [r7, #19] 8002de2: 2b20 cmp r3, #32 8002de4: d01a beq.n 8002e1c (tmp2 != HAL_I2C_MODE_SLAVE)) { /* Generate Stop */ hi2c->Instance->CR2 |= I2C_CR2_STOP; 8002de6: 68fb ldr r3, [r7, #12] 8002de8: 681b ldr r3, [r3, #0] 8002dea: 685a ldr r2, [r3, #4] 8002dec: 68fb ldr r3, [r7, #12] 8002dee: 681b ldr r3, [r3, #0] 8002df0: f442 4280 orr.w r2, r2, #16384 @ 0x4000 8002df4: 605a str r2, [r3, #4] /* Update Tick with new reference */ tickstart = HAL_GetTick(); 8002df6: f7ff f9d9 bl 80021ac 8002dfa: 61f8 str r0, [r7, #28] } while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8002dfc: e00e b.n 8002e1c { /* Check for the Timeout */ if ((HAL_GetTick() - tickstart) > I2C_TIMEOUT_STOPF) 8002dfe: f7ff f9d5 bl 80021ac 8002e02: 4602 mov r2, r0 8002e04: 69fb ldr r3, [r7, #28] 8002e06: 1ad3 subs r3, r2, r3 8002e08: 2b19 cmp r3, #25 8002e0a: d907 bls.n 8002e1c { error_code |= HAL_I2C_ERROR_TIMEOUT; 8002e0c: 6a3b ldr r3, [r7, #32] 8002e0e: f043 0320 orr.w r3, r3, #32 8002e12: 623b str r3, [r7, #32] status = HAL_ERROR; 8002e14: 2301 movs r3, #1 8002e16: f887 3027 strb.w r3, [r7, #39] @ 0x27 break; 8002e1a: e006 b.n 8002e2a while (__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) 8002e1c: 68fb ldr r3, [r7, #12] 8002e1e: 681b ldr r3, [r3, #0] 8002e20: 699b ldr r3, [r3, #24] 8002e22: f003 0320 and.w r3, r3, #32 8002e26: 2b20 cmp r3, #32 8002e28: d1e9 bne.n 8002dfe while ((__HAL_I2C_GET_FLAG(hi2c, I2C_FLAG_STOPF) == RESET) && (status == HAL_OK)) 8002e2a: 68fb ldr r3, [r7, #12] 8002e2c: 681b ldr r3, [r3, #0] 8002e2e: 699b ldr r3, [r3, #24] 8002e30: f003 0320 and.w r3, r3, #32 8002e34: 2b20 cmp r3, #32 8002e36: d003 beq.n 8002e40 8002e38: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8002e3c: 2b00 cmp r3, #0 8002e3e: d0aa beq.n 8002d96 } } } /* In case STOP Flag is detected, clear it */ if (status == HAL_OK) 8002e40: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8002e44: 2b00 cmp r3, #0 8002e46: d103 bne.n 8002e50 { /* Clear STOP Flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_STOPF); 8002e48: 68fb ldr r3, [r7, #12] 8002e4a: 681b ldr r3, [r3, #0] 8002e4c: 2220 movs r2, #32 8002e4e: 61da str r2, [r3, #28] } error_code |= HAL_I2C_ERROR_AF; 8002e50: 6a3b ldr r3, [r7, #32] 8002e52: f043 0304 orr.w r3, r3, #4 8002e56: 623b str r3, [r7, #32] status = HAL_ERROR; 8002e58: 2301 movs r3, #1 8002e5a: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Refresh Content of Status register */ itflag = hi2c->Instance->ISR; 8002e5e: 68fb ldr r3, [r7, #12] 8002e60: 681b ldr r3, [r3, #0] 8002e62: 699b ldr r3, [r3, #24] 8002e64: 61bb str r3, [r7, #24] /* Then verify if an additional errors occurs */ /* Check if a Bus error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_BERR)) 8002e66: 69bb ldr r3, [r7, #24] 8002e68: f403 7380 and.w r3, r3, #256 @ 0x100 8002e6c: 2b00 cmp r3, #0 8002e6e: d00b beq.n 8002e88 { error_code |= HAL_I2C_ERROR_BERR; 8002e70: 6a3b ldr r3, [r7, #32] 8002e72: f043 0301 orr.w r3, r3, #1 8002e76: 623b str r3, [r7, #32] /* Clear BERR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_BERR); 8002e78: 68fb ldr r3, [r7, #12] 8002e7a: 681b ldr r3, [r3, #0] 8002e7c: f44f 7280 mov.w r2, #256 @ 0x100 8002e80: 61da str r2, [r3, #28] status = HAL_ERROR; 8002e82: 2301 movs r3, #1 8002e84: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Check if an Over-Run/Under-Run error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_OVR)) 8002e88: 69bb ldr r3, [r7, #24] 8002e8a: f403 6380 and.w r3, r3, #1024 @ 0x400 8002e8e: 2b00 cmp r3, #0 8002e90: d00b beq.n 8002eaa { error_code |= HAL_I2C_ERROR_OVR; 8002e92: 6a3b ldr r3, [r7, #32] 8002e94: f043 0308 orr.w r3, r3, #8 8002e98: 623b str r3, [r7, #32] /* Clear OVR flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_OVR); 8002e9a: 68fb ldr r3, [r7, #12] 8002e9c: 681b ldr r3, [r3, #0] 8002e9e: f44f 6280 mov.w r2, #1024 @ 0x400 8002ea2: 61da str r2, [r3, #28] status = HAL_ERROR; 8002ea4: 2301 movs r3, #1 8002ea6: f887 3027 strb.w r3, [r7, #39] @ 0x27 } /* Check if an Arbitration Loss error occurred */ if (HAL_IS_BIT_SET(itflag, I2C_FLAG_ARLO)) 8002eaa: 69bb ldr r3, [r7, #24] 8002eac: f403 7300 and.w r3, r3, #512 @ 0x200 8002eb0: 2b00 cmp r3, #0 8002eb2: d00b beq.n 8002ecc { error_code |= HAL_I2C_ERROR_ARLO; 8002eb4: 6a3b ldr r3, [r7, #32] 8002eb6: f043 0302 orr.w r3, r3, #2 8002eba: 623b str r3, [r7, #32] /* Clear ARLO flag */ __HAL_I2C_CLEAR_FLAG(hi2c, I2C_FLAG_ARLO); 8002ebc: 68fb ldr r3, [r7, #12] 8002ebe: 681b ldr r3, [r3, #0] 8002ec0: f44f 7200 mov.w r2, #512 @ 0x200 8002ec4: 61da str r2, [r3, #28] status = HAL_ERROR; 8002ec6: 2301 movs r3, #1 8002ec8: f887 3027 strb.w r3, [r7, #39] @ 0x27 } if (status != HAL_OK) 8002ecc: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 8002ed0: 2b00 cmp r3, #0 8002ed2: d01c beq.n 8002f0e { /* Flush TX register */ I2C_Flush_TXDR(hi2c); 8002ed4: 68f8 ldr r0, [r7, #12] 8002ed6: f7ff fe3b bl 8002b50 /* Clear Configuration Register 2 */ I2C_RESET_CR2(hi2c); 8002eda: 68fb ldr r3, [r7, #12] 8002edc: 681b ldr r3, [r3, #0] 8002ede: 6859 ldr r1, [r3, #4] 8002ee0: 68fb ldr r3, [r7, #12] 8002ee2: 681a ldr r2, [r3, #0] 8002ee4: 4b0d ldr r3, [pc, #52] @ (8002f1c ) 8002ee6: 400b ands r3, r1 8002ee8: 6053 str r3, [r2, #4] hi2c->ErrorCode |= error_code; 8002eea: 68fb ldr r3, [r7, #12] 8002eec: 6c5a ldr r2, [r3, #68] @ 0x44 8002eee: 6a3b ldr r3, [r7, #32] 8002ef0: 431a orrs r2, r3 8002ef2: 68fb ldr r3, [r7, #12] 8002ef4: 645a str r2, [r3, #68] @ 0x44 hi2c->State = HAL_I2C_STATE_READY; 8002ef6: 68fb ldr r3, [r7, #12] 8002ef8: 2220 movs r2, #32 8002efa: f883 2041 strb.w r2, [r3, #65] @ 0x41 hi2c->Mode = HAL_I2C_MODE_NONE; 8002efe: 68fb ldr r3, [r7, #12] 8002f00: 2200 movs r2, #0 8002f02: f883 2042 strb.w r2, [r3, #66] @ 0x42 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8002f06: 68fb ldr r3, [r7, #12] 8002f08: 2200 movs r2, #0 8002f0a: f883 2040 strb.w r2, [r3, #64] @ 0x40 } return status; 8002f0e: f897 3027 ldrb.w r3, [r7, #39] @ 0x27 } 8002f12: 4618 mov r0, r3 8002f14: 3728 adds r7, #40 @ 0x28 8002f16: 46bd mov sp, r7 8002f18: bd80 pop {r7, pc} 8002f1a: bf00 nop 8002f1c: fe00e800 .word 0xfe00e800 08002f20 : * @arg @ref I2C_GENERATE_START_WRITE Generate Restart for write request. * @retval None */ static void I2C_TransferConfig(I2C_HandleTypeDef *hi2c, uint16_t DevAddress, uint8_t Size, uint32_t Mode, uint32_t Request) { 8002f20: b480 push {r7} 8002f22: b087 sub sp, #28 8002f24: af00 add r7, sp, #0 8002f26: 60f8 str r0, [r7, #12] 8002f28: 607b str r3, [r7, #4] 8002f2a: 460b mov r3, r1 8002f2c: 817b strh r3, [r7, #10] 8002f2e: 4613 mov r3, r2 8002f30: 727b strb r3, [r7, #9] assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_TRANSFER_MODE(Mode)); assert_param(IS_TRANSFER_REQUEST(Request)); /* Declaration of tmp to prevent undefined behavior of volatile usage */ tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8002f32: 897b ldrh r3, [r7, #10] 8002f34: f3c3 0209 ubfx r2, r3, #0, #10 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8002f38: 7a7b ldrb r3, [r7, #9] 8002f3a: 041b lsls r3, r3, #16 8002f3c: f403 037f and.w r3, r3, #16711680 @ 0xff0000 tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8002f40: 431a orrs r2, r3 (((uint32_t)Size << I2C_CR2_NBYTES_Pos) & I2C_CR2_NBYTES) | \ 8002f42: 687b ldr r3, [r7, #4] 8002f44: 431a orrs r2, r3 tmp = ((uint32_t)(((uint32_t)DevAddress & I2C_CR2_SADD) | \ 8002f46: 6a3b ldr r3, [r7, #32] 8002f48: 4313 orrs r3, r2 8002f4a: f023 4300 bic.w r3, r3, #2147483648 @ 0x80000000 8002f4e: 617b str r3, [r7, #20] (uint32_t)Mode | (uint32_t)Request) & (~0x80000000U)); /* update CR2 register */ MODIFY_REG(hi2c->Instance->CR2, \ 8002f50: 68fb ldr r3, [r7, #12] 8002f52: 681b ldr r3, [r3, #0] 8002f54: 685a ldr r2, [r3, #4] 8002f56: 6a3b ldr r3, [r7, #32] 8002f58: 0d5b lsrs r3, r3, #21 8002f5a: f403 6180 and.w r1, r3, #1024 @ 0x400 8002f5e: 4b08 ldr r3, [pc, #32] @ (8002f80 ) 8002f60: 430b orrs r3, r1 8002f62: 43db mvns r3, r3 8002f64: ea02 0103 and.w r1, r2, r3 8002f68: 68fb ldr r3, [r7, #12] 8002f6a: 681b ldr r3, [r3, #0] 8002f6c: 697a ldr r2, [r7, #20] 8002f6e: 430a orrs r2, r1 8002f70: 605a str r2, [r3, #4] ((I2C_CR2_SADD | I2C_CR2_NBYTES | I2C_CR2_RELOAD | I2C_CR2_AUTOEND | \ (I2C_CR2_RD_WRN & (uint32_t)(Request >> (31U - I2C_CR2_RD_WRN_Pos))) | \ I2C_CR2_START | I2C_CR2_STOP)), tmp); } 8002f72: bf00 nop 8002f74: 371c adds r7, #28 8002f76: 46bd mov sp, r7 8002f78: f85d 7b04 ldr.w r7, [sp], #4 8002f7c: 4770 bx lr 8002f7e: bf00 nop 8002f80: 03ff63ff .word 0x03ff63ff 08002f84 : * the configuration information for the specified I2Cx peripheral. * @param AnalogFilter New state of the Analog filter. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigAnalogFilter(I2C_HandleTypeDef *hi2c, uint32_t AnalogFilter) { 8002f84: b480 push {r7} 8002f86: b083 sub sp, #12 8002f88: af00 add r7, sp, #0 8002f8a: 6078 str r0, [r7, #4] 8002f8c: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_ANALOG_FILTER(AnalogFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 8002f8e: 687b ldr r3, [r7, #4] 8002f90: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 8002f94: b2db uxtb r3, r3 8002f96: 2b20 cmp r3, #32 8002f98: d138 bne.n 800300c { /* Process Locked */ __HAL_LOCK(hi2c); 8002f9a: 687b ldr r3, [r7, #4] 8002f9c: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8002fa0: 2b01 cmp r3, #1 8002fa2: d101 bne.n 8002fa8 8002fa4: 2302 movs r3, #2 8002fa6: e032 b.n 800300e 8002fa8: 687b ldr r3, [r7, #4] 8002faa: 2201 movs r2, #1 8002fac: f883 2040 strb.w r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_BUSY; 8002fb0: 687b ldr r3, [r7, #4] 8002fb2: 2224 movs r2, #36 @ 0x24 8002fb4: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 8002fb8: 687b ldr r3, [r7, #4] 8002fba: 681b ldr r3, [r3, #0] 8002fbc: 681a ldr r2, [r3, #0] 8002fbe: 687b ldr r3, [r7, #4] 8002fc0: 681b ldr r3, [r3, #0] 8002fc2: f022 0201 bic.w r2, r2, #1 8002fc6: 601a str r2, [r3, #0] /* Reset I2Cx ANOFF bit */ hi2c->Instance->CR1 &= ~(I2C_CR1_ANFOFF); 8002fc8: 687b ldr r3, [r7, #4] 8002fca: 681b ldr r3, [r3, #0] 8002fcc: 681a ldr r2, [r3, #0] 8002fce: 687b ldr r3, [r7, #4] 8002fd0: 681b ldr r3, [r3, #0] 8002fd2: f422 5280 bic.w r2, r2, #4096 @ 0x1000 8002fd6: 601a str r2, [r3, #0] /* Set analog filter bit*/ hi2c->Instance->CR1 |= AnalogFilter; 8002fd8: 687b ldr r3, [r7, #4] 8002fda: 681b ldr r3, [r3, #0] 8002fdc: 6819 ldr r1, [r3, #0] 8002fde: 687b ldr r3, [r7, #4] 8002fe0: 681b ldr r3, [r3, #0] 8002fe2: 683a ldr r2, [r7, #0] 8002fe4: 430a orrs r2, r1 8002fe6: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 8002fe8: 687b ldr r3, [r7, #4] 8002fea: 681b ldr r3, [r3, #0] 8002fec: 681a ldr r2, [r3, #0] 8002fee: 687b ldr r3, [r7, #4] 8002ff0: 681b ldr r3, [r3, #0] 8002ff2: f042 0201 orr.w r2, r2, #1 8002ff6: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8002ff8: 687b ldr r3, [r7, #4] 8002ffa: 2220 movs r2, #32 8002ffc: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003000: 687b ldr r3, [r7, #4] 8003002: 2200 movs r2, #0 8003004: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 8003008: 2300 movs r3, #0 800300a: e000 b.n 800300e } else { return HAL_BUSY; 800300c: 2302 movs r3, #2 } } 800300e: 4618 mov r0, r3 8003010: 370c adds r7, #12 8003012: 46bd mov sp, r7 8003014: f85d 7b04 ldr.w r7, [sp], #4 8003018: 4770 bx lr 0800301a : * the configuration information for the specified I2Cx peripheral. * @param DigitalFilter Coefficient of digital noise filter between Min_Data=0x00 and Max_Data=0x0F. * @retval HAL status */ HAL_StatusTypeDef HAL_I2CEx_ConfigDigitalFilter(I2C_HandleTypeDef *hi2c, uint32_t DigitalFilter) { 800301a: b480 push {r7} 800301c: b085 sub sp, #20 800301e: af00 add r7, sp, #0 8003020: 6078 str r0, [r7, #4] 8003022: 6039 str r1, [r7, #0] /* Check the parameters */ assert_param(IS_I2C_ALL_INSTANCE(hi2c->Instance)); assert_param(IS_I2C_DIGITAL_FILTER(DigitalFilter)); if (hi2c->State == HAL_I2C_STATE_READY) 8003024: 687b ldr r3, [r7, #4] 8003026: f893 3041 ldrb.w r3, [r3, #65] @ 0x41 800302a: b2db uxtb r3, r3 800302c: 2b20 cmp r3, #32 800302e: d139 bne.n 80030a4 { /* Process Locked */ __HAL_LOCK(hi2c); 8003030: 687b ldr r3, [r7, #4] 8003032: f893 3040 ldrb.w r3, [r3, #64] @ 0x40 8003036: 2b01 cmp r3, #1 8003038: d101 bne.n 800303e 800303a: 2302 movs r3, #2 800303c: e033 b.n 80030a6 800303e: 687b ldr r3, [r7, #4] 8003040: 2201 movs r2, #1 8003042: f883 2040 strb.w r2, [r3, #64] @ 0x40 hi2c->State = HAL_I2C_STATE_BUSY; 8003046: 687b ldr r3, [r7, #4] 8003048: 2224 movs r2, #36 @ 0x24 800304a: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Disable the selected I2C peripheral */ __HAL_I2C_DISABLE(hi2c); 800304e: 687b ldr r3, [r7, #4] 8003050: 681b ldr r3, [r3, #0] 8003052: 681a ldr r2, [r3, #0] 8003054: 687b ldr r3, [r7, #4] 8003056: 681b ldr r3, [r3, #0] 8003058: f022 0201 bic.w r2, r2, #1 800305c: 601a str r2, [r3, #0] /* Get the old register value */ tmpreg = hi2c->Instance->CR1; 800305e: 687b ldr r3, [r7, #4] 8003060: 681b ldr r3, [r3, #0] 8003062: 681b ldr r3, [r3, #0] 8003064: 60fb str r3, [r7, #12] /* Reset I2Cx DNF bits [11:8] */ tmpreg &= ~(I2C_CR1_DNF); 8003066: 68fb ldr r3, [r7, #12] 8003068: f423 6370 bic.w r3, r3, #3840 @ 0xf00 800306c: 60fb str r3, [r7, #12] /* Set I2Cx DNF coefficient */ tmpreg |= DigitalFilter << 8U; 800306e: 683b ldr r3, [r7, #0] 8003070: 021b lsls r3, r3, #8 8003072: 68fa ldr r2, [r7, #12] 8003074: 4313 orrs r3, r2 8003076: 60fb str r3, [r7, #12] /* Store the new register value */ hi2c->Instance->CR1 = tmpreg; 8003078: 687b ldr r3, [r7, #4] 800307a: 681b ldr r3, [r3, #0] 800307c: 68fa ldr r2, [r7, #12] 800307e: 601a str r2, [r3, #0] __HAL_I2C_ENABLE(hi2c); 8003080: 687b ldr r3, [r7, #4] 8003082: 681b ldr r3, [r3, #0] 8003084: 681a ldr r2, [r3, #0] 8003086: 687b ldr r3, [r7, #4] 8003088: 681b ldr r3, [r3, #0] 800308a: f042 0201 orr.w r2, r2, #1 800308e: 601a str r2, [r3, #0] hi2c->State = HAL_I2C_STATE_READY; 8003090: 687b ldr r3, [r7, #4] 8003092: 2220 movs r2, #32 8003094: f883 2041 strb.w r2, [r3, #65] @ 0x41 /* Process Unlocked */ __HAL_UNLOCK(hi2c); 8003098: 687b ldr r3, [r7, #4] 800309a: 2200 movs r2, #0 800309c: f883 2040 strb.w r2, [r3, #64] @ 0x40 return HAL_OK; 80030a0: 2300 movs r3, #0 80030a2: e000 b.n 80030a6 } else { return HAL_BUSY; 80030a4: 2302 movs r3, #2 } } 80030a6: 4618 mov r0, r3 80030a8: 3714 adds r7, #20 80030aa: 46bd mov sp, r7 80030ac: f85d 7b04 ldr.w r7, [sp], #4 80030b0: 4770 bx lr ... 080030b4 : * @note If the HSE divided by 2, 3, ..31 is used as the RTC clock, the * Backup Domain Access should be kept enabled. * @retval None */ void HAL_PWR_EnableBkUpAccess(void) { 80030b4: b480 push {r7} 80030b6: af00 add r7, sp, #0 /* Enable access to RTC and backup registers */ SET_BIT(PWR->CR1, PWR_CR1_DBP); 80030b8: 4b05 ldr r3, [pc, #20] @ (80030d0 ) 80030ba: 681b ldr r3, [r3, #0] 80030bc: 4a04 ldr r2, [pc, #16] @ (80030d0 ) 80030be: f443 7380 orr.w r3, r3, #256 @ 0x100 80030c2: 6013 str r3, [r2, #0] } 80030c4: bf00 nop 80030c6: 46bd mov sp, r7 80030c8: f85d 7b04 ldr.w r7, [sp], #4 80030cc: 4770 bx lr 80030ce: bf00 nop 80030d0: 40007000 .word 0x40007000 080030d4 : * During the Over-drive switch activation, no peripheral clocks should be enabled. * The peripheral clocks must be enabled once the Over-drive mode is activated. * @retval HAL status */ HAL_StatusTypeDef HAL_PWREx_EnableOverDrive(void) { 80030d4: b580 push {r7, lr} 80030d6: b082 sub sp, #8 80030d8: af00 add r7, sp, #0 uint32_t tickstart = 0; 80030da: 2300 movs r3, #0 80030dc: 607b str r3, [r7, #4] __HAL_RCC_PWR_CLK_ENABLE(); 80030de: 4b23 ldr r3, [pc, #140] @ (800316c ) 80030e0: 6c1b ldr r3, [r3, #64] @ 0x40 80030e2: 4a22 ldr r2, [pc, #136] @ (800316c ) 80030e4: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 80030e8: 6413 str r3, [r2, #64] @ 0x40 80030ea: 4b20 ldr r3, [pc, #128] @ (800316c ) 80030ec: 6c1b ldr r3, [r3, #64] @ 0x40 80030ee: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 80030f2: 603b str r3, [r7, #0] 80030f4: 683b ldr r3, [r7, #0] /* Enable the Over-drive to extend the clock frequency to 216 MHz */ __HAL_PWR_OVERDRIVE_ENABLE(); 80030f6: 4b1e ldr r3, [pc, #120] @ (8003170 ) 80030f8: 681b ldr r3, [r3, #0] 80030fa: 4a1d ldr r2, [pc, #116] @ (8003170 ) 80030fc: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8003100: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003102: f7ff f853 bl 80021ac 8003106: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 8003108: e009 b.n 800311e { if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 800310a: f7ff f84f bl 80021ac 800310e: 4602 mov r2, r0 8003110: 687b ldr r3, [r7, #4] 8003112: 1ad3 subs r3, r2, r3 8003114: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 8003118: d901 bls.n 800311e { return HAL_TIMEOUT; 800311a: 2303 movs r3, #3 800311c: e022 b.n 8003164 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODRDY)) 800311e: 4b14 ldr r3, [pc, #80] @ (8003170 ) 8003120: 685b ldr r3, [r3, #4] 8003122: f403 3380 and.w r3, r3, #65536 @ 0x10000 8003126: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800312a: d1ee bne.n 800310a } } /* Enable the Over-drive switch */ __HAL_PWR_OVERDRIVESWITCHING_ENABLE(); 800312c: 4b10 ldr r3, [pc, #64] @ (8003170 ) 800312e: 681b ldr r3, [r3, #0] 8003130: 4a0f ldr r2, [pc, #60] @ (8003170 ) 8003132: f443 3300 orr.w r3, r3, #131072 @ 0x20000 8003136: 6013 str r3, [r2, #0] /* Get tick */ tickstart = HAL_GetTick(); 8003138: f7ff f838 bl 80021ac 800313c: 6078 str r0, [r7, #4] while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 800313e: e009 b.n 8003154 { if((HAL_GetTick() - tickstart ) > PWR_OVERDRIVE_TIMEOUT_VALUE) 8003140: f7ff f834 bl 80021ac 8003144: 4602 mov r2, r0 8003146: 687b ldr r3, [r7, #4] 8003148: 1ad3 subs r3, r2, r3 800314a: f5b3 7f7a cmp.w r3, #1000 @ 0x3e8 800314e: d901 bls.n 8003154 { return HAL_TIMEOUT; 8003150: 2303 movs r3, #3 8003152: e007 b.n 8003164 while(!__HAL_PWR_GET_FLAG(PWR_FLAG_ODSWRDY)) 8003154: 4b06 ldr r3, [pc, #24] @ (8003170 ) 8003156: 685b ldr r3, [r3, #4] 8003158: f403 3300 and.w r3, r3, #131072 @ 0x20000 800315c: f5b3 3f00 cmp.w r3, #131072 @ 0x20000 8003160: d1ee bne.n 8003140 } } return HAL_OK; 8003162: 2300 movs r3, #0 } 8003164: 4618 mov r0, r3 8003166: 3708 adds r7, #8 8003168: 46bd mov sp, r7 800316a: bd80 pop {r7, pc} 800316c: 40023800 .word 0x40023800 8003170: 40007000 .word 0x40007000 08003174 : * supported by this function. User should request a transition to HSE Off * first and then HSE On or HSE Bypass. * @retval HAL status */ HAL_StatusTypeDef HAL_RCC_OscConfig(const RCC_OscInitTypeDef *RCC_OscInitStruct) { 8003174: b580 push {r7, lr} 8003176: b086 sub sp, #24 8003178: af00 add r7, sp, #0 800317a: 6078 str r0, [r7, #4] uint32_t tickstart; uint32_t pll_config; FlagStatus pwrclkchanged = RESET; 800317c: 2300 movs r3, #0 800317e: 75fb strb r3, [r7, #23] /* Check Null pointer */ if (RCC_OscInitStruct == NULL) 8003180: 687b ldr r3, [r7, #4] 8003182: 2b00 cmp r3, #0 8003184: d101 bne.n 800318a { return HAL_ERROR; 8003186: 2301 movs r3, #1 8003188: e291 b.n 80036ae /* Check the parameters */ assert_param(IS_RCC_OSCILLATORTYPE(RCC_OscInitStruct->OscillatorType)); /*------------------------------- HSE Configuration ------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSE) == RCC_OSCILLATORTYPE_HSE) 800318a: 687b ldr r3, [r7, #4] 800318c: 681b ldr r3, [r3, #0] 800318e: f003 0301 and.w r3, r3, #1 8003192: 2b00 cmp r3, #0 8003194: f000 8087 beq.w 80032a6 { /* Check the parameters */ assert_param(IS_RCC_HSE(RCC_OscInitStruct->HSEState)); /* When the HSE is used as system clock or clock source for PLL, It can not be disabled */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSE) 8003198: 4b96 ldr r3, [pc, #600] @ (80033f4 ) 800319a: 689b ldr r3, [r3, #8] 800319c: f003 030c and.w r3, r3, #12 80031a0: 2b04 cmp r3, #4 80031a2: d00c beq.n 80031be || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSE))) 80031a4: 4b93 ldr r3, [pc, #588] @ (80033f4 ) 80031a6: 689b ldr r3, [r3, #8] 80031a8: f003 030c and.w r3, r3, #12 80031ac: 2b08 cmp r3, #8 80031ae: d112 bne.n 80031d6 80031b0: 4b90 ldr r3, [pc, #576] @ (80033f4 ) 80031b2: 685b ldr r3, [r3, #4] 80031b4: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80031b8: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 80031bc: d10b bne.n 80031d6 { if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80031be: 4b8d ldr r3, [pc, #564] @ (80033f4 ) 80031c0: 681b ldr r3, [r3, #0] 80031c2: f403 3300 and.w r3, r3, #131072 @ 0x20000 80031c6: 2b00 cmp r3, #0 80031c8: d06c beq.n 80032a4 80031ca: 687b ldr r3, [r7, #4] 80031cc: 685b ldr r3, [r3, #4] 80031ce: 2b00 cmp r3, #0 80031d0: d168 bne.n 80032a4 { return HAL_ERROR; 80031d2: 2301 movs r3, #1 80031d4: e26b b.n 80036ae } } else { /* Set the new HSE configuration ---------------------------------------*/ __HAL_RCC_HSE_CONFIG(RCC_OscInitStruct->HSEState); 80031d6: 687b ldr r3, [r7, #4] 80031d8: 685b ldr r3, [r3, #4] 80031da: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 80031de: d106 bne.n 80031ee 80031e0: 4b84 ldr r3, [pc, #528] @ (80033f4 ) 80031e2: 681b ldr r3, [r3, #0] 80031e4: 4a83 ldr r2, [pc, #524] @ (80033f4 ) 80031e6: f443 3380 orr.w r3, r3, #65536 @ 0x10000 80031ea: 6013 str r3, [r2, #0] 80031ec: e02e b.n 800324c 80031ee: 687b ldr r3, [r7, #4] 80031f0: 685b ldr r3, [r3, #4] 80031f2: 2b00 cmp r3, #0 80031f4: d10c bne.n 8003210 80031f6: 4b7f ldr r3, [pc, #508] @ (80033f4 ) 80031f8: 681b ldr r3, [r3, #0] 80031fa: 4a7e ldr r2, [pc, #504] @ (80033f4 ) 80031fc: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8003200: 6013 str r3, [r2, #0] 8003202: 4b7c ldr r3, [pc, #496] @ (80033f4 ) 8003204: 681b ldr r3, [r3, #0] 8003206: 4a7b ldr r2, [pc, #492] @ (80033f4 ) 8003208: f423 2380 bic.w r3, r3, #262144 @ 0x40000 800320c: 6013 str r3, [r2, #0] 800320e: e01d b.n 800324c 8003210: 687b ldr r3, [r7, #4] 8003212: 685b ldr r3, [r3, #4] 8003214: f5b3 2fa0 cmp.w r3, #327680 @ 0x50000 8003218: d10c bne.n 8003234 800321a: 4b76 ldr r3, [pc, #472] @ (80033f4 ) 800321c: 681b ldr r3, [r3, #0] 800321e: 4a75 ldr r2, [pc, #468] @ (80033f4 ) 8003220: f443 2380 orr.w r3, r3, #262144 @ 0x40000 8003224: 6013 str r3, [r2, #0] 8003226: 4b73 ldr r3, [pc, #460] @ (80033f4 ) 8003228: 681b ldr r3, [r3, #0] 800322a: 4a72 ldr r2, [pc, #456] @ (80033f4 ) 800322c: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8003230: 6013 str r3, [r2, #0] 8003232: e00b b.n 800324c 8003234: 4b6f ldr r3, [pc, #444] @ (80033f4 ) 8003236: 681b ldr r3, [r3, #0] 8003238: 4a6e ldr r2, [pc, #440] @ (80033f4 ) 800323a: f423 3380 bic.w r3, r3, #65536 @ 0x10000 800323e: 6013 str r3, [r2, #0] 8003240: 4b6c ldr r3, [pc, #432] @ (80033f4 ) 8003242: 681b ldr r3, [r3, #0] 8003244: 4a6b ldr r2, [pc, #428] @ (80033f4 ) 8003246: f423 2380 bic.w r3, r3, #262144 @ 0x40000 800324a: 6013 str r3, [r2, #0] /* Check the HSE State */ if (RCC_OscInitStruct->HSEState != RCC_HSE_OFF) 800324c: 687b ldr r3, [r7, #4] 800324e: 685b ldr r3, [r3, #4] 8003250: 2b00 cmp r3, #0 8003252: d013 beq.n 800327c { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003254: f7fe ffaa bl 80021ac 8003258: 6138 str r0, [r7, #16] /* Wait till HSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800325a: e008 b.n 800326e { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 800325c: f7fe ffa6 bl 80021ac 8003260: 4602 mov r2, r0 8003262: 693b ldr r3, [r7, #16] 8003264: 1ad3 subs r3, r2, r3 8003266: 2b64 cmp r3, #100 @ 0x64 8003268: d901 bls.n 800326e { return HAL_TIMEOUT; 800326a: 2303 movs r3, #3 800326c: e21f b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 800326e: 4b61 ldr r3, [pc, #388] @ (80033f4 ) 8003270: 681b ldr r3, [r3, #0] 8003272: f403 3300 and.w r3, r3, #131072 @ 0x20000 8003276: 2b00 cmp r3, #0 8003278: d0f0 beq.n 800325c 800327a: e014 b.n 80032a6 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 800327c: f7fe ff96 bl 80021ac 8003280: 6138 str r0, [r7, #16] /* Wait till HSE is bypassed or disabled */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003282: e008 b.n 8003296 { if ((HAL_GetTick() - tickstart) > HSE_TIMEOUT_VALUE) 8003284: f7fe ff92 bl 80021ac 8003288: 4602 mov r2, r0 800328a: 693b ldr r3, [r7, #16] 800328c: 1ad3 subs r3, r2, r3 800328e: 2b64 cmp r3, #100 @ 0x64 8003290: d901 bls.n 8003296 { return HAL_TIMEOUT; 8003292: 2303 movs r3, #3 8003294: e20b b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) 8003296: 4b57 ldr r3, [pc, #348] @ (80033f4 ) 8003298: 681b ldr r3, [r3, #0] 800329a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800329e: 2b00 cmp r3, #0 80032a0: d1f0 bne.n 8003284 80032a2: e000 b.n 80032a6 if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) != RESET) && (RCC_OscInitStruct->HSEState == RCC_HSE_OFF)) 80032a4: bf00 nop } } } } /*----------------------------- HSI Configuration --------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_HSI) == RCC_OSCILLATORTYPE_HSI) 80032a6: 687b ldr r3, [r7, #4] 80032a8: 681b ldr r3, [r3, #0] 80032aa: f003 0302 and.w r3, r3, #2 80032ae: 2b00 cmp r3, #0 80032b0: d069 beq.n 8003386 /* Check the parameters */ assert_param(IS_RCC_HSI(RCC_OscInitStruct->HSIState)); assert_param(IS_RCC_CALIBRATION_VALUE(RCC_OscInitStruct->HSICalibrationValue)); /* Check if HSI is used as system clock or as PLL source when PLL is selected as system clock */ if ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_HSI) 80032b2: 4b50 ldr r3, [pc, #320] @ (80033f4 ) 80032b4: 689b ldr r3, [r3, #8] 80032b6: f003 030c and.w r3, r3, #12 80032ba: 2b00 cmp r3, #0 80032bc: d00b beq.n 80032d6 || ((__HAL_RCC_GET_SYSCLK_SOURCE() == RCC_SYSCLKSOURCE_STATUS_PLLCLK) && ((RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC) == RCC_PLLCFGR_PLLSRC_HSI))) 80032be: 4b4d ldr r3, [pc, #308] @ (80033f4 ) 80032c0: 689b ldr r3, [r3, #8] 80032c2: f003 030c and.w r3, r3, #12 80032c6: 2b08 cmp r3, #8 80032c8: d11c bne.n 8003304 80032ca: 4b4a ldr r3, [pc, #296] @ (80033f4 ) 80032cc: 685b ldr r3, [r3, #4] 80032ce: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80032d2: 2b00 cmp r3, #0 80032d4: d116 bne.n 8003304 { /* When HSI is used as system clock it will not disabled */ if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 80032d6: 4b47 ldr r3, [pc, #284] @ (80033f4 ) 80032d8: 681b ldr r3, [r3, #0] 80032da: f003 0302 and.w r3, r3, #2 80032de: 2b00 cmp r3, #0 80032e0: d005 beq.n 80032ee 80032e2: 687b ldr r3, [r7, #4] 80032e4: 68db ldr r3, [r3, #12] 80032e6: 2b01 cmp r3, #1 80032e8: d001 beq.n 80032ee { return HAL_ERROR; 80032ea: 2301 movs r3, #1 80032ec: e1df b.n 80036ae } /* Otherwise, just the calibration is allowed */ else { /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 80032ee: 4b41 ldr r3, [pc, #260] @ (80033f4 ) 80032f0: 681b ldr r3, [r3, #0] 80032f2: f023 02f8 bic.w r2, r3, #248 @ 0xf8 80032f6: 687b ldr r3, [r7, #4] 80032f8: 691b ldr r3, [r3, #16] 80032fa: 00db lsls r3, r3, #3 80032fc: 493d ldr r1, [pc, #244] @ (80033f4 ) 80032fe: 4313 orrs r3, r2 8003300: 600b str r3, [r1, #0] if ((__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) && (RCC_OscInitStruct->HSIState != RCC_HSI_ON)) 8003302: e040 b.n 8003386 } } else { /* Check the HSI State */ if ((RCC_OscInitStruct->HSIState) != RCC_HSI_OFF) 8003304: 687b ldr r3, [r7, #4] 8003306: 68db ldr r3, [r3, #12] 8003308: 2b00 cmp r3, #0 800330a: d023 beq.n 8003354 { /* Enable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_ENABLE(); 800330c: 4b39 ldr r3, [pc, #228] @ (80033f4 ) 800330e: 681b ldr r3, [r3, #0] 8003310: 4a38 ldr r2, [pc, #224] @ (80033f4 ) 8003312: f043 0301 orr.w r3, r3, #1 8003316: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003318: f7fe ff48 bl 80021ac 800331c: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800331e: e008 b.n 8003332 { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8003320: f7fe ff44 bl 80021ac 8003324: 4602 mov r2, r0 8003326: 693b ldr r3, [r7, #16] 8003328: 1ad3 subs r3, r2, r3 800332a: 2b02 cmp r3, #2 800332c: d901 bls.n 8003332 { return HAL_TIMEOUT; 800332e: 2303 movs r3, #3 8003330: e1bd b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 8003332: 4b30 ldr r3, [pc, #192] @ (80033f4 ) 8003334: 681b ldr r3, [r3, #0] 8003336: f003 0302 and.w r3, r3, #2 800333a: 2b00 cmp r3, #0 800333c: d0f0 beq.n 8003320 } } /* Adjusts the Internal High Speed oscillator (HSI) calibration value.*/ __HAL_RCC_HSI_CALIBRATIONVALUE_ADJUST(RCC_OscInitStruct->HSICalibrationValue); 800333e: 4b2d ldr r3, [pc, #180] @ (80033f4 ) 8003340: 681b ldr r3, [r3, #0] 8003342: f023 02f8 bic.w r2, r3, #248 @ 0xf8 8003346: 687b ldr r3, [r7, #4] 8003348: 691b ldr r3, [r3, #16] 800334a: 00db lsls r3, r3, #3 800334c: 4929 ldr r1, [pc, #164] @ (80033f4 ) 800334e: 4313 orrs r3, r2 8003350: 600b str r3, [r1, #0] 8003352: e018 b.n 8003386 } else { /* Disable the Internal High Speed oscillator (HSI). */ __HAL_RCC_HSI_DISABLE(); 8003354: 4b27 ldr r3, [pc, #156] @ (80033f4 ) 8003356: 681b ldr r3, [r3, #0] 8003358: 4a26 ldr r2, [pc, #152] @ (80033f4 ) 800335a: f023 0301 bic.w r3, r3, #1 800335e: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003360: f7fe ff24 bl 80021ac 8003364: 6138 str r0, [r7, #16] /* Wait till HSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 8003366: e008 b.n 800337a { if ((HAL_GetTick() - tickstart) > HSI_TIMEOUT_VALUE) 8003368: f7fe ff20 bl 80021ac 800336c: 4602 mov r2, r0 800336e: 693b ldr r3, [r7, #16] 8003370: 1ad3 subs r3, r2, r3 8003372: 2b02 cmp r3, #2 8003374: d901 bls.n 800337a { return HAL_TIMEOUT; 8003376: 2303 movs r3, #3 8003378: e199 b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) != RESET) 800337a: 4b1e ldr r3, [pc, #120] @ (80033f4 ) 800337c: 681b ldr r3, [r3, #0] 800337e: f003 0302 and.w r3, r3, #2 8003382: 2b00 cmp r3, #0 8003384: d1f0 bne.n 8003368 } } } } /*------------------------------ LSI Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSI) == RCC_OSCILLATORTYPE_LSI) 8003386: 687b ldr r3, [r7, #4] 8003388: 681b ldr r3, [r3, #0] 800338a: f003 0308 and.w r3, r3, #8 800338e: 2b00 cmp r3, #0 8003390: d038 beq.n 8003404 { /* Check the parameters */ assert_param(IS_RCC_LSI(RCC_OscInitStruct->LSIState)); /* Check the LSI State */ if ((RCC_OscInitStruct->LSIState) != RCC_LSI_OFF) 8003392: 687b ldr r3, [r7, #4] 8003394: 695b ldr r3, [r3, #20] 8003396: 2b00 cmp r3, #0 8003398: d019 beq.n 80033ce { /* Enable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_ENABLE(); 800339a: 4b16 ldr r3, [pc, #88] @ (80033f4 ) 800339c: 6f5b ldr r3, [r3, #116] @ 0x74 800339e: 4a15 ldr r2, [pc, #84] @ (80033f4 ) 80033a0: f043 0301 orr.w r3, r3, #1 80033a4: 6753 str r3, [r2, #116] @ 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); 80033a6: f7fe ff01 bl 80021ac 80033aa: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80033ac: e008 b.n 80033c0 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80033ae: f7fe fefd bl 80021ac 80033b2: 4602 mov r2, r0 80033b4: 693b ldr r3, [r7, #16] 80033b6: 1ad3 subs r3, r2, r3 80033b8: 2b02 cmp r3, #2 80033ba: d901 bls.n 80033c0 { return HAL_TIMEOUT; 80033bc: 2303 movs r3, #3 80033be: e176 b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) == RESET) 80033c0: 4b0c ldr r3, [pc, #48] @ (80033f4 ) 80033c2: 6f5b ldr r3, [r3, #116] @ 0x74 80033c4: f003 0302 and.w r3, r3, #2 80033c8: 2b00 cmp r3, #0 80033ca: d0f0 beq.n 80033ae 80033cc: e01a b.n 8003404 } } else { /* Disable the Internal Low Speed oscillator (LSI). */ __HAL_RCC_LSI_DISABLE(); 80033ce: 4b09 ldr r3, [pc, #36] @ (80033f4 ) 80033d0: 6f5b ldr r3, [r3, #116] @ 0x74 80033d2: 4a08 ldr r2, [pc, #32] @ (80033f4 ) 80033d4: f023 0301 bic.w r3, r3, #1 80033d8: 6753 str r3, [r2, #116] @ 0x74 /* Get Start Tick*/ tickstart = HAL_GetTick(); 80033da: f7fe fee7 bl 80021ac 80033de: 6138 str r0, [r7, #16] /* Wait till LSI is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80033e0: e00a b.n 80033f8 { if ((HAL_GetTick() - tickstart) > LSI_TIMEOUT_VALUE) 80033e2: f7fe fee3 bl 80021ac 80033e6: 4602 mov r2, r0 80033e8: 693b ldr r3, [r7, #16] 80033ea: 1ad3 subs r3, r2, r3 80033ec: 2b02 cmp r3, #2 80033ee: d903 bls.n 80033f8 { return HAL_TIMEOUT; 80033f0: 2303 movs r3, #3 80033f2: e15c b.n 80036ae 80033f4: 40023800 .word 0x40023800 while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSIRDY) != RESET) 80033f8: 4b91 ldr r3, [pc, #580] @ (8003640 ) 80033fa: 6f5b ldr r3, [r3, #116] @ 0x74 80033fc: f003 0302 and.w r3, r3, #2 8003400: 2b00 cmp r3, #0 8003402: d1ee bne.n 80033e2 } } } } /*------------------------------ LSE Configuration -------------------------*/ if (((RCC_OscInitStruct->OscillatorType) & RCC_OSCILLATORTYPE_LSE) == RCC_OSCILLATORTYPE_LSE) 8003404: 687b ldr r3, [r7, #4] 8003406: 681b ldr r3, [r3, #0] 8003408: f003 0304 and.w r3, r3, #4 800340c: 2b00 cmp r3, #0 800340e: f000 80a4 beq.w 800355a /* Check the parameters */ assert_param(IS_RCC_LSE(RCC_OscInitStruct->LSEState)); /* Update LSE configuration in Backup Domain control register */ /* Requires to enable write access to Backup Domain of necessary */ if (__HAL_RCC_PWR_IS_CLK_DISABLED()) 8003412: 4b8b ldr r3, [pc, #556] @ (8003640 ) 8003414: 6c1b ldr r3, [r3, #64] @ 0x40 8003416: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 800341a: 2b00 cmp r3, #0 800341c: d10d bne.n 800343a { /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); 800341e: 4b88 ldr r3, [pc, #544] @ (8003640 ) 8003420: 6c1b ldr r3, [r3, #64] @ 0x40 8003422: 4a87 ldr r2, [pc, #540] @ (8003640 ) 8003424: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003428: 6413 str r3, [r2, #64] @ 0x40 800342a: 4b85 ldr r3, [pc, #532] @ (8003640 ) 800342c: 6c1b ldr r3, [r3, #64] @ 0x40 800342e: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003432: 60bb str r3, [r7, #8] 8003434: 68bb ldr r3, [r7, #8] pwrclkchanged = SET; 8003436: 2301 movs r3, #1 8003438: 75fb strb r3, [r7, #23] } if (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 800343a: 4b82 ldr r3, [pc, #520] @ (8003644 ) 800343c: 681b ldr r3, [r3, #0] 800343e: f403 7380 and.w r3, r3, #256 @ 0x100 8003442: 2b00 cmp r3, #0 8003444: d118 bne.n 8003478 { /* Enable write access to Backup domain */ PWR->CR1 |= PWR_CR1_DBP; 8003446: 4b7f ldr r3, [pc, #508] @ (8003644 ) 8003448: 681b ldr r3, [r3, #0] 800344a: 4a7e ldr r2, [pc, #504] @ (8003644 ) 800344c: f443 7380 orr.w r3, r3, #256 @ 0x100 8003450: 6013 str r3, [r2, #0] /* Wait for Backup domain Write protection disable */ tickstart = HAL_GetTick(); 8003452: f7fe feab bl 80021ac 8003456: 6138 str r0, [r7, #16] while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 8003458: e008 b.n 800346c { if ((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 800345a: f7fe fea7 bl 80021ac 800345e: 4602 mov r2, r0 8003460: 693b ldr r3, [r7, #16] 8003462: 1ad3 subs r3, r2, r3 8003464: 2b64 cmp r3, #100 @ 0x64 8003466: d901 bls.n 800346c { return HAL_TIMEOUT; 8003468: 2303 movs r3, #3 800346a: e120 b.n 80036ae while (HAL_IS_BIT_CLR(PWR->CR1, PWR_CR1_DBP)) 800346c: 4b75 ldr r3, [pc, #468] @ (8003644 ) 800346e: 681b ldr r3, [r3, #0] 8003470: f403 7380 and.w r3, r3, #256 @ 0x100 8003474: 2b00 cmp r3, #0 8003476: d0f0 beq.n 800345a } } } /* Set the new LSE configuration -----------------------------------------*/ __HAL_RCC_LSE_CONFIG(RCC_OscInitStruct->LSEState); 8003478: 687b ldr r3, [r7, #4] 800347a: 689b ldr r3, [r3, #8] 800347c: 2b01 cmp r3, #1 800347e: d106 bne.n 800348e 8003480: 4b6f ldr r3, [pc, #444] @ (8003640 ) 8003482: 6f1b ldr r3, [r3, #112] @ 0x70 8003484: 4a6e ldr r2, [pc, #440] @ (8003640 ) 8003486: f043 0301 orr.w r3, r3, #1 800348a: 6713 str r3, [r2, #112] @ 0x70 800348c: e02d b.n 80034ea 800348e: 687b ldr r3, [r7, #4] 8003490: 689b ldr r3, [r3, #8] 8003492: 2b00 cmp r3, #0 8003494: d10c bne.n 80034b0 8003496: 4b6a ldr r3, [pc, #424] @ (8003640 ) 8003498: 6f1b ldr r3, [r3, #112] @ 0x70 800349a: 4a69 ldr r2, [pc, #420] @ (8003640 ) 800349c: f023 0301 bic.w r3, r3, #1 80034a0: 6713 str r3, [r2, #112] @ 0x70 80034a2: 4b67 ldr r3, [pc, #412] @ (8003640 ) 80034a4: 6f1b ldr r3, [r3, #112] @ 0x70 80034a6: 4a66 ldr r2, [pc, #408] @ (8003640 ) 80034a8: f023 0304 bic.w r3, r3, #4 80034ac: 6713 str r3, [r2, #112] @ 0x70 80034ae: e01c b.n 80034ea 80034b0: 687b ldr r3, [r7, #4] 80034b2: 689b ldr r3, [r3, #8] 80034b4: 2b05 cmp r3, #5 80034b6: d10c bne.n 80034d2 80034b8: 4b61 ldr r3, [pc, #388] @ (8003640 ) 80034ba: 6f1b ldr r3, [r3, #112] @ 0x70 80034bc: 4a60 ldr r2, [pc, #384] @ (8003640 ) 80034be: f043 0304 orr.w r3, r3, #4 80034c2: 6713 str r3, [r2, #112] @ 0x70 80034c4: 4b5e ldr r3, [pc, #376] @ (8003640 ) 80034c6: 6f1b ldr r3, [r3, #112] @ 0x70 80034c8: 4a5d ldr r2, [pc, #372] @ (8003640 ) 80034ca: f043 0301 orr.w r3, r3, #1 80034ce: 6713 str r3, [r2, #112] @ 0x70 80034d0: e00b b.n 80034ea 80034d2: 4b5b ldr r3, [pc, #364] @ (8003640 ) 80034d4: 6f1b ldr r3, [r3, #112] @ 0x70 80034d6: 4a5a ldr r2, [pc, #360] @ (8003640 ) 80034d8: f023 0301 bic.w r3, r3, #1 80034dc: 6713 str r3, [r2, #112] @ 0x70 80034de: 4b58 ldr r3, [pc, #352] @ (8003640 ) 80034e0: 6f1b ldr r3, [r3, #112] @ 0x70 80034e2: 4a57 ldr r2, [pc, #348] @ (8003640 ) 80034e4: f023 0304 bic.w r3, r3, #4 80034e8: 6713 str r3, [r2, #112] @ 0x70 /* Check the LSE State */ if ((RCC_OscInitStruct->LSEState) != RCC_LSE_OFF) 80034ea: 687b ldr r3, [r7, #4] 80034ec: 689b ldr r3, [r3, #8] 80034ee: 2b00 cmp r3, #0 80034f0: d015 beq.n 800351e { /* Get Start Tick*/ tickstart = HAL_GetTick(); 80034f2: f7fe fe5b bl 80021ac 80034f6: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 80034f8: e00a b.n 8003510 { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 80034fa: f7fe fe57 bl 80021ac 80034fe: 4602 mov r2, r0 8003500: 693b ldr r3, [r7, #16] 8003502: 1ad3 subs r3, r2, r3 8003504: f241 3288 movw r2, #5000 @ 0x1388 8003508: 4293 cmp r3, r2 800350a: d901 bls.n 8003510 { return HAL_TIMEOUT; 800350c: 2303 movs r3, #3 800350e: e0ce b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8003510: 4b4b ldr r3, [pc, #300] @ (8003640 ) 8003512: 6f1b ldr r3, [r3, #112] @ 0x70 8003514: f003 0302 and.w r3, r3, #2 8003518: 2b00 cmp r3, #0 800351a: d0ee beq.n 80034fa 800351c: e014 b.n 8003548 } } else { /* Get Start Tick*/ tickstart = HAL_GetTick(); 800351e: f7fe fe45 bl 80021ac 8003522: 6138 str r0, [r7, #16] /* Wait till LSE is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 8003524: e00a b.n 800353c { if ((HAL_GetTick() - tickstart) > RCC_LSE_TIMEOUT_VALUE) 8003526: f7fe fe41 bl 80021ac 800352a: 4602 mov r2, r0 800352c: 693b ldr r3, [r7, #16] 800352e: 1ad3 subs r3, r2, r3 8003530: f241 3288 movw r2, #5000 @ 0x1388 8003534: 4293 cmp r3, r2 8003536: d901 bls.n 800353c { return HAL_TIMEOUT; 8003538: 2303 movs r3, #3 800353a: e0b8 b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) != RESET) 800353c: 4b40 ldr r3, [pc, #256] @ (8003640 ) 800353e: 6f1b ldr r3, [r3, #112] @ 0x70 8003540: f003 0302 and.w r3, r3, #2 8003544: 2b00 cmp r3, #0 8003546: d1ee bne.n 8003526 } } } /* Restore clock configuration if changed */ if (pwrclkchanged == SET) 8003548: 7dfb ldrb r3, [r7, #23] 800354a: 2b01 cmp r3, #1 800354c: d105 bne.n 800355a { __HAL_RCC_PWR_CLK_DISABLE(); 800354e: 4b3c ldr r3, [pc, #240] @ (8003640 ) 8003550: 6c1b ldr r3, [r3, #64] @ 0x40 8003552: 4a3b ldr r2, [pc, #236] @ (8003640 ) 8003554: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 8003558: 6413 str r3, [r2, #64] @ 0x40 } } /*-------------------------------- PLL Configuration -----------------------*/ /* Check the parameters */ assert_param(IS_RCC_PLL(RCC_OscInitStruct->PLL.PLLState)); if ((RCC_OscInitStruct->PLL.PLLState) != RCC_PLL_NONE) 800355a: 687b ldr r3, [r7, #4] 800355c: 699b ldr r3, [r3, #24] 800355e: 2b00 cmp r3, #0 8003560: f000 80a4 beq.w 80036ac { /* Check if the PLL is used as system clock or not */ if (__HAL_RCC_GET_SYSCLK_SOURCE() != RCC_SYSCLKSOURCE_STATUS_PLLCLK) 8003564: 4b36 ldr r3, [pc, #216] @ (8003640 ) 8003566: 689b ldr r3, [r3, #8] 8003568: f003 030c and.w r3, r3, #12 800356c: 2b08 cmp r3, #8 800356e: d06b beq.n 8003648 { if ((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_ON) 8003570: 687b ldr r3, [r7, #4] 8003572: 699b ldr r3, [r3, #24] 8003574: 2b02 cmp r3, #2 8003576: d149 bne.n 800360c #if defined (RCC_PLLCFGR_PLLR) assert_param(IS_RCC_PLLR_VALUE(RCC_OscInitStruct->PLL.PLLR)); #endif /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 8003578: 4b31 ldr r3, [pc, #196] @ (8003640 ) 800357a: 681b ldr r3, [r3, #0] 800357c: 4a30 ldr r2, [pc, #192] @ (8003640 ) 800357e: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 8003582: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003584: f7fe fe12 bl 80021ac 8003588: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800358a: e008 b.n 800359e { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 800358c: f7fe fe0e bl 80021ac 8003590: 4602 mov r2, r0 8003592: 693b ldr r3, [r7, #16] 8003594: 1ad3 subs r3, r2, r3 8003596: 2b02 cmp r3, #2 8003598: d901 bls.n 800359e { return HAL_TIMEOUT; 800359a: 2303 movs r3, #3 800359c: e087 b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800359e: 4b28 ldr r3, [pc, #160] @ (8003640 ) 80035a0: 681b ldr r3, [r3, #0] 80035a2: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 80035a6: 2b00 cmp r3, #0 80035a8: d1f0 bne.n 800358c RCC_OscInitStruct->PLL.PLLN, RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ, RCC_OscInitStruct->PLL.PLLR); #else __HAL_RCC_PLL_CONFIG(RCC_OscInitStruct->PLL.PLLSource, 80035aa: 687b ldr r3, [r7, #4] 80035ac: 69da ldr r2, [r3, #28] 80035ae: 687b ldr r3, [r7, #4] 80035b0: 6a1b ldr r3, [r3, #32] 80035b2: 431a orrs r2, r3 80035b4: 687b ldr r3, [r7, #4] 80035b6: 6a5b ldr r3, [r3, #36] @ 0x24 80035b8: 019b lsls r3, r3, #6 80035ba: 431a orrs r2, r3 80035bc: 687b ldr r3, [r7, #4] 80035be: 6a9b ldr r3, [r3, #40] @ 0x28 80035c0: 085b lsrs r3, r3, #1 80035c2: 3b01 subs r3, #1 80035c4: 041b lsls r3, r3, #16 80035c6: 431a orrs r2, r3 80035c8: 687b ldr r3, [r7, #4] 80035ca: 6adb ldr r3, [r3, #44] @ 0x2c 80035cc: 061b lsls r3, r3, #24 80035ce: 4313 orrs r3, r2 80035d0: 4a1b ldr r2, [pc, #108] @ (8003640 ) 80035d2: f043 5300 orr.w r3, r3, #536870912 @ 0x20000000 80035d6: 6053 str r3, [r2, #4] RCC_OscInitStruct->PLL.PLLP, RCC_OscInitStruct->PLL.PLLQ); #endif /* Enable the main PLL. */ __HAL_RCC_PLL_ENABLE(); 80035d8: 4b19 ldr r3, [pc, #100] @ (8003640 ) 80035da: 681b ldr r3, [r3, #0] 80035dc: 4a18 ldr r2, [pc, #96] @ (8003640 ) 80035de: f043 7380 orr.w r3, r3, #16777216 @ 0x1000000 80035e2: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80035e4: f7fe fde2 bl 80021ac 80035e8: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80035ea: e008 b.n 80035fe { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 80035ec: f7fe fdde bl 80021ac 80035f0: 4602 mov r2, r0 80035f2: 693b ldr r3, [r7, #16] 80035f4: 1ad3 subs r3, r2, r3 80035f6: 2b02 cmp r3, #2 80035f8: d901 bls.n 80035fe { return HAL_TIMEOUT; 80035fa: 2303 movs r3, #3 80035fc: e057 b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 80035fe: 4b10 ldr r3, [pc, #64] @ (8003640 ) 8003600: 681b ldr r3, [r3, #0] 8003602: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8003606: 2b00 cmp r3, #0 8003608: d0f0 beq.n 80035ec 800360a: e04f b.n 80036ac } } else { /* Disable the main PLL. */ __HAL_RCC_PLL_DISABLE(); 800360c: 4b0c ldr r3, [pc, #48] @ (8003640 ) 800360e: 681b ldr r3, [r3, #0] 8003610: 4a0b ldr r2, [pc, #44] @ (8003640 ) 8003612: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 8003616: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003618: f7fe fdc8 bl 80021ac 800361c: 6138 str r0, [r7, #16] /* Wait till PLL is ready */ while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 800361e: e008 b.n 8003632 { if ((HAL_GetTick() - tickstart) > PLL_TIMEOUT_VALUE) 8003620: f7fe fdc4 bl 80021ac 8003624: 4602 mov r2, r0 8003626: 693b ldr r3, [r7, #16] 8003628: 1ad3 subs r3, r2, r3 800362a: 2b02 cmp r3, #2 800362c: d901 bls.n 8003632 { return HAL_TIMEOUT; 800362e: 2303 movs r3, #3 8003630: e03d b.n 80036ae while (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) != RESET) 8003632: 4b03 ldr r3, [pc, #12] @ (8003640 ) 8003634: 681b ldr r3, [r3, #0] 8003636: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 800363a: 2b00 cmp r3, #0 800363c: d1f0 bne.n 8003620 800363e: e035 b.n 80036ac 8003640: 40023800 .word 0x40023800 8003644: 40007000 .word 0x40007000 } } else { /* Do not return HAL_ERROR if request repeats the current configuration */ pll_config = RCC->PLLCFGR; 8003648: 4b1b ldr r3, [pc, #108] @ (80036b8 ) 800364a: 685b ldr r3, [r3, #4] 800364c: 60fb str r3, [r7, #12] (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos)) || (READ_BIT(pll_config, RCC_PLLCFGR_PLLR) != (RCC_OscInitStruct->PLL.PLLR << RCC_PLLCFGR_PLLR_Pos))) #else if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 800364e: 687b ldr r3, [r7, #4] 8003650: 699b ldr r3, [r3, #24] 8003652: 2b01 cmp r3, #1 8003654: d028 beq.n 80036a8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 8003656: 68fb ldr r3, [r7, #12] 8003658: f403 0280 and.w r2, r3, #4194304 @ 0x400000 800365c: 687b ldr r3, [r7, #4] 800365e: 69db ldr r3, [r3, #28] if (((RCC_OscInitStruct->PLL.PLLState) == RCC_PLL_OFF) || 8003660: 429a cmp r2, r3 8003662: d121 bne.n 80036a8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || 8003664: 68fb ldr r3, [r7, #12] 8003666: f003 023f and.w r2, r3, #63 @ 0x3f 800366a: 687b ldr r3, [r7, #4] 800366c: 6a1b ldr r3, [r3, #32] (READ_BIT(pll_config, RCC_PLLCFGR_PLLSRC) != RCC_OscInitStruct->PLL.PLLSource) || 800366e: 429a cmp r2, r3 8003670: d11a bne.n 80036a8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || 8003672: 68fa ldr r2, [r7, #12] 8003674: f647 73c0 movw r3, #32704 @ 0x7fc0 8003678: 4013 ands r3, r2 800367a: 687a ldr r2, [r7, #4] 800367c: 6a52 ldr r2, [r2, #36] @ 0x24 800367e: 0192 lsls r2, r2, #6 (READ_BIT(pll_config, RCC_PLLCFGR_PLLM) != RCC_OscInitStruct->PLL.PLLM) || 8003680: 4293 cmp r3, r2 8003682: d111 bne.n 80036a8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) || 8003684: 68fb ldr r3, [r7, #12] 8003686: f403 3240 and.w r2, r3, #196608 @ 0x30000 800368a: 687b ldr r3, [r7, #4] 800368c: 6a9b ldr r3, [r3, #40] @ 0x28 800368e: 085b lsrs r3, r3, #1 8003690: 3b01 subs r3, #1 8003692: 041b lsls r3, r3, #16 (READ_BIT(pll_config, RCC_PLLCFGR_PLLN) != (RCC_OscInitStruct->PLL.PLLN << RCC_PLLCFGR_PLLN_Pos)) || 8003694: 429a cmp r2, r3 8003696: d107 bne.n 80036a8 (READ_BIT(pll_config, RCC_PLLCFGR_PLLQ) != (RCC_OscInitStruct->PLL.PLLQ << RCC_PLLCFGR_PLLQ_Pos))) 8003698: 68fb ldr r3, [r7, #12] 800369a: f003 6270 and.w r2, r3, #251658240 @ 0xf000000 800369e: 687b ldr r3, [r7, #4] 80036a0: 6adb ldr r3, [r3, #44] @ 0x2c 80036a2: 061b lsls r3, r3, #24 (READ_BIT(pll_config, RCC_PLLCFGR_PLLP) != ((((RCC_OscInitStruct->PLL.PLLP) >> 1U) - 1U) << RCC_PLLCFGR_PLLP_Pos)) || 80036a4: 429a cmp r2, r3 80036a6: d001 beq.n 80036ac #endif { return HAL_ERROR; 80036a8: 2301 movs r3, #1 80036aa: e000 b.n 80036ae } } } return HAL_OK; 80036ac: 2300 movs r3, #0 } 80036ae: 4618 mov r0, r3 80036b0: 3718 adds r7, #24 80036b2: 46bd mov sp, r7 80036b4: bd80 pop {r7, pc} 80036b6: bf00 nop 80036b8: 40023800 .word 0x40023800 080036bc : * HPRE[3:0] bits to ensure that HCLK not exceed the maximum allowed frequency * (for more details refer to section above "Initialization/de-initialization functions") * @retval None */ HAL_StatusTypeDef HAL_RCC_ClockConfig(const RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t FLatency) { 80036bc: b580 push {r7, lr} 80036be: b084 sub sp, #16 80036c0: af00 add r7, sp, #0 80036c2: 6078 str r0, [r7, #4] 80036c4: 6039 str r1, [r7, #0] uint32_t tickstart = 0; 80036c6: 2300 movs r3, #0 80036c8: 60fb str r3, [r7, #12] /* Check Null pointer */ if (RCC_ClkInitStruct == NULL) 80036ca: 687b ldr r3, [r7, #4] 80036cc: 2b00 cmp r3, #0 80036ce: d101 bne.n 80036d4 { return HAL_ERROR; 80036d0: 2301 movs r3, #1 80036d2: e0d0 b.n 8003876 /* To correctly read data from FLASH memory, the number of wait states (LATENCY) must be correctly programmed according to the frequency of the CPU clock (HCLK) and the supply voltage of the device. */ /* Increasing the CPU frequency */ if (FLatency > __HAL_FLASH_GET_LATENCY()) 80036d4: 4b6a ldr r3, [pc, #424] @ (8003880 ) 80036d6: 681b ldr r3, [r3, #0] 80036d8: f003 030f and.w r3, r3, #15 80036dc: 683a ldr r2, [r7, #0] 80036de: 429a cmp r2, r3 80036e0: d910 bls.n 8003704 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80036e2: 4b67 ldr r3, [pc, #412] @ (8003880 ) 80036e4: 681b ldr r3, [r3, #0] 80036e6: f023 020f bic.w r2, r3, #15 80036ea: 4965 ldr r1, [pc, #404] @ (8003880 ) 80036ec: 683b ldr r3, [r7, #0] 80036ee: 4313 orrs r3, r2 80036f0: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80036f2: 4b63 ldr r3, [pc, #396] @ (8003880 ) 80036f4: 681b ldr r3, [r3, #0] 80036f6: f003 030f and.w r3, r3, #15 80036fa: 683a ldr r2, [r7, #0] 80036fc: 429a cmp r2, r3 80036fe: d001 beq.n 8003704 { return HAL_ERROR; 8003700: 2301 movs r3, #1 8003702: e0b8 b.n 8003876 } } /*-------------------------- HCLK Configuration --------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_HCLK) == RCC_CLOCKTYPE_HCLK) 8003704: 687b ldr r3, [r7, #4] 8003706: 681b ldr r3, [r3, #0] 8003708: f003 0302 and.w r3, r3, #2 800370c: 2b00 cmp r3, #0 800370e: d020 beq.n 8003752 { /* Set the highest APBx dividers in order to ensure that we do not go through a non-spec phase whatever we decrease or increase HCLK. */ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003710: 687b ldr r3, [r7, #4] 8003712: 681b ldr r3, [r3, #0] 8003714: f003 0304 and.w r3, r3, #4 8003718: 2b00 cmp r3, #0 800371a: d005 beq.n 8003728 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_HCLK_DIV16); 800371c: 4b59 ldr r3, [pc, #356] @ (8003884 ) 800371e: 689b ldr r3, [r3, #8] 8003720: 4a58 ldr r2, [pc, #352] @ (8003884 ) 8003722: f443 53e0 orr.w r3, r3, #7168 @ 0x1c00 8003726: 6093 str r3, [r2, #8] } if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 8003728: 687b ldr r3, [r7, #4] 800372a: 681b ldr r3, [r3, #0] 800372c: f003 0308 and.w r3, r3, #8 8003730: 2b00 cmp r3, #0 8003732: d005 beq.n 8003740 { MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, (RCC_HCLK_DIV16 << 3)); 8003734: 4b53 ldr r3, [pc, #332] @ (8003884 ) 8003736: 689b ldr r3, [r3, #8] 8003738: 4a52 ldr r2, [pc, #328] @ (8003884 ) 800373a: f443 4360 orr.w r3, r3, #57344 @ 0xe000 800373e: 6093 str r3, [r2, #8] } /* Set the new HCLK clock divider */ assert_param(IS_RCC_HCLK(RCC_ClkInitStruct->AHBCLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_HPRE, RCC_ClkInitStruct->AHBCLKDivider); 8003740: 4b50 ldr r3, [pc, #320] @ (8003884 ) 8003742: 689b ldr r3, [r3, #8] 8003744: f023 02f0 bic.w r2, r3, #240 @ 0xf0 8003748: 687b ldr r3, [r7, #4] 800374a: 689b ldr r3, [r3, #8] 800374c: 494d ldr r1, [pc, #308] @ (8003884 ) 800374e: 4313 orrs r3, r2 8003750: 608b str r3, [r1, #8] } /*------------------------- SYSCLK Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_SYSCLK) == RCC_CLOCKTYPE_SYSCLK) 8003752: 687b ldr r3, [r7, #4] 8003754: 681b ldr r3, [r3, #0] 8003756: f003 0301 and.w r3, r3, #1 800375a: 2b00 cmp r3, #0 800375c: d040 beq.n 80037e0 { assert_param(IS_RCC_SYSCLKSOURCE(RCC_ClkInitStruct->SYSCLKSource)); /* HSE is selected as System Clock Source */ if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_HSE) 800375e: 687b ldr r3, [r7, #4] 8003760: 685b ldr r3, [r3, #4] 8003762: 2b01 cmp r3, #1 8003764: d107 bne.n 8003776 { /* Check the HSE ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSERDY) == RESET) 8003766: 4b47 ldr r3, [pc, #284] @ (8003884 ) 8003768: 681b ldr r3, [r3, #0] 800376a: f403 3300 and.w r3, r3, #131072 @ 0x20000 800376e: 2b00 cmp r3, #0 8003770: d115 bne.n 800379e { return HAL_ERROR; 8003772: 2301 movs r3, #1 8003774: e07f b.n 8003876 } } /* PLL is selected as System Clock Source */ else if (RCC_ClkInitStruct->SYSCLKSource == RCC_SYSCLKSOURCE_PLLCLK) 8003776: 687b ldr r3, [r7, #4] 8003778: 685b ldr r3, [r3, #4] 800377a: 2b02 cmp r3, #2 800377c: d107 bne.n 800378e { /* Check the PLL ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_PLLRDY) == RESET) 800377e: 4b41 ldr r3, [pc, #260] @ (8003884 ) 8003780: 681b ldr r3, [r3, #0] 8003782: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8003786: 2b00 cmp r3, #0 8003788: d109 bne.n 800379e { return HAL_ERROR; 800378a: 2301 movs r3, #1 800378c: e073 b.n 8003876 } /* HSI is selected as System Clock Source */ else { /* Check the HSI ready flag */ if (__HAL_RCC_GET_FLAG(RCC_FLAG_HSIRDY) == RESET) 800378e: 4b3d ldr r3, [pc, #244] @ (8003884 ) 8003790: 681b ldr r3, [r3, #0] 8003792: f003 0302 and.w r3, r3, #2 8003796: 2b00 cmp r3, #0 8003798: d101 bne.n 800379e { return HAL_ERROR; 800379a: 2301 movs r3, #1 800379c: e06b b.n 8003876 } } __HAL_RCC_SYSCLK_CONFIG(RCC_ClkInitStruct->SYSCLKSource); 800379e: 4b39 ldr r3, [pc, #228] @ (8003884 ) 80037a0: 689b ldr r3, [r3, #8] 80037a2: f023 0203 bic.w r2, r3, #3 80037a6: 687b ldr r3, [r7, #4] 80037a8: 685b ldr r3, [r3, #4] 80037aa: 4936 ldr r1, [pc, #216] @ (8003884 ) 80037ac: 4313 orrs r3, r2 80037ae: 608b str r3, [r1, #8] /* Get Start Tick*/ tickstart = HAL_GetTick(); 80037b0: f7fe fcfc bl 80021ac 80037b4: 60f8 str r0, [r7, #12] while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80037b6: e00a b.n 80037ce { if ((HAL_GetTick() - tickstart) > CLOCKSWITCH_TIMEOUT_VALUE) 80037b8: f7fe fcf8 bl 80021ac 80037bc: 4602 mov r2, r0 80037be: 68fb ldr r3, [r7, #12] 80037c0: 1ad3 subs r3, r2, r3 80037c2: f241 3288 movw r2, #5000 @ 0x1388 80037c6: 4293 cmp r3, r2 80037c8: d901 bls.n 80037ce { return HAL_TIMEOUT; 80037ca: 2303 movs r3, #3 80037cc: e053 b.n 8003876 while (__HAL_RCC_GET_SYSCLK_SOURCE() != (RCC_ClkInitStruct->SYSCLKSource << RCC_CFGR_SWS_Pos)) 80037ce: 4b2d ldr r3, [pc, #180] @ (8003884 ) 80037d0: 689b ldr r3, [r3, #8] 80037d2: f003 020c and.w r2, r3, #12 80037d6: 687b ldr r3, [r7, #4] 80037d8: 685b ldr r3, [r3, #4] 80037da: 009b lsls r3, r3, #2 80037dc: 429a cmp r2, r3 80037de: d1eb bne.n 80037b8 } } } /* Decreasing the number of wait states because of lower CPU frequency */ if (FLatency < __HAL_FLASH_GET_LATENCY()) 80037e0: 4b27 ldr r3, [pc, #156] @ (8003880 ) 80037e2: 681b ldr r3, [r3, #0] 80037e4: f003 030f and.w r3, r3, #15 80037e8: 683a ldr r2, [r7, #0] 80037ea: 429a cmp r2, r3 80037ec: d210 bcs.n 8003810 { /* Program the new number of wait states to the LATENCY bits in the FLASH_ACR register */ __HAL_FLASH_SET_LATENCY(FLatency); 80037ee: 4b24 ldr r3, [pc, #144] @ (8003880 ) 80037f0: 681b ldr r3, [r3, #0] 80037f2: f023 020f bic.w r2, r3, #15 80037f6: 4922 ldr r1, [pc, #136] @ (8003880 ) 80037f8: 683b ldr r3, [r7, #0] 80037fa: 4313 orrs r3, r2 80037fc: 600b str r3, [r1, #0] /* Check that the new number of wait states is taken into account to access the Flash memory by reading the FLASH_ACR register */ if (__HAL_FLASH_GET_LATENCY() != FLatency) 80037fe: 4b20 ldr r3, [pc, #128] @ (8003880 ) 8003800: 681b ldr r3, [r3, #0] 8003802: f003 030f and.w r3, r3, #15 8003806: 683a ldr r2, [r7, #0] 8003808: 429a cmp r2, r3 800380a: d001 beq.n 8003810 { return HAL_ERROR; 800380c: 2301 movs r3, #1 800380e: e032 b.n 8003876 } } /*-------------------------- PCLK1 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK1) == RCC_CLOCKTYPE_PCLK1) 8003810: 687b ldr r3, [r7, #4] 8003812: 681b ldr r3, [r3, #0] 8003814: f003 0304 and.w r3, r3, #4 8003818: 2b00 cmp r3, #0 800381a: d008 beq.n 800382e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB1CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE1, RCC_ClkInitStruct->APB1CLKDivider); 800381c: 4b19 ldr r3, [pc, #100] @ (8003884 ) 800381e: 689b ldr r3, [r3, #8] 8003820: f423 52e0 bic.w r2, r3, #7168 @ 0x1c00 8003824: 687b ldr r3, [r7, #4] 8003826: 68db ldr r3, [r3, #12] 8003828: 4916 ldr r1, [pc, #88] @ (8003884 ) 800382a: 4313 orrs r3, r2 800382c: 608b str r3, [r1, #8] } /*-------------------------- PCLK2 Configuration ---------------------------*/ if (((RCC_ClkInitStruct->ClockType) & RCC_CLOCKTYPE_PCLK2) == RCC_CLOCKTYPE_PCLK2) 800382e: 687b ldr r3, [r7, #4] 8003830: 681b ldr r3, [r3, #0] 8003832: f003 0308 and.w r3, r3, #8 8003836: 2b00 cmp r3, #0 8003838: d009 beq.n 800384e { assert_param(IS_RCC_PCLK(RCC_ClkInitStruct->APB2CLKDivider)); MODIFY_REG(RCC->CFGR, RCC_CFGR_PPRE2, ((RCC_ClkInitStruct->APB2CLKDivider) << 3)); 800383a: 4b12 ldr r3, [pc, #72] @ (8003884 ) 800383c: 689b ldr r3, [r3, #8] 800383e: f423 4260 bic.w r2, r3, #57344 @ 0xe000 8003842: 687b ldr r3, [r7, #4] 8003844: 691b ldr r3, [r3, #16] 8003846: 00db lsls r3, r3, #3 8003848: 490e ldr r1, [pc, #56] @ (8003884 ) 800384a: 4313 orrs r3, r2 800384c: 608b str r3, [r1, #8] } /* Update the SystemCoreClock global variable */ SystemCoreClock = HAL_RCC_GetSysClockFreq() >> AHBPrescTable[(RCC->CFGR & RCC_CFGR_HPRE) >> RCC_CFGR_HPRE_Pos]; 800384e: f000 f821 bl 8003894 8003852: 4602 mov r2, r0 8003854: 4b0b ldr r3, [pc, #44] @ (8003884 ) 8003856: 689b ldr r3, [r3, #8] 8003858: 091b lsrs r3, r3, #4 800385a: f003 030f and.w r3, r3, #15 800385e: 490a ldr r1, [pc, #40] @ (8003888 ) 8003860: 5ccb ldrb r3, [r1, r3] 8003862: fa22 f303 lsr.w r3, r2, r3 8003866: 4a09 ldr r2, [pc, #36] @ (800388c ) 8003868: 6013 str r3, [r2, #0] /* Configure the source of time base considering new system clocks settings*/ HAL_InitTick(uwTickPrio); 800386a: 4b09 ldr r3, [pc, #36] @ (8003890 ) 800386c: 681b ldr r3, [r3, #0] 800386e: 4618 mov r0, r3 8003870: f7fe fb18 bl 8001ea4 return HAL_OK; 8003874: 2300 movs r3, #0 } 8003876: 4618 mov r0, r3 8003878: 3710 adds r7, #16 800387a: 46bd mov sp, r7 800387c: bd80 pop {r7, pc} 800387e: bf00 nop 8003880: 40023c00 .word 0x40023c00 8003884: 40023800 .word 0x40023800 8003888: 080095d4 .word 0x080095d4 800388c: 20000008 .word 0x20000008 8003890: 2000000c .word 0x2000000c 08003894 : * * * @retval SYSCLK frequency */ uint32_t HAL_RCC_GetSysClockFreq(void) { 8003894: e92d 4fb0 stmdb sp!, {r4, r5, r7, r8, r9, sl, fp, lr} 8003898: b090 sub sp, #64 @ 0x40 800389a: af00 add r7, sp, #0 uint32_t pllm = 0, pllvco = 0, pllp = 0; 800389c: 2300 movs r3, #0 800389e: 637b str r3, [r7, #52] @ 0x34 80038a0: 2300 movs r3, #0 80038a2: 63fb str r3, [r7, #60] @ 0x3c 80038a4: 2300 movs r3, #0 80038a6: 633b str r3, [r7, #48] @ 0x30 uint32_t sysclockfreq = 0; 80038a8: 2300 movs r3, #0 80038aa: 63bb str r3, [r7, #56] @ 0x38 /* Get SYSCLK source -------------------------------------------------------*/ switch (RCC->CFGR & RCC_CFGR_SWS) 80038ac: 4b59 ldr r3, [pc, #356] @ (8003a14 ) 80038ae: 689b ldr r3, [r3, #8] 80038b0: f003 030c and.w r3, r3, #12 80038b4: 2b08 cmp r3, #8 80038b6: d00d beq.n 80038d4 80038b8: 2b08 cmp r3, #8 80038ba: f200 80a1 bhi.w 8003a00 80038be: 2b00 cmp r3, #0 80038c0: d002 beq.n 80038c8 80038c2: 2b04 cmp r3, #4 80038c4: d003 beq.n 80038ce 80038c6: e09b b.n 8003a00 { case RCC_SYSCLKSOURCE_STATUS_HSI: /* HSI used as system clock source */ { sysclockfreq = HSI_VALUE; 80038c8: 4b53 ldr r3, [pc, #332] @ (8003a18 ) 80038ca: 63bb str r3, [r7, #56] @ 0x38 break; 80038cc: e09b b.n 8003a06 } case RCC_SYSCLKSOURCE_STATUS_HSE: /* HSE used as system clock source */ { sysclockfreq = HSE_VALUE; 80038ce: 4b53 ldr r3, [pc, #332] @ (8003a1c ) 80038d0: 63bb str r3, [r7, #56] @ 0x38 break; 80038d2: e098 b.n 8003a06 } case RCC_SYSCLKSOURCE_STATUS_PLLCLK: /* PLL used as system clock source */ { /* PLL_VCO = (HSE_VALUE or HSI_VALUE / PLLM) * PLLN SYSCLK = PLL_VCO / PLLP */ pllm = RCC->PLLCFGR & RCC_PLLCFGR_PLLM; 80038d4: 4b4f ldr r3, [pc, #316] @ (8003a14 ) 80038d6: 685b ldr r3, [r3, #4] 80038d8: f003 033f and.w r3, r3, #63 @ 0x3f 80038dc: 637b str r3, [r7, #52] @ 0x34 if (__HAL_RCC_GET_PLL_OSCSOURCE() != RCC_PLLCFGR_PLLSRC_HSI) 80038de: 4b4d ldr r3, [pc, #308] @ (8003a14 ) 80038e0: 685b ldr r3, [r3, #4] 80038e2: f403 0380 and.w r3, r3, #4194304 @ 0x400000 80038e6: 2b00 cmp r3, #0 80038e8: d028 beq.n 800393c { /* HSE used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSE_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 80038ea: 4b4a ldr r3, [pc, #296] @ (8003a14 ) 80038ec: 685b ldr r3, [r3, #4] 80038ee: 099b lsrs r3, r3, #6 80038f0: 2200 movs r2, #0 80038f2: 623b str r3, [r7, #32] 80038f4: 627a str r2, [r7, #36] @ 0x24 80038f6: 6a3b ldr r3, [r7, #32] 80038f8: f3c3 0008 ubfx r0, r3, #0, #9 80038fc: 2100 movs r1, #0 80038fe: 4b47 ldr r3, [pc, #284] @ (8003a1c ) 8003900: fb03 f201 mul.w r2, r3, r1 8003904: 2300 movs r3, #0 8003906: fb00 f303 mul.w r3, r0, r3 800390a: 4413 add r3, r2 800390c: 4a43 ldr r2, [pc, #268] @ (8003a1c ) 800390e: fba0 1202 umull r1, r2, r0, r2 8003912: 62fa str r2, [r7, #44] @ 0x2c 8003914: 460a mov r2, r1 8003916: 62ba str r2, [r7, #40] @ 0x28 8003918: 6afa ldr r2, [r7, #44] @ 0x2c 800391a: 4413 add r3, r2 800391c: 62fb str r3, [r7, #44] @ 0x2c 800391e: 6b7b ldr r3, [r7, #52] @ 0x34 8003920: 2200 movs r2, #0 8003922: 61bb str r3, [r7, #24] 8003924: 61fa str r2, [r7, #28] 8003926: e9d7 2306 ldrd r2, r3, [r7, #24] 800392a: e9d7 010a ldrd r0, r1, [r7, #40] @ 0x28 800392e: f7fc fccf bl 80002d0 <__aeabi_uldivmod> 8003932: 4602 mov r2, r0 8003934: 460b mov r3, r1 8003936: 4613 mov r3, r2 8003938: 63fb str r3, [r7, #60] @ 0x3c 800393a: e053 b.n 80039e4 } else { /* HSI used as PLL clock source */ pllvco = (uint32_t)((((uint64_t) HSI_VALUE * ((uint64_t)((RCC->PLLCFGR & RCC_PLLCFGR_PLLN) >> RCC_PLLCFGR_PLLN_Pos)))) / (uint64_t)pllm); 800393c: 4b35 ldr r3, [pc, #212] @ (8003a14 ) 800393e: 685b ldr r3, [r3, #4] 8003940: 099b lsrs r3, r3, #6 8003942: 2200 movs r2, #0 8003944: 613b str r3, [r7, #16] 8003946: 617a str r2, [r7, #20] 8003948: 693b ldr r3, [r7, #16] 800394a: f3c3 0a08 ubfx sl, r3, #0, #9 800394e: f04f 0b00 mov.w fp, #0 8003952: 4652 mov r2, sl 8003954: 465b mov r3, fp 8003956: f04f 0000 mov.w r0, #0 800395a: f04f 0100 mov.w r1, #0 800395e: 0159 lsls r1, r3, #5 8003960: ea41 61d2 orr.w r1, r1, r2, lsr #27 8003964: 0150 lsls r0, r2, #5 8003966: 4602 mov r2, r0 8003968: 460b mov r3, r1 800396a: ebb2 080a subs.w r8, r2, sl 800396e: eb63 090b sbc.w r9, r3, fp 8003972: f04f 0200 mov.w r2, #0 8003976: f04f 0300 mov.w r3, #0 800397a: ea4f 1389 mov.w r3, r9, lsl #6 800397e: ea43 6398 orr.w r3, r3, r8, lsr #26 8003982: ea4f 1288 mov.w r2, r8, lsl #6 8003986: ebb2 0408 subs.w r4, r2, r8 800398a: eb63 0509 sbc.w r5, r3, r9 800398e: f04f 0200 mov.w r2, #0 8003992: f04f 0300 mov.w r3, #0 8003996: 00eb lsls r3, r5, #3 8003998: ea43 7354 orr.w r3, r3, r4, lsr #29 800399c: 00e2 lsls r2, r4, #3 800399e: 4614 mov r4, r2 80039a0: 461d mov r5, r3 80039a2: eb14 030a adds.w r3, r4, sl 80039a6: 603b str r3, [r7, #0] 80039a8: eb45 030b adc.w r3, r5, fp 80039ac: 607b str r3, [r7, #4] 80039ae: f04f 0200 mov.w r2, #0 80039b2: f04f 0300 mov.w r3, #0 80039b6: e9d7 4500 ldrd r4, r5, [r7] 80039ba: 4629 mov r1, r5 80039bc: 028b lsls r3, r1, #10 80039be: 4621 mov r1, r4 80039c0: ea43 5391 orr.w r3, r3, r1, lsr #22 80039c4: 4621 mov r1, r4 80039c6: 028a lsls r2, r1, #10 80039c8: 4610 mov r0, r2 80039ca: 4619 mov r1, r3 80039cc: 6b7b ldr r3, [r7, #52] @ 0x34 80039ce: 2200 movs r2, #0 80039d0: 60bb str r3, [r7, #8] 80039d2: 60fa str r2, [r7, #12] 80039d4: e9d7 2302 ldrd r2, r3, [r7, #8] 80039d8: f7fc fc7a bl 80002d0 <__aeabi_uldivmod> 80039dc: 4602 mov r2, r0 80039de: 460b mov r3, r1 80039e0: 4613 mov r3, r2 80039e2: 63fb str r3, [r7, #60] @ 0x3c } pllp = ((((RCC->PLLCFGR & RCC_PLLCFGR_PLLP) >> RCC_PLLCFGR_PLLP_Pos) + 1) * 2); 80039e4: 4b0b ldr r3, [pc, #44] @ (8003a14 ) 80039e6: 685b ldr r3, [r3, #4] 80039e8: 0c1b lsrs r3, r3, #16 80039ea: f003 0303 and.w r3, r3, #3 80039ee: 3301 adds r3, #1 80039f0: 005b lsls r3, r3, #1 80039f2: 633b str r3, [r7, #48] @ 0x30 sysclockfreq = pllvco / pllp; 80039f4: 6bfa ldr r2, [r7, #60] @ 0x3c 80039f6: 6b3b ldr r3, [r7, #48] @ 0x30 80039f8: fbb2 f3f3 udiv r3, r2, r3 80039fc: 63bb str r3, [r7, #56] @ 0x38 break; 80039fe: e002 b.n 8003a06 } default: { sysclockfreq = HSI_VALUE; 8003a00: 4b05 ldr r3, [pc, #20] @ (8003a18 ) 8003a02: 63bb str r3, [r7, #56] @ 0x38 break; 8003a04: bf00 nop } } return sysclockfreq; 8003a06: 6bbb ldr r3, [r7, #56] @ 0x38 } 8003a08: 4618 mov r0, r3 8003a0a: 3740 adds r7, #64 @ 0x40 8003a0c: 46bd mov sp, r7 8003a0e: e8bd 8fb0 ldmia.w sp!, {r4, r5, r7, r8, r9, sl, fp, pc} 8003a12: bf00 nop 8003a14: 40023800 .word 0x40023800 8003a18: 00f42400 .word 0x00f42400 8003a1c: 017d7840 .word 0x017d7840 08003a20 : * right HCLK value. Otherwise, any configuration based on this function will be incorrect. * @note The SystemCoreClock CMSIS variable is used to store System Clock Frequency. * @retval HCLK frequency */ uint32_t HAL_RCC_GetHCLKFreq(void) { 8003a20: b480 push {r7} 8003a22: af00 add r7, sp, #0 return SystemCoreClock; 8003a24: 4b03 ldr r3, [pc, #12] @ (8003a34 ) 8003a26: 681b ldr r3, [r3, #0] } 8003a28: 4618 mov r0, r3 8003a2a: 46bd mov sp, r7 8003a2c: f85d 7b04 ldr.w r7, [sp], #4 8003a30: 4770 bx lr 8003a32: bf00 nop 8003a34: 20000008 .word 0x20000008 08003a38 : * @note Each time PCLK1 changes, this function must be called to update the * right PCLK1 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK1 frequency */ uint32_t HAL_RCC_GetPCLK1Freq(void) { 8003a38: b580 push {r7, lr} 8003a3a: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK1 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE1) >> RCC_CFGR_PPRE1_Pos]); 8003a3c: f7ff fff0 bl 8003a20 8003a40: 4602 mov r2, r0 8003a42: 4b05 ldr r3, [pc, #20] @ (8003a58 ) 8003a44: 689b ldr r3, [r3, #8] 8003a46: 0a9b lsrs r3, r3, #10 8003a48: f003 0307 and.w r3, r3, #7 8003a4c: 4903 ldr r1, [pc, #12] @ (8003a5c ) 8003a4e: 5ccb ldrb r3, [r1, r3] 8003a50: fa22 f303 lsr.w r3, r2, r3 } 8003a54: 4618 mov r0, r3 8003a56: bd80 pop {r7, pc} 8003a58: 40023800 .word 0x40023800 8003a5c: 080095e4 .word 0x080095e4 08003a60 : * @note Each time PCLK2 changes, this function must be called to update the * right PCLK2 value. Otherwise, any configuration based on this function will be incorrect. * @retval PCLK2 frequency */ uint32_t HAL_RCC_GetPCLK2Freq(void) { 8003a60: b580 push {r7, lr} 8003a62: af00 add r7, sp, #0 /* Get HCLK source and Compute PCLK2 frequency ---------------------------*/ return (HAL_RCC_GetHCLKFreq() >> APBPrescTable[(RCC->CFGR & RCC_CFGR_PPRE2) >> RCC_CFGR_PPRE2_Pos]); 8003a64: f7ff ffdc bl 8003a20 8003a68: 4602 mov r2, r0 8003a6a: 4b05 ldr r3, [pc, #20] @ (8003a80 ) 8003a6c: 689b ldr r3, [r3, #8] 8003a6e: 0b5b lsrs r3, r3, #13 8003a70: f003 0307 and.w r3, r3, #7 8003a74: 4903 ldr r1, [pc, #12] @ (8003a84 ) 8003a76: 5ccb ldrb r3, [r1, r3] 8003a78: fa22 f303 lsr.w r3, r2, r3 } 8003a7c: 4618 mov r0, r3 8003a7e: bd80 pop {r7, pc} 8003a80: 40023800 .word 0x40023800 8003a84: 080095e4 .word 0x080095e4 08003a88 : * will be configured. * @param pFLatency Pointer on the Flash Latency. * @retval None */ void HAL_RCC_GetClockConfig(RCC_ClkInitTypeDef *RCC_ClkInitStruct, uint32_t *pFLatency) { 8003a88: b480 push {r7} 8003a8a: b083 sub sp, #12 8003a8c: af00 add r7, sp, #0 8003a8e: 6078 str r0, [r7, #4] 8003a90: 6039 str r1, [r7, #0] /* Set all possible values for the Clock type parameter --------------------*/ RCC_ClkInitStruct->ClockType = RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2; 8003a92: 687b ldr r3, [r7, #4] 8003a94: 220f movs r2, #15 8003a96: 601a str r2, [r3, #0] /* Get the SYSCLK configuration --------------------------------------------*/ RCC_ClkInitStruct->SYSCLKSource = (uint32_t)(RCC->CFGR & RCC_CFGR_SW); 8003a98: 4b12 ldr r3, [pc, #72] @ (8003ae4 ) 8003a9a: 689b ldr r3, [r3, #8] 8003a9c: f003 0203 and.w r2, r3, #3 8003aa0: 687b ldr r3, [r7, #4] 8003aa2: 605a str r2, [r3, #4] /* Get the HCLK configuration ----------------------------------------------*/ RCC_ClkInitStruct->AHBCLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_HPRE); 8003aa4: 4b0f ldr r3, [pc, #60] @ (8003ae4 ) 8003aa6: 689b ldr r3, [r3, #8] 8003aa8: f003 02f0 and.w r2, r3, #240 @ 0xf0 8003aac: 687b ldr r3, [r7, #4] 8003aae: 609a str r2, [r3, #8] /* Get the APB1 configuration ----------------------------------------------*/ RCC_ClkInitStruct->APB1CLKDivider = (uint32_t)(RCC->CFGR & RCC_CFGR_PPRE1); 8003ab0: 4b0c ldr r3, [pc, #48] @ (8003ae4 ) 8003ab2: 689b ldr r3, [r3, #8] 8003ab4: f403 52e0 and.w r2, r3, #7168 @ 0x1c00 8003ab8: 687b ldr r3, [r7, #4] 8003aba: 60da str r2, [r3, #12] /* Get the APB2 configuration ----------------------------------------------*/ RCC_ClkInitStruct->APB2CLKDivider = (uint32_t)((RCC->CFGR & RCC_CFGR_PPRE2) >> 3); 8003abc: 4b09 ldr r3, [pc, #36] @ (8003ae4 ) 8003abe: 689b ldr r3, [r3, #8] 8003ac0: 08db lsrs r3, r3, #3 8003ac2: f403 52e0 and.w r2, r3, #7168 @ 0x1c00 8003ac6: 687b ldr r3, [r7, #4] 8003ac8: 611a str r2, [r3, #16] /* Get the Flash Wait State (Latency) configuration ------------------------*/ *pFLatency = (uint32_t)(FLASH->ACR & FLASH_ACR_LATENCY); 8003aca: 4b07 ldr r3, [pc, #28] @ (8003ae8 ) 8003acc: 681b ldr r3, [r3, #0] 8003ace: f003 020f and.w r2, r3, #15 8003ad2: 683b ldr r3, [r7, #0] 8003ad4: 601a str r2, [r3, #0] } 8003ad6: bf00 nop 8003ad8: 370c adds r7, #12 8003ada: 46bd mov sp, r7 8003adc: f85d 7b04 ldr.w r7, [sp], #4 8003ae0: 4770 bx lr 8003ae2: bf00 nop 8003ae4: 40023800 .word 0x40023800 8003ae8: 40023c00 .word 0x40023c00 08003aec : * the backup registers) are set to their reset values. * * @retval HAL status */ HAL_StatusTypeDef HAL_RCCEx_PeriphCLKConfig(RCC_PeriphCLKInitTypeDef *PeriphClkInit) { 8003aec: b580 push {r7, lr} 8003aee: b088 sub sp, #32 8003af0: af00 add r7, sp, #0 8003af2: 6078 str r0, [r7, #4] uint32_t tickstart = 0; 8003af4: 2300 movs r3, #0 8003af6: 617b str r3, [r7, #20] uint32_t tmpreg0 = 0; 8003af8: 2300 movs r3, #0 8003afa: 613b str r3, [r7, #16] uint32_t plli2sused = 0; 8003afc: 2300 movs r3, #0 8003afe: 61fb str r3, [r7, #28] uint32_t pllsaiused = 0; 8003b00: 2300 movs r3, #0 8003b02: 61bb str r3, [r7, #24] /* Check the parameters */ assert_param(IS_RCC_PERIPHCLOCK(PeriphClkInit->PeriphClockSelection)); /*----------------------------------- I2S configuration ----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == (RCC_PERIPHCLK_I2S)) 8003b04: 687b ldr r3, [r7, #4] 8003b06: 681b ldr r3, [r3, #0] 8003b08: f003 0301 and.w r3, r3, #1 8003b0c: 2b00 cmp r3, #0 8003b0e: d012 beq.n 8003b36 { /* Check the parameters */ assert_param(IS_RCC_I2SCLKSOURCE(PeriphClkInit->I2sClockSelection)); /* Configure I2S Clock source */ __HAL_RCC_I2S_CONFIG(PeriphClkInit->I2sClockSelection); 8003b10: 4b65 ldr r3, [pc, #404] @ (8003ca8 ) 8003b12: 689b ldr r3, [r3, #8] 8003b14: 4a64 ldr r2, [pc, #400] @ (8003ca8 ) 8003b16: f423 0300 bic.w r3, r3, #8388608 @ 0x800000 8003b1a: 6093 str r3, [r2, #8] 8003b1c: 4b62 ldr r3, [pc, #392] @ (8003ca8 ) 8003b1e: 689a ldr r2, [r3, #8] 8003b20: 687b ldr r3, [r7, #4] 8003b22: 6adb ldr r3, [r3, #44] @ 0x2c 8003b24: 4960 ldr r1, [pc, #384] @ (8003ca8 ) 8003b26: 4313 orrs r3, r2 8003b28: 608b str r3, [r1, #8] /* Enable the PLLI2S when it's used as clock source for I2S */ if(PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S) 8003b2a: 687b ldr r3, [r7, #4] 8003b2c: 6adb ldr r3, [r3, #44] @ 0x2c 8003b2e: 2b00 cmp r3, #0 8003b30: d101 bne.n 8003b36 { plli2sused = 1; 8003b32: 2301 movs r3, #1 8003b34: 61fb str r3, [r7, #28] } } /*------------------------------------ SAI1 configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == (RCC_PERIPHCLK_SAI1)) 8003b36: 687b ldr r3, [r7, #4] 8003b38: 681b ldr r3, [r3, #0] 8003b3a: f403 2300 and.w r3, r3, #524288 @ 0x80000 8003b3e: 2b00 cmp r3, #0 8003b40: d017 beq.n 8003b72 { /* Check the parameters */ assert_param(IS_RCC_SAI1CLKSOURCE(PeriphClkInit->Sai1ClockSelection)); /* Configure SAI1 Clock source */ __HAL_RCC_SAI1_CONFIG(PeriphClkInit->Sai1ClockSelection); 8003b42: 4b59 ldr r3, [pc, #356] @ (8003ca8 ) 8003b44: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003b48: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 8003b4c: 687b ldr r3, [r7, #4] 8003b4e: 6b5b ldr r3, [r3, #52] @ 0x34 8003b50: 4955 ldr r1, [pc, #340] @ (8003ca8 ) 8003b52: 4313 orrs r3, r2 8003b54: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S) 8003b58: 687b ldr r3, [r7, #4] 8003b5a: 6b5b ldr r3, [r3, #52] @ 0x34 8003b5c: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8003b60: d101 bne.n 8003b66 { plli2sused = 1; 8003b62: 2301 movs r3, #1 8003b64: 61fb str r3, [r7, #28] } /* Enable the PLLSAI when it's used as clock source for SAI */ if(PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI) 8003b66: 687b ldr r3, [r7, #4] 8003b68: 6b5b ldr r3, [r3, #52] @ 0x34 8003b6a: 2b00 cmp r3, #0 8003b6c: d101 bne.n 8003b72 { pllsaiused = 1; 8003b6e: 2301 movs r3, #1 8003b70: 61bb str r3, [r7, #24] } } /*------------------------------------ SAI2 configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == (RCC_PERIPHCLK_SAI2)) 8003b72: 687b ldr r3, [r7, #4] 8003b74: 681b ldr r3, [r3, #0] 8003b76: f403 1380 and.w r3, r3, #1048576 @ 0x100000 8003b7a: 2b00 cmp r3, #0 8003b7c: d017 beq.n 8003bae { /* Check the parameters */ assert_param(IS_RCC_SAI2CLKSOURCE(PeriphClkInit->Sai2ClockSelection)); /* Configure SAI2 Clock source */ __HAL_RCC_SAI2_CONFIG(PeriphClkInit->Sai2ClockSelection); 8003b7e: 4b4a ldr r3, [pc, #296] @ (8003ca8 ) 8003b80: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003b84: f423 0240 bic.w r2, r3, #12582912 @ 0xc00000 8003b88: 687b ldr r3, [r7, #4] 8003b8a: 6b9b ldr r3, [r3, #56] @ 0x38 8003b8c: 4946 ldr r1, [pc, #280] @ (8003ca8 ) 8003b8e: 4313 orrs r3, r2 8003b90: f8c1 308c str.w r3, [r1, #140] @ 0x8c /* Enable the PLLI2S when it's used as clock source for SAI */ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S) 8003b94: 687b ldr r3, [r7, #4] 8003b96: 6b9b ldr r3, [r3, #56] @ 0x38 8003b98: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8003b9c: d101 bne.n 8003ba2 { plli2sused = 1; 8003b9e: 2301 movs r3, #1 8003ba0: 61fb str r3, [r7, #28] } /* Enable the PLLSAI when it's used as clock source for SAI */ if(PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI) 8003ba2: 687b ldr r3, [r7, #4] 8003ba4: 6b9b ldr r3, [r3, #56] @ 0x38 8003ba6: 2b00 cmp r3, #0 8003ba8: d101 bne.n 8003bae { pllsaiused = 1; 8003baa: 2301 movs r3, #1 8003bac: 61bb str r3, [r7, #24] } } /*------------------------------------ RTC configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_RTC) == (RCC_PERIPHCLK_RTC)) 8003bae: 687b ldr r3, [r7, #4] 8003bb0: 681b ldr r3, [r3, #0] 8003bb2: f003 0320 and.w r3, r3, #32 8003bb6: 2b00 cmp r3, #0 8003bb8: f000 808b beq.w 8003cd2 { /* Check for RTC Parameters used to output RTCCLK */ assert_param(IS_RCC_RTCCLKSOURCE(PeriphClkInit->RTCClockSelection)); /* Enable Power Clock*/ __HAL_RCC_PWR_CLK_ENABLE(); 8003bbc: 4b3a ldr r3, [pc, #232] @ (8003ca8 ) 8003bbe: 6c1b ldr r3, [r3, #64] @ 0x40 8003bc0: 4a39 ldr r2, [pc, #228] @ (8003ca8 ) 8003bc2: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8003bc6: 6413 str r3, [r2, #64] @ 0x40 8003bc8: 4b37 ldr r3, [pc, #220] @ (8003ca8 ) 8003bca: 6c1b ldr r3, [r3, #64] @ 0x40 8003bcc: f003 5380 and.w r3, r3, #268435456 @ 0x10000000 8003bd0: 60fb str r3, [r7, #12] 8003bd2: 68fb ldr r3, [r7, #12] /* Enable write access to Backup domain */ PWR->CR1 |= PWR_CR1_DBP; 8003bd4: 4b35 ldr r3, [pc, #212] @ (8003cac ) 8003bd6: 681b ldr r3, [r3, #0] 8003bd8: 4a34 ldr r2, [pc, #208] @ (8003cac ) 8003bda: f443 7380 orr.w r3, r3, #256 @ 0x100 8003bde: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003be0: f7fe fae4 bl 80021ac 8003be4: 6178 str r0, [r7, #20] /* Wait for Backup domain Write protection disable */ while((PWR->CR1 & PWR_CR1_DBP) == RESET) 8003be6: e008 b.n 8003bfa { if((HAL_GetTick() - tickstart) > RCC_DBP_TIMEOUT_VALUE) 8003be8: f7fe fae0 bl 80021ac 8003bec: 4602 mov r2, r0 8003bee: 697b ldr r3, [r7, #20] 8003bf0: 1ad3 subs r3, r2, r3 8003bf2: 2b64 cmp r3, #100 @ 0x64 8003bf4: d901 bls.n 8003bfa { return HAL_TIMEOUT; 8003bf6: 2303 movs r3, #3 8003bf8: e2bc b.n 8004174 while((PWR->CR1 & PWR_CR1_DBP) == RESET) 8003bfa: 4b2c ldr r3, [pc, #176] @ (8003cac ) 8003bfc: 681b ldr r3, [r3, #0] 8003bfe: f403 7380 and.w r3, r3, #256 @ 0x100 8003c02: 2b00 cmp r3, #0 8003c04: d0f0 beq.n 8003be8 } } /* Reset the Backup domain only if the RTC Clock source selection is modified */ tmpreg0 = (RCC->BDCR & RCC_BDCR_RTCSEL); 8003c06: 4b28 ldr r3, [pc, #160] @ (8003ca8 ) 8003c08: 6f1b ldr r3, [r3, #112] @ 0x70 8003c0a: f403 7340 and.w r3, r3, #768 @ 0x300 8003c0e: 613b str r3, [r7, #16] if((tmpreg0 != 0x00000000U) && (tmpreg0 != (PeriphClkInit->RTCClockSelection & RCC_BDCR_RTCSEL))) 8003c10: 693b ldr r3, [r7, #16] 8003c12: 2b00 cmp r3, #0 8003c14: d035 beq.n 8003c82 8003c16: 687b ldr r3, [r7, #4] 8003c18: 6a9b ldr r3, [r3, #40] @ 0x28 8003c1a: f403 7340 and.w r3, r3, #768 @ 0x300 8003c1e: 693a ldr r2, [r7, #16] 8003c20: 429a cmp r2, r3 8003c22: d02e beq.n 8003c82 { /* Store the content of BDCR register before the reset of Backup Domain */ tmpreg0 = (RCC->BDCR & ~(RCC_BDCR_RTCSEL)); 8003c24: 4b20 ldr r3, [pc, #128] @ (8003ca8 ) 8003c26: 6f1b ldr r3, [r3, #112] @ 0x70 8003c28: f423 7340 bic.w r3, r3, #768 @ 0x300 8003c2c: 613b str r3, [r7, #16] /* RTC Clock selection can be changed only if the Backup Domain is reset */ __HAL_RCC_BACKUPRESET_FORCE(); 8003c2e: 4b1e ldr r3, [pc, #120] @ (8003ca8 ) 8003c30: 6f1b ldr r3, [r3, #112] @ 0x70 8003c32: 4a1d ldr r2, [pc, #116] @ (8003ca8 ) 8003c34: f443 3380 orr.w r3, r3, #65536 @ 0x10000 8003c38: 6713 str r3, [r2, #112] @ 0x70 __HAL_RCC_BACKUPRESET_RELEASE(); 8003c3a: 4b1b ldr r3, [pc, #108] @ (8003ca8 ) 8003c3c: 6f1b ldr r3, [r3, #112] @ 0x70 8003c3e: 4a1a ldr r2, [pc, #104] @ (8003ca8 ) 8003c40: f423 3380 bic.w r3, r3, #65536 @ 0x10000 8003c44: 6713 str r3, [r2, #112] @ 0x70 /* Restore the Content of BDCR register */ RCC->BDCR = tmpreg0; 8003c46: 4a18 ldr r2, [pc, #96] @ (8003ca8 ) 8003c48: 693b ldr r3, [r7, #16] 8003c4a: 6713 str r3, [r2, #112] @ 0x70 /* Wait for LSE reactivation if LSE was enable prior to Backup Domain reset */ if (HAL_IS_BIT_SET(RCC->BDCR, RCC_BDCR_LSEON)) 8003c4c: 4b16 ldr r3, [pc, #88] @ (8003ca8 ) 8003c4e: 6f1b ldr r3, [r3, #112] @ 0x70 8003c50: f003 0301 and.w r3, r3, #1 8003c54: 2b01 cmp r3, #1 8003c56: d114 bne.n 8003c82 { /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003c58: f7fe faa8 bl 80021ac 8003c5c: 6178 str r0, [r7, #20] /* Wait till LSE is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8003c5e: e00a b.n 8003c76 { if((HAL_GetTick() - tickstart ) > RCC_LSE_TIMEOUT_VALUE) 8003c60: f7fe faa4 bl 80021ac 8003c64: 4602 mov r2, r0 8003c66: 697b ldr r3, [r7, #20] 8003c68: 1ad3 subs r3, r2, r3 8003c6a: f241 3288 movw r2, #5000 @ 0x1388 8003c6e: 4293 cmp r3, r2 8003c70: d901 bls.n 8003c76 { return HAL_TIMEOUT; 8003c72: 2303 movs r3, #3 8003c74: e27e b.n 8004174 while(__HAL_RCC_GET_FLAG(RCC_FLAG_LSERDY) == RESET) 8003c76: 4b0c ldr r3, [pc, #48] @ (8003ca8 ) 8003c78: 6f1b ldr r3, [r3, #112] @ 0x70 8003c7a: f003 0302 and.w r3, r3, #2 8003c7e: 2b00 cmp r3, #0 8003c80: d0ee beq.n 8003c60 } } } } __HAL_RCC_RTC_CONFIG(PeriphClkInit->RTCClockSelection); 8003c82: 687b ldr r3, [r7, #4] 8003c84: 6a9b ldr r3, [r3, #40] @ 0x28 8003c86: f403 7340 and.w r3, r3, #768 @ 0x300 8003c8a: f5b3 7f40 cmp.w r3, #768 @ 0x300 8003c8e: d111 bne.n 8003cb4 8003c90: 4b05 ldr r3, [pc, #20] @ (8003ca8 ) 8003c92: 689b ldr r3, [r3, #8] 8003c94: f423 12f8 bic.w r2, r3, #2031616 @ 0x1f0000 8003c98: 687b ldr r3, [r7, #4] 8003c9a: 6a99 ldr r1, [r3, #40] @ 0x28 8003c9c: 4b04 ldr r3, [pc, #16] @ (8003cb0 ) 8003c9e: 400b ands r3, r1 8003ca0: 4901 ldr r1, [pc, #4] @ (8003ca8 ) 8003ca2: 4313 orrs r3, r2 8003ca4: 608b str r3, [r1, #8] 8003ca6: e00b b.n 8003cc0 8003ca8: 40023800 .word 0x40023800 8003cac: 40007000 .word 0x40007000 8003cb0: 0ffffcff .word 0x0ffffcff 8003cb4: 4ba4 ldr r3, [pc, #656] @ (8003f48 ) 8003cb6: 689b ldr r3, [r3, #8] 8003cb8: 4aa3 ldr r2, [pc, #652] @ (8003f48 ) 8003cba: f423 13f8 bic.w r3, r3, #2031616 @ 0x1f0000 8003cbe: 6093 str r3, [r2, #8] 8003cc0: 4ba1 ldr r3, [pc, #644] @ (8003f48 ) 8003cc2: 6f1a ldr r2, [r3, #112] @ 0x70 8003cc4: 687b ldr r3, [r7, #4] 8003cc6: 6a9b ldr r3, [r3, #40] @ 0x28 8003cc8: f3c3 030b ubfx r3, r3, #0, #12 8003ccc: 499e ldr r1, [pc, #632] @ (8003f48 ) 8003cce: 4313 orrs r3, r2 8003cd0: 670b str r3, [r1, #112] @ 0x70 } /*------------------------------------ TIM configuration --------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_TIM) == (RCC_PERIPHCLK_TIM)) 8003cd2: 687b ldr r3, [r7, #4] 8003cd4: 681b ldr r3, [r3, #0] 8003cd6: f003 0310 and.w r3, r3, #16 8003cda: 2b00 cmp r3, #0 8003cdc: d010 beq.n 8003d00 { /* Check the parameters */ assert_param(IS_RCC_TIMPRES(PeriphClkInit->TIMPresSelection)); /* Configure Timer Prescaler */ __HAL_RCC_TIMCLKPRESCALER(PeriphClkInit->TIMPresSelection); 8003cde: 4b9a ldr r3, [pc, #616] @ (8003f48 ) 8003ce0: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003ce4: 4a98 ldr r2, [pc, #608] @ (8003f48 ) 8003ce6: f023 7380 bic.w r3, r3, #16777216 @ 0x1000000 8003cea: f8c2 308c str.w r3, [r2, #140] @ 0x8c 8003cee: 4b96 ldr r3, [pc, #600] @ (8003f48 ) 8003cf0: f8d3 208c ldr.w r2, [r3, #140] @ 0x8c 8003cf4: 687b ldr r3, [r7, #4] 8003cf6: 6b1b ldr r3, [r3, #48] @ 0x30 8003cf8: 4993 ldr r1, [pc, #588] @ (8003f48 ) 8003cfa: 4313 orrs r3, r2 8003cfc: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*-------------------------------------- I2C1 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C1) == RCC_PERIPHCLK_I2C1) 8003d00: 687b ldr r3, [r7, #4] 8003d02: 681b ldr r3, [r3, #0] 8003d04: f403 4380 and.w r3, r3, #16384 @ 0x4000 8003d08: 2b00 cmp r3, #0 8003d0a: d00a beq.n 8003d22 { /* Check the parameters */ assert_param(IS_RCC_I2C1CLKSOURCE(PeriphClkInit->I2c1ClockSelection)); /* Configure the I2C1 clock source */ __HAL_RCC_I2C1_CONFIG(PeriphClkInit->I2c1ClockSelection); 8003d0c: 4b8e ldr r3, [pc, #568] @ (8003f48 ) 8003d0e: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003d12: f423 3240 bic.w r2, r3, #196608 @ 0x30000 8003d16: 687b ldr r3, [r7, #4] 8003d18: 6ddb ldr r3, [r3, #92] @ 0x5c 8003d1a: 498b ldr r1, [pc, #556] @ (8003f48 ) 8003d1c: 4313 orrs r3, r2 8003d1e: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- I2C2 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C2) == RCC_PERIPHCLK_I2C2) 8003d22: 687b ldr r3, [r7, #4] 8003d24: 681b ldr r3, [r3, #0] 8003d26: f403 4300 and.w r3, r3, #32768 @ 0x8000 8003d2a: 2b00 cmp r3, #0 8003d2c: d00a beq.n 8003d44 { /* Check the parameters */ assert_param(IS_RCC_I2C2CLKSOURCE(PeriphClkInit->I2c2ClockSelection)); /* Configure the I2C2 clock source */ __HAL_RCC_I2C2_CONFIG(PeriphClkInit->I2c2ClockSelection); 8003d2e: 4b86 ldr r3, [pc, #536] @ (8003f48 ) 8003d30: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003d34: f423 2240 bic.w r2, r3, #786432 @ 0xc0000 8003d38: 687b ldr r3, [r7, #4] 8003d3a: 6e1b ldr r3, [r3, #96] @ 0x60 8003d3c: 4982 ldr r1, [pc, #520] @ (8003f48 ) 8003d3e: 4313 orrs r3, r2 8003d40: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- I2C3 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2C3) == RCC_PERIPHCLK_I2C3) 8003d44: 687b ldr r3, [r7, #4] 8003d46: 681b ldr r3, [r3, #0] 8003d48: f403 3380 and.w r3, r3, #65536 @ 0x10000 8003d4c: 2b00 cmp r3, #0 8003d4e: d00a beq.n 8003d66 { /* Check the parameters */ assert_param(IS_RCC_I2C3CLKSOURCE(PeriphClkInit->I2c3ClockSelection)); /* Configure the I2C3 clock source */ __HAL_RCC_I2C3_CONFIG(PeriphClkInit->I2c3ClockSelection); 8003d50: 4b7d ldr r3, [pc, #500] @ (8003f48 ) 8003d52: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003d56: f423 1240 bic.w r2, r3, #3145728 @ 0x300000 8003d5a: 687b ldr r3, [r7, #4] 8003d5c: 6e5b ldr r3, [r3, #100] @ 0x64 8003d5e: 497a ldr r1, [pc, #488] @ (8003f48 ) 8003d60: 4313 orrs r3, r2 8003d62: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- USART1 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART1) == RCC_PERIPHCLK_USART1) 8003d66: 687b ldr r3, [r7, #4] 8003d68: 681b ldr r3, [r3, #0] 8003d6a: f003 0340 and.w r3, r3, #64 @ 0x40 8003d6e: 2b00 cmp r3, #0 8003d70: d00a beq.n 8003d88 { /* Check the parameters */ assert_param(IS_RCC_USART1CLKSOURCE(PeriphClkInit->Usart1ClockSelection)); /* Configure the USART1 clock source */ __HAL_RCC_USART1_CONFIG(PeriphClkInit->Usart1ClockSelection); 8003d72: 4b75 ldr r3, [pc, #468] @ (8003f48 ) 8003d74: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003d78: f023 0203 bic.w r2, r3, #3 8003d7c: 687b ldr r3, [r7, #4] 8003d7e: 6bdb ldr r3, [r3, #60] @ 0x3c 8003d80: 4971 ldr r1, [pc, #452] @ (8003f48 ) 8003d82: 4313 orrs r3, r2 8003d84: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- USART2 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART2) == RCC_PERIPHCLK_USART2) 8003d88: 687b ldr r3, [r7, #4] 8003d8a: 681b ldr r3, [r3, #0] 8003d8c: f003 0380 and.w r3, r3, #128 @ 0x80 8003d90: 2b00 cmp r3, #0 8003d92: d00a beq.n 8003daa { /* Check the parameters */ assert_param(IS_RCC_USART2CLKSOURCE(PeriphClkInit->Usart2ClockSelection)); /* Configure the USART2 clock source */ __HAL_RCC_USART2_CONFIG(PeriphClkInit->Usart2ClockSelection); 8003d94: 4b6c ldr r3, [pc, #432] @ (8003f48 ) 8003d96: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003d9a: f023 020c bic.w r2, r3, #12 8003d9e: 687b ldr r3, [r7, #4] 8003da0: 6c1b ldr r3, [r3, #64] @ 0x40 8003da2: 4969 ldr r1, [pc, #420] @ (8003f48 ) 8003da4: 4313 orrs r3, r2 8003da6: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- USART3 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART3) == RCC_PERIPHCLK_USART3) 8003daa: 687b ldr r3, [r7, #4] 8003dac: 681b ldr r3, [r3, #0] 8003dae: f403 7380 and.w r3, r3, #256 @ 0x100 8003db2: 2b00 cmp r3, #0 8003db4: d00a beq.n 8003dcc { /* Check the parameters */ assert_param(IS_RCC_USART3CLKSOURCE(PeriphClkInit->Usart3ClockSelection)); /* Configure the USART3 clock source */ __HAL_RCC_USART3_CONFIG(PeriphClkInit->Usart3ClockSelection); 8003db6: 4b64 ldr r3, [pc, #400] @ (8003f48 ) 8003db8: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003dbc: f023 0230 bic.w r2, r3, #48 @ 0x30 8003dc0: 687b ldr r3, [r7, #4] 8003dc2: 6c5b ldr r3, [r3, #68] @ 0x44 8003dc4: 4960 ldr r1, [pc, #384] @ (8003f48 ) 8003dc6: 4313 orrs r3, r2 8003dc8: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- UART4 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART4) == RCC_PERIPHCLK_UART4) 8003dcc: 687b ldr r3, [r7, #4] 8003dce: 681b ldr r3, [r3, #0] 8003dd0: f403 7300 and.w r3, r3, #512 @ 0x200 8003dd4: 2b00 cmp r3, #0 8003dd6: d00a beq.n 8003dee { /* Check the parameters */ assert_param(IS_RCC_UART4CLKSOURCE(PeriphClkInit->Uart4ClockSelection)); /* Configure the UART4 clock source */ __HAL_RCC_UART4_CONFIG(PeriphClkInit->Uart4ClockSelection); 8003dd8: 4b5b ldr r3, [pc, #364] @ (8003f48 ) 8003dda: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003dde: f023 02c0 bic.w r2, r3, #192 @ 0xc0 8003de2: 687b ldr r3, [r7, #4] 8003de4: 6c9b ldr r3, [r3, #72] @ 0x48 8003de6: 4958 ldr r1, [pc, #352] @ (8003f48 ) 8003de8: 4313 orrs r3, r2 8003dea: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- UART5 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART5) == RCC_PERIPHCLK_UART5) 8003dee: 687b ldr r3, [r7, #4] 8003df0: 681b ldr r3, [r3, #0] 8003df2: f403 6380 and.w r3, r3, #1024 @ 0x400 8003df6: 2b00 cmp r3, #0 8003df8: d00a beq.n 8003e10 { /* Check the parameters */ assert_param(IS_RCC_UART5CLKSOURCE(PeriphClkInit->Uart5ClockSelection)); /* Configure the UART5 clock source */ __HAL_RCC_UART5_CONFIG(PeriphClkInit->Uart5ClockSelection); 8003dfa: 4b53 ldr r3, [pc, #332] @ (8003f48 ) 8003dfc: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003e00: f423 7240 bic.w r2, r3, #768 @ 0x300 8003e04: 687b ldr r3, [r7, #4] 8003e06: 6cdb ldr r3, [r3, #76] @ 0x4c 8003e08: 494f ldr r1, [pc, #316] @ (8003f48 ) 8003e0a: 4313 orrs r3, r2 8003e0c: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- USART6 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_USART6) == RCC_PERIPHCLK_USART6) 8003e10: 687b ldr r3, [r7, #4] 8003e12: 681b ldr r3, [r3, #0] 8003e14: f403 6300 and.w r3, r3, #2048 @ 0x800 8003e18: 2b00 cmp r3, #0 8003e1a: d00a beq.n 8003e32 { /* Check the parameters */ assert_param(IS_RCC_USART6CLKSOURCE(PeriphClkInit->Usart6ClockSelection)); /* Configure the USART6 clock source */ __HAL_RCC_USART6_CONFIG(PeriphClkInit->Usart6ClockSelection); 8003e1c: 4b4a ldr r3, [pc, #296] @ (8003f48 ) 8003e1e: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003e22: f423 6240 bic.w r2, r3, #3072 @ 0xc00 8003e26: 687b ldr r3, [r7, #4] 8003e28: 6d1b ldr r3, [r3, #80] @ 0x50 8003e2a: 4947 ldr r1, [pc, #284] @ (8003f48 ) 8003e2c: 4313 orrs r3, r2 8003e2e: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- UART7 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART7) == RCC_PERIPHCLK_UART7) 8003e32: 687b ldr r3, [r7, #4] 8003e34: 681b ldr r3, [r3, #0] 8003e36: f403 5380 and.w r3, r3, #4096 @ 0x1000 8003e3a: 2b00 cmp r3, #0 8003e3c: d00a beq.n 8003e54 { /* Check the parameters */ assert_param(IS_RCC_UART7CLKSOURCE(PeriphClkInit->Uart7ClockSelection)); /* Configure the UART7 clock source */ __HAL_RCC_UART7_CONFIG(PeriphClkInit->Uart7ClockSelection); 8003e3e: 4b42 ldr r3, [pc, #264] @ (8003f48 ) 8003e40: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003e44: f423 5240 bic.w r2, r3, #12288 @ 0x3000 8003e48: 687b ldr r3, [r7, #4] 8003e4a: 6d5b ldr r3, [r3, #84] @ 0x54 8003e4c: 493e ldr r1, [pc, #248] @ (8003f48 ) 8003e4e: 4313 orrs r3, r2 8003e50: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- UART8 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_UART8) == RCC_PERIPHCLK_UART8) 8003e54: 687b ldr r3, [r7, #4] 8003e56: 681b ldr r3, [r3, #0] 8003e58: f403 5300 and.w r3, r3, #8192 @ 0x2000 8003e5c: 2b00 cmp r3, #0 8003e5e: d00a beq.n 8003e76 { /* Check the parameters */ assert_param(IS_RCC_UART8CLKSOURCE(PeriphClkInit->Uart8ClockSelection)); /* Configure the UART8 clock source */ __HAL_RCC_UART8_CONFIG(PeriphClkInit->Uart8ClockSelection); 8003e60: 4b39 ldr r3, [pc, #228] @ (8003f48 ) 8003e62: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003e66: f423 4240 bic.w r2, r3, #49152 @ 0xc000 8003e6a: 687b ldr r3, [r7, #4] 8003e6c: 6d9b ldr r3, [r3, #88] @ 0x58 8003e6e: 4936 ldr r1, [pc, #216] @ (8003f48 ) 8003e70: 4313 orrs r3, r2 8003e72: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- CK48 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) 8003e76: 687b ldr r3, [r7, #4] 8003e78: 681b ldr r3, [r3, #0] 8003e7a: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8003e7e: 2b00 cmp r3, #0 8003e80: d011 beq.n 8003ea6 { /* Check the parameters */ assert_param(IS_RCC_CLK48SOURCE(PeriphClkInit->Clk48ClockSelection)); /* Configure the CLK48 source */ __HAL_RCC_CLK48_CONFIG(PeriphClkInit->Clk48ClockSelection); 8003e82: 4b31 ldr r3, [pc, #196] @ (8003f48 ) 8003e84: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003e88: f023 6200 bic.w r2, r3, #134217728 @ 0x8000000 8003e8c: 687b ldr r3, [r7, #4] 8003e8e: 6f5b ldr r3, [r3, #116] @ 0x74 8003e90: 492d ldr r1, [pc, #180] @ (8003f48 ) 8003e92: 4313 orrs r3, r2 8003e94: f8c1 3090 str.w r3, [r1, #144] @ 0x90 /* Enable the PLLSAI when it's used as clock source for CK48 */ if(PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP) 8003e98: 687b ldr r3, [r7, #4] 8003e9a: 6f5b ldr r3, [r3, #116] @ 0x74 8003e9c: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8003ea0: d101 bne.n 8003ea6 { pllsaiused = 1; 8003ea2: 2301 movs r3, #1 8003ea4: 61bb str r3, [r7, #24] } } /*-------------------------------------- LPTIM1 Configuration -----------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_LPTIM1) == RCC_PERIPHCLK_LPTIM1) 8003ea6: 687b ldr r3, [r7, #4] 8003ea8: 681b ldr r3, [r3, #0] 8003eaa: f403 2380 and.w r3, r3, #262144 @ 0x40000 8003eae: 2b00 cmp r3, #0 8003eb0: d00a beq.n 8003ec8 { /* Check the parameters */ assert_param(IS_RCC_LPTIM1CLK(PeriphClkInit->Lptim1ClockSelection)); /* Configure the LTPIM1 clock source */ __HAL_RCC_LPTIM1_CONFIG(PeriphClkInit->Lptim1ClockSelection); 8003eb2: 4b25 ldr r3, [pc, #148] @ (8003f48 ) 8003eb4: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003eb8: f023 7240 bic.w r2, r3, #50331648 @ 0x3000000 8003ebc: 687b ldr r3, [r7, #4] 8003ebe: 6edb ldr r3, [r3, #108] @ 0x6c 8003ec0: 4921 ldr r1, [pc, #132] @ (8003f48 ) 8003ec2: 4313 orrs r3, r2 8003ec4: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*------------------------------------- SDMMC1 Configuration ------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC1) == RCC_PERIPHCLK_SDMMC1) 8003ec8: 687b ldr r3, [r7, #4] 8003eca: 681b ldr r3, [r3, #0] 8003ecc: f403 0300 and.w r3, r3, #8388608 @ 0x800000 8003ed0: 2b00 cmp r3, #0 8003ed2: d00a beq.n 8003eea { /* Check the parameters */ assert_param(IS_RCC_SDMMC1CLKSOURCE(PeriphClkInit->Sdmmc1ClockSelection)); /* Configure the SDMMC1 clock source */ __HAL_RCC_SDMMC1_CONFIG(PeriphClkInit->Sdmmc1ClockSelection); 8003ed4: 4b1c ldr r3, [pc, #112] @ (8003f48 ) 8003ed6: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003eda: f023 5280 bic.w r2, r3, #268435456 @ 0x10000000 8003ede: 687b ldr r3, [r7, #4] 8003ee0: 6f9b ldr r3, [r3, #120] @ 0x78 8003ee2: 4919 ldr r1, [pc, #100] @ (8003f48 ) 8003ee4: 4313 orrs r3, r2 8003ee6: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*------------------------------------- SDMMC2 Configuration ------------------------------------*/ if(((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SDMMC2) == RCC_PERIPHCLK_SDMMC2) 8003eea: 687b ldr r3, [r7, #4] 8003eec: 681b ldr r3, [r3, #0] 8003eee: f003 6380 and.w r3, r3, #67108864 @ 0x4000000 8003ef2: 2b00 cmp r3, #0 8003ef4: d00a beq.n 8003f0c { /* Check the parameters */ assert_param(IS_RCC_SDMMC2CLKSOURCE(PeriphClkInit->Sdmmc2ClockSelection)); /* Configure the SDMMC2 clock source */ __HAL_RCC_SDMMC2_CONFIG(PeriphClkInit->Sdmmc2ClockSelection); 8003ef6: 4b14 ldr r3, [pc, #80] @ (8003f48 ) 8003ef8: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8003efc: f023 5200 bic.w r2, r3, #536870912 @ 0x20000000 8003f00: 687b ldr r3, [r7, #4] 8003f02: 6fdb ldr r3, [r3, #124] @ 0x7c 8003f04: 4910 ldr r1, [pc, #64] @ (8003f48 ) 8003f06: 4313 orrs r3, r2 8003f08: f8c1 3090 str.w r3, [r1, #144] @ 0x90 } /*-------------------------------------- PLLI2S Configuration ---------------------------------*/ /* PLLI2S is configured when a peripheral will use it as source clock : SAI1, SAI2 or I2S */ if((plli2sused == 1) || ((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S)) 8003f0c: 69fb ldr r3, [r7, #28] 8003f0e: 2b01 cmp r3, #1 8003f10: d006 beq.n 8003f20 8003f12: 687b ldr r3, [r7, #4] 8003f14: 681b ldr r3, [r3, #0] 8003f16: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8003f1a: 2b00 cmp r3, #0 8003f1c: f000 809d beq.w 800405a { /* Disable the PLLI2S */ __HAL_RCC_PLLI2S_DISABLE(); 8003f20: 4b09 ldr r3, [pc, #36] @ (8003f48 ) 8003f22: 681b ldr r3, [r3, #0] 8003f24: 4a08 ldr r2, [pc, #32] @ (8003f48 ) 8003f26: f023 6380 bic.w r3, r3, #67108864 @ 0x4000000 8003f2a: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8003f2c: f7fe f93e bl 80021ac 8003f30: 6178 str r0, [r7, #20] /* Wait till PLLI2S is disabled */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003f32: e00b b.n 8003f4c { if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 8003f34: f7fe f93a bl 80021ac 8003f38: 4602 mov r2, r0 8003f3a: 697b ldr r3, [r7, #20] 8003f3c: 1ad3 subs r3, r2, r3 8003f3e: 2b64 cmp r3, #100 @ 0x64 8003f40: d904 bls.n 8003f4c { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8003f42: 2303 movs r3, #3 8003f44: e116 b.n 8004174 8003f46: bf00 nop 8003f48: 40023800 .word 0x40023800 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) != RESET) 8003f4c: 4b8b ldr r3, [pc, #556] @ (800417c ) 8003f4e: 681b ldr r3, [r3, #0] 8003f50: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8003f54: 2b00 cmp r3, #0 8003f56: d1ed bne.n 8003f34 /* check for common PLLI2S Parameters */ assert_param(IS_RCC_PLLI2SN_VALUE(PeriphClkInit->PLLI2S.PLLI2SN)); /*----------------- In Case of PLLI2S is selected as source clock for I2S -------------------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_I2S) == RCC_PERIPHCLK_I2S) && (PeriphClkInit->I2sClockSelection == RCC_I2SCLKSOURCE_PLLI2S))) 8003f58: 687b ldr r3, [r7, #4] 8003f5a: 681b ldr r3, [r3, #0] 8003f5c: f003 0301 and.w r3, r3, #1 8003f60: 2b00 cmp r3, #0 8003f62: d017 beq.n 8003f94 8003f64: 687b ldr r3, [r7, #4] 8003f66: 6adb ldr r3, [r3, #44] @ 0x2c 8003f68: 2b00 cmp r3, #0 8003f6a: d113 bne.n 8003f94 { /* check for Parameters */ assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); /* Read PLLI2SQ value from PLLI2SCFGR register (this value is not needed for I2S configuration) */ tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SQ) >> RCC_PLLI2SCFGR_PLLI2SQ_Pos); 8003f6c: 4b83 ldr r3, [pc, #524] @ (800417c ) 8003f6e: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003f72: 0e1b lsrs r3, r3, #24 8003f74: f003 030f and.w r3, r3, #15 8003f78: 613b str r3, [r7, #16] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLM) */ /* I2SCLK = f(PLLI2S clock output) = f(VCO clock) / PLLI2SR */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , tmpreg0, PeriphClkInit->PLLI2S.PLLI2SR); 8003f7a: 687b ldr r3, [r7, #4] 8003f7c: 685b ldr r3, [r3, #4] 8003f7e: 019a lsls r2, r3, #6 8003f80: 693b ldr r3, [r7, #16] 8003f82: 061b lsls r3, r3, #24 8003f84: 431a orrs r2, r3 8003f86: 687b ldr r3, [r7, #4] 8003f88: 689b ldr r3, [r3, #8] 8003f8a: 071b lsls r3, r3, #28 8003f8c: 497b ldr r1, [pc, #492] @ (800417c ) 8003f8e: 4313 orrs r3, r2 8003f90: f8c1 3084 str.w r3, [r1, #132] @ 0x84 } /*----------------- In Case of PLLI2S is selected as source clock for SAI -------------------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8003f94: 687b ldr r3, [r7, #4] 8003f96: 681b ldr r3, [r3, #0] 8003f98: f403 2300 and.w r3, r3, #524288 @ 0x80000 8003f9c: 2b00 cmp r3, #0 8003f9e: d004 beq.n 8003faa 8003fa0: 687b ldr r3, [r7, #4] 8003fa2: 6b5b ldr r3, [r3, #52] @ 0x34 8003fa4: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8003fa8: d00a beq.n 8003fc0 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 8003faa: 687b ldr r3, [r7, #4] 8003fac: 681b ldr r3, [r3, #0] 8003fae: f403 1380 and.w r3, r3, #1048576 @ 0x100000 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLI2S)) || 8003fb2: 2b00 cmp r3, #0 8003fb4: d024 beq.n 8004000 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLI2S))) 8003fb6: 687b ldr r3, [r7, #4] 8003fb8: 6b9b ldr r3, [r3, #56] @ 0x38 8003fba: f5b3 0f80 cmp.w r3, #4194304 @ 0x400000 8003fbe: d11f bne.n 8004000 assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Check for PLLI2S/DIVQ parameters */ assert_param(IS_RCC_PLLI2S_DIVQ_VALUE(PeriphClkInit->PLLI2SDivQ)); /* Read PLLI2SP and PLLI2SR values from PLLI2SCFGR register (this value is not needed for SAI configuration) */ tmpreg0 = ((RCC->PLLI2SCFGR & RCC_PLLI2SCFGR_PLLI2SR) >> RCC_PLLI2SCFGR_PLLI2SR_Pos); 8003fc0: 4b6e ldr r3, [pc, #440] @ (800417c ) 8003fc2: f8d3 3084 ldr.w r3, [r3, #132] @ 0x84 8003fc6: 0f1b lsrs r3, r3, #28 8003fc8: f003 0307 and.w r3, r3, #7 8003fcc: 613b str r3, [r7, #16] /* Configure the PLLI2S division factors */ /* PLLI2S_VCO Input = PLL_SOURCE/PLLM */ /* PLLI2S_VCO Output = PLLI2S_VCO Input * PLLI2SN */ /* SAI_CLK(first level) = PLLI2S_VCO Output/PLLI2SQ */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN, PeriphClkInit->PLLI2S.PLLI2SQ, tmpreg0); 8003fce: 687b ldr r3, [r7, #4] 8003fd0: 685b ldr r3, [r3, #4] 8003fd2: 019a lsls r2, r3, #6 8003fd4: 687b ldr r3, [r7, #4] 8003fd6: 68db ldr r3, [r3, #12] 8003fd8: 061b lsls r3, r3, #24 8003fda: 431a orrs r2, r3 8003fdc: 693b ldr r3, [r7, #16] 8003fde: 071b lsls r3, r3, #28 8003fe0: 4966 ldr r1, [pc, #408] @ (800417c ) 8003fe2: 4313 orrs r3, r2 8003fe4: f8c1 3084 str.w r3, [r1, #132] @ 0x84 /* SAI_CLK_x = SAI_CLK(first level)/PLLI2SDIVQ */ __HAL_RCC_PLLI2S_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLI2SDivQ); 8003fe8: 4b64 ldr r3, [pc, #400] @ (800417c ) 8003fea: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 8003fee: f023 021f bic.w r2, r3, #31 8003ff2: 687b ldr r3, [r7, #4] 8003ff4: 69db ldr r3, [r3, #28] 8003ff6: 3b01 subs r3, #1 8003ff8: 4960 ldr r1, [pc, #384] @ (800417c ) 8003ffa: 4313 orrs r3, r2 8003ffc: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*----------------- In Case of PLLI2S is just selected -----------------*/ if((PeriphClkInit->PeriphClockSelection & RCC_PERIPHCLK_PLLI2S) == RCC_PERIPHCLK_PLLI2S) 8004000: 687b ldr r3, [r7, #4] 8004002: 681b ldr r3, [r3, #0] 8004004: f003 7300 and.w r3, r3, #33554432 @ 0x2000000 8004008: 2b00 cmp r3, #0 800400a: d00d beq.n 8004028 assert_param(IS_RCC_PLLI2SR_VALUE(PeriphClkInit->PLLI2S.PLLI2SR)); assert_param(IS_RCC_PLLI2SQ_VALUE(PeriphClkInit->PLLI2S.PLLI2SQ)); /* Configure the PLLI2S division factors */ /* PLLI2S_VCO = f(VCO clock) = f(PLLI2S clock input) x (PLLI2SN/PLLI2SM) */ __HAL_RCC_PLLI2S_CONFIG(PeriphClkInit->PLLI2S.PLLI2SN , PeriphClkInit->PLLI2S.PLLI2SQ, PeriphClkInit->PLLI2S.PLLI2SR); 800400c: 687b ldr r3, [r7, #4] 800400e: 685b ldr r3, [r3, #4] 8004010: 019a lsls r2, r3, #6 8004012: 687b ldr r3, [r7, #4] 8004014: 68db ldr r3, [r3, #12] 8004016: 061b lsls r3, r3, #24 8004018: 431a orrs r2, r3 800401a: 687b ldr r3, [r7, #4] 800401c: 689b ldr r3, [r3, #8] 800401e: 071b lsls r3, r3, #28 8004020: 4956 ldr r1, [pc, #344] @ (800417c ) 8004022: 4313 orrs r3, r2 8004024: f8c1 3084 str.w r3, [r1, #132] @ 0x84 } /* Enable the PLLI2S */ __HAL_RCC_PLLI2S_ENABLE(); 8004028: 4b54 ldr r3, [pc, #336] @ (800417c ) 800402a: 681b ldr r3, [r3, #0] 800402c: 4a53 ldr r2, [pc, #332] @ (800417c ) 800402e: f043 6380 orr.w r3, r3, #67108864 @ 0x4000000 8004032: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 8004034: f7fe f8ba bl 80021ac 8004038: 6178 str r0, [r7, #20] /* Wait till PLLI2S is ready */ while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 800403a: e008 b.n 800404e { if((HAL_GetTick() - tickstart) > PLLI2S_TIMEOUT_VALUE) 800403c: f7fe f8b6 bl 80021ac 8004040: 4602 mov r2, r0 8004042: 697b ldr r3, [r7, #20] 8004044: 1ad3 subs r3, r2, r3 8004046: 2b64 cmp r3, #100 @ 0x64 8004048: d901 bls.n 800404e { /* return in case of Timeout detected */ return HAL_TIMEOUT; 800404a: 2303 movs r3, #3 800404c: e092 b.n 8004174 while(__HAL_RCC_GET_FLAG(RCC_FLAG_PLLI2SRDY) == RESET) 800404e: 4b4b ldr r3, [pc, #300] @ (800417c ) 8004050: 681b ldr r3, [r3, #0] 8004052: f003 6300 and.w r3, r3, #134217728 @ 0x8000000 8004056: 2b00 cmp r3, #0 8004058: d0f0 beq.n 800403c } } /*-------------------------------------- PLLSAI Configuration ---------------------------------*/ /* PLLSAI is configured when a peripheral will use it as source clock : SAI1, SAI2, LTDC or CK48 */ if(pllsaiused == 1) 800405a: 69bb ldr r3, [r7, #24] 800405c: 2b01 cmp r3, #1 800405e: f040 8088 bne.w 8004172 { /* Disable PLLSAI Clock */ __HAL_RCC_PLLSAI_DISABLE(); 8004062: 4b46 ldr r3, [pc, #280] @ (800417c ) 8004064: 681b ldr r3, [r3, #0] 8004066: 4a45 ldr r2, [pc, #276] @ (800417c ) 8004068: f023 5380 bic.w r3, r3, #268435456 @ 0x10000000 800406c: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800406e: f7fe f89d bl 80021ac 8004072: 6178 str r0, [r7, #20] /* Wait till PLLSAI is disabled */ while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 8004074: e008 b.n 8004088 { if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 8004076: f7fe f899 bl 80021ac 800407a: 4602 mov r2, r0 800407c: 697b ldr r3, [r7, #20] 800407e: 1ad3 subs r3, r2, r3 8004080: 2b64 cmp r3, #100 @ 0x64 8004082: d901 bls.n 8004088 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8004084: 2303 movs r3, #3 8004086: e075 b.n 8004174 while(__HAL_RCC_PLLSAI_GET_FLAG() != RESET) 8004088: 4b3c ldr r3, [pc, #240] @ (800417c ) 800408a: 681b ldr r3, [r3, #0] 800408c: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 8004090: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8004094: d0ef beq.n 8004076 /* Check the PLLSAI division factors */ assert_param(IS_RCC_PLLSAIN_VALUE(PeriphClkInit->PLLSAI.PLLSAIN)); /*----------------- In Case of PLLSAI is selected as source clock for SAI -------------------*/ if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ 8004096: 687b ldr r3, [r7, #4] 8004098: 681b ldr r3, [r3, #0] 800409a: f403 2300 and.w r3, r3, #524288 @ 0x80000 800409e: 2b00 cmp r3, #0 80040a0: d003 beq.n 80040aa 80040a2: 687b ldr r3, [r7, #4] 80040a4: 6b5b ldr r3, [r3, #52] @ 0x34 80040a6: 2b00 cmp r3, #0 80040a8: d009 beq.n 80040be ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 80040aa: 687b ldr r3, [r7, #4] 80040ac: 681b ldr r3, [r3, #0] 80040ae: f403 1380 and.w r3, r3, #1048576 @ 0x100000 if(((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI1) == RCC_PERIPHCLK_SAI1) && (PeriphClkInit->Sai1ClockSelection == RCC_SAI1CLKSOURCE_PLLSAI)) ||\ 80040b2: 2b00 cmp r3, #0 80040b4: d024 beq.n 8004100 ((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_SAI2) == RCC_PERIPHCLK_SAI2) && (PeriphClkInit->Sai2ClockSelection == RCC_SAI2CLKSOURCE_PLLSAI))) 80040b6: 687b ldr r3, [r7, #4] 80040b8: 6b9b ldr r3, [r3, #56] @ 0x38 80040ba: 2b00 cmp r3, #0 80040bc: d120 bne.n 8004100 assert_param(IS_RCC_PLLSAIQ_VALUE(PeriphClkInit->PLLSAI.PLLSAIQ)); /* check for PLLSAI/DIVQ Parameter */ assert_param(IS_RCC_PLLSAI_DIVQ_VALUE(PeriphClkInit->PLLSAIDivQ)); /* Read PLLSAIP value from PLLSAICFGR register (this value is not needed for SAI configuration) */ tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIP) >> RCC_PLLSAICFGR_PLLSAIP_Pos); 80040be: 4b2f ldr r3, [pc, #188] @ (800417c ) 80040c0: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 80040c4: 0c1b lsrs r3, r3, #16 80040c6: f003 0303 and.w r3, r3, #3 80040ca: 613b str r3, [r7, #16] /* PLLSAI_VCO Input = PLL_SOURCE/PLLM */ /* PLLSAI_VCO Output = PLLSAI_VCO Input * PLLSAIN */ /* SAI_CLK(first level) = PLLSAI_VCO Output/PLLSAIQ */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , tmpreg0, PeriphClkInit->PLLSAI.PLLSAIQ); 80040cc: 687b ldr r3, [r7, #4] 80040ce: 691b ldr r3, [r3, #16] 80040d0: 019a lsls r2, r3, #6 80040d2: 693b ldr r3, [r7, #16] 80040d4: 041b lsls r3, r3, #16 80040d6: 431a orrs r2, r3 80040d8: 687b ldr r3, [r7, #4] 80040da: 695b ldr r3, [r3, #20] 80040dc: 061b lsls r3, r3, #24 80040de: 4927 ldr r1, [pc, #156] @ (800417c ) 80040e0: 4313 orrs r3, r2 80040e2: f8c1 3088 str.w r3, [r1, #136] @ 0x88 /* SAI_CLK_x = SAI_CLK(first level)/PLLSAIDIVQ */ __HAL_RCC_PLLSAI_PLLSAICLKDIVQ_CONFIG(PeriphClkInit->PLLSAIDivQ); 80040e6: 4b25 ldr r3, [pc, #148] @ (800417c ) 80040e8: f8d3 308c ldr.w r3, [r3, #140] @ 0x8c 80040ec: f423 52f8 bic.w r2, r3, #7936 @ 0x1f00 80040f0: 687b ldr r3, [r7, #4] 80040f2: 6a1b ldr r3, [r3, #32] 80040f4: 3b01 subs r3, #1 80040f6: 021b lsls r3, r3, #8 80040f8: 4920 ldr r1, [pc, #128] @ (800417c ) 80040fa: 4313 orrs r3, r2 80040fc: f8c1 308c str.w r3, [r1, #140] @ 0x8c } /*----------------- In Case of PLLSAI is selected as source clock for CLK48 -------------------*/ /* In Case of PLLI2S is selected as source clock for CK48 */ if((((PeriphClkInit->PeriphClockSelection) & RCC_PERIPHCLK_CLK48) == RCC_PERIPHCLK_CLK48) && (PeriphClkInit->Clk48ClockSelection == RCC_CLK48SOURCE_PLLSAIP)) 8004100: 687b ldr r3, [r7, #4] 8004102: 681b ldr r3, [r3, #0] 8004104: f403 1300 and.w r3, r3, #2097152 @ 0x200000 8004108: 2b00 cmp r3, #0 800410a: d018 beq.n 800413e 800410c: 687b ldr r3, [r7, #4] 800410e: 6f5b ldr r3, [r3, #116] @ 0x74 8004110: f1b3 6f00 cmp.w r3, #134217728 @ 0x8000000 8004114: d113 bne.n 800413e { /* check for Parameters */ assert_param(IS_RCC_PLLSAIP_VALUE(PeriphClkInit->PLLSAI.PLLSAIP)); /* Read PLLSAIQ and PLLSAIR value from PLLSAICFGR register (this value is not needed for CK48 configuration) */ tmpreg0 = ((RCC->PLLSAICFGR & RCC_PLLSAICFGR_PLLSAIQ) >> RCC_PLLSAICFGR_PLLSAIQ_Pos); 8004116: 4b19 ldr r3, [pc, #100] @ (800417c ) 8004118: f8d3 3088 ldr.w r3, [r3, #136] @ 0x88 800411c: 0e1b lsrs r3, r3, #24 800411e: f003 030f and.w r3, r3, #15 8004122: 613b str r3, [r7, #16] /* Configure the PLLSAI division factors */ /* PLLSAI_VCO = f(VCO clock) = f(PLLSAI clock input) x (PLLI2SN/PLLM) */ /* 48CLK = f(PLLSAI clock output) = f(VCO clock) / PLLSAIP */ __HAL_RCC_PLLSAI_CONFIG(PeriphClkInit->PLLSAI.PLLSAIN , PeriphClkInit->PLLSAI.PLLSAIP, tmpreg0); 8004124: 687b ldr r3, [r7, #4] 8004126: 691b ldr r3, [r3, #16] 8004128: 019a lsls r2, r3, #6 800412a: 687b ldr r3, [r7, #4] 800412c: 699b ldr r3, [r3, #24] 800412e: 041b lsls r3, r3, #16 8004130: 431a orrs r2, r3 8004132: 693b ldr r3, [r7, #16] 8004134: 061b lsls r3, r3, #24 8004136: 4911 ldr r1, [pc, #68] @ (800417c ) 8004138: 4313 orrs r3, r2 800413a: f8c1 3088 str.w r3, [r1, #136] @ 0x88 } /* Enable PLLSAI Clock */ __HAL_RCC_PLLSAI_ENABLE(); 800413e: 4b0f ldr r3, [pc, #60] @ (800417c ) 8004140: 681b ldr r3, [r3, #0] 8004142: 4a0e ldr r2, [pc, #56] @ (800417c ) 8004144: f043 5380 orr.w r3, r3, #268435456 @ 0x10000000 8004148: 6013 str r3, [r2, #0] /* Get Start Tick*/ tickstart = HAL_GetTick(); 800414a: f7fe f82f bl 80021ac 800414e: 6178 str r0, [r7, #20] /* Wait till PLLSAI is ready */ while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 8004150: e008 b.n 8004164 { if((HAL_GetTick() - tickstart) > PLLSAI_TIMEOUT_VALUE) 8004152: f7fe f82b bl 80021ac 8004156: 4602 mov r2, r0 8004158: 697b ldr r3, [r7, #20] 800415a: 1ad3 subs r3, r2, r3 800415c: 2b64 cmp r3, #100 @ 0x64 800415e: d901 bls.n 8004164 { /* return in case of Timeout detected */ return HAL_TIMEOUT; 8004160: 2303 movs r3, #3 8004162: e007 b.n 8004174 while(__HAL_RCC_PLLSAI_GET_FLAG() == RESET) 8004164: 4b05 ldr r3, [pc, #20] @ (800417c ) 8004166: 681b ldr r3, [r3, #0] 8004168: f003 5300 and.w r3, r3, #536870912 @ 0x20000000 800416c: f1b3 5f00 cmp.w r3, #536870912 @ 0x20000000 8004170: d1ef bne.n 8004152 } } } return HAL_OK; 8004172: 2300 movs r3, #0 } 8004174: 4618 mov r0, r3 8004176: 3720 adds r7, #32 8004178: 46bd mov sp, r7 800417a: bd80 pop {r7, pc} 800417c: 40023800 .word 0x40023800 08004180 : * @param ExtTiming Pointer to SRAM extended mode timing structure * @retval HAL status */ HAL_StatusTypeDef HAL_SRAM_Init(SRAM_HandleTypeDef *hsram, FMC_NORSRAM_TimingTypeDef *Timing, FMC_NORSRAM_TimingTypeDef *ExtTiming) { 8004180: b580 push {r7, lr} 8004182: b084 sub sp, #16 8004184: af00 add r7, sp, #0 8004186: 60f8 str r0, [r7, #12] 8004188: 60b9 str r1, [r7, #8] 800418a: 607a str r2, [r7, #4] /* Check the SRAM handle parameter */ if (hsram == NULL) 800418c: 68fb ldr r3, [r7, #12] 800418e: 2b00 cmp r3, #0 8004190: d101 bne.n 8004196 { return HAL_ERROR; 8004192: 2301 movs r3, #1 8004194: e038 b.n 8004208 } if (hsram->State == HAL_SRAM_STATE_RESET) 8004196: 68fb ldr r3, [r7, #12] 8004198: f893 3045 ldrb.w r3, [r3, #69] @ 0x45 800419c: b2db uxtb r3, r3 800419e: 2b00 cmp r3, #0 80041a0: d106 bne.n 80041b0 { /* Allocate lock resource and initialize it */ hsram->Lock = HAL_UNLOCKED; 80041a2: 68fb ldr r3, [r7, #12] 80041a4: 2200 movs r2, #0 80041a6: f883 2044 strb.w r2, [r3, #68] @ 0x44 /* Init the low level hardware */ hsram->MspInitCallback(hsram); #else /* Initialize the low level hardware (MSP) */ HAL_SRAM_MspInit(hsram); 80041aa: 68f8 ldr r0, [r7, #12] 80041ac: f7fd fe70 bl 8001e90 #endif /* USE_HAL_SRAM_REGISTER_CALLBACKS */ } /* Initialize SRAM control Interface */ (void)FMC_NORSRAM_Init(hsram->Instance, &(hsram->Init)); 80041b0: 68fb ldr r3, [r7, #12] 80041b2: 681a ldr r2, [r3, #0] 80041b4: 68fb ldr r3, [r7, #12] 80041b6: 3308 adds r3, #8 80041b8: 4619 mov r1, r3 80041ba: 4610 mov r0, r2 80041bc: f000 fffc bl 80051b8 /* Initialize SRAM timing Interface */ (void)FMC_NORSRAM_Timing_Init(hsram->Instance, Timing, hsram->Init.NSBank); 80041c0: 68fb ldr r3, [r7, #12] 80041c2: 6818 ldr r0, [r3, #0] 80041c4: 68fb ldr r3, [r7, #12] 80041c6: 689b ldr r3, [r3, #8] 80041c8: 461a mov r2, r3 80041ca: 68b9 ldr r1, [r7, #8] 80041cc: f001 f884 bl 80052d8 /* Initialize SRAM extended mode timing Interface */ (void)FMC_NORSRAM_Extended_Timing_Init(hsram->Extended, ExtTiming, hsram->Init.NSBank, 80041d0: 68fb ldr r3, [r7, #12] 80041d2: 6858 ldr r0, [r3, #4] 80041d4: 68fb ldr r3, [r7, #12] 80041d6: 689a ldr r2, [r3, #8] 80041d8: 68fb ldr r3, [r7, #12] 80041da: 6adb ldr r3, [r3, #44] @ 0x2c 80041dc: 6879 ldr r1, [r7, #4] 80041de: f001 f8c5 bl 800536c hsram->Init.ExtendedMode); /* Enable the NORSRAM device */ __FMC_NORSRAM_ENABLE(hsram->Instance, hsram->Init.NSBank); 80041e2: 68fb ldr r3, [r7, #12] 80041e4: 681b ldr r3, [r3, #0] 80041e6: 68fa ldr r2, [r7, #12] 80041e8: 6892 ldr r2, [r2, #8] 80041ea: f853 1022 ldr.w r1, [r3, r2, lsl #2] 80041ee: 68fb ldr r3, [r7, #12] 80041f0: 681b ldr r3, [r3, #0] 80041f2: 68fa ldr r2, [r7, #12] 80041f4: 6892 ldr r2, [r2, #8] 80041f6: f041 0101 orr.w r1, r1, #1 80041fa: f843 1022 str.w r1, [r3, r2, lsl #2] /* Initialize the SRAM controller state */ hsram->State = HAL_SRAM_STATE_READY; 80041fe: 68fb ldr r3, [r7, #12] 8004200: 2201 movs r2, #1 8004202: f883 2045 strb.w r2, [r3, #69] @ 0x45 return HAL_OK; 8004206: 2300 movs r3, #0 } 8004208: 4618 mov r0, r3 800420a: 3710 adds r7, #16 800420c: 46bd mov sp, r7 800420e: bd80 pop {r7, pc} 08004210 : * Ex: call @ref HAL_TIM_Base_DeInit() before HAL_TIM_Base_Init() * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Init(TIM_HandleTypeDef *htim) { 8004210: b580 push {r7, lr} 8004212: b082 sub sp, #8 8004214: af00 add r7, sp, #0 8004216: 6078 str r0, [r7, #4] /* Check the TIM handle allocation */ if (htim == NULL) 8004218: 687b ldr r3, [r7, #4] 800421a: 2b00 cmp r3, #0 800421c: d101 bne.n 8004222 { return HAL_ERROR; 800421e: 2301 movs r3, #1 8004220: e049 b.n 80042b6 assert_param(IS_TIM_COUNTER_MODE(htim->Init.CounterMode)); assert_param(IS_TIM_CLOCKDIVISION_DIV(htim->Init.ClockDivision)); assert_param(IS_TIM_PERIOD(htim, htim->Init.Period)); assert_param(IS_TIM_AUTORELOAD_PRELOAD(htim->Init.AutoReloadPreload)); if (htim->State == HAL_TIM_STATE_RESET) 8004222: 687b ldr r3, [r7, #4] 8004224: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 8004228: b2db uxtb r3, r3 800422a: 2b00 cmp r3, #0 800422c: d106 bne.n 800423c { /* Allocate lock resource and initialize it */ htim->Lock = HAL_UNLOCKED; 800422e: 687b ldr r3, [r7, #4] 8004230: 2200 movs r2, #0 8004232: f883 203c strb.w r2, [r3, #60] @ 0x3c } /* Init the low level hardware : GPIO, CLOCK, NVIC */ htim->Base_MspInitCallback(htim); #else /* Init the low level hardware : GPIO, CLOCK, NVIC */ HAL_TIM_Base_MspInit(htim); 8004236: 6878 ldr r0, [r7, #4] 8004238: f000 f841 bl 80042be #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 800423c: 687b ldr r3, [r7, #4] 800423e: 2202 movs r2, #2 8004240: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Set the Time Base configuration */ TIM_Base_SetConfig(htim->Instance, &htim->Init); 8004244: 687b ldr r3, [r7, #4] 8004246: 681a ldr r2, [r3, #0] 8004248: 687b ldr r3, [r7, #4] 800424a: 3304 adds r3, #4 800424c: 4619 mov r1, r3 800424e: 4610 mov r0, r2 8004250: f000 f9e8 bl 8004624 /* Initialize the DMA burst operation state */ htim->DMABurstState = HAL_DMA_BURST_STATE_READY; 8004254: 687b ldr r3, [r7, #4] 8004256: 2201 movs r2, #1 8004258: f883 2048 strb.w r2, [r3, #72] @ 0x48 /* Initialize the TIM channels state */ TIM_CHANNEL_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 800425c: 687b ldr r3, [r7, #4] 800425e: 2201 movs r2, #1 8004260: f883 203e strb.w r2, [r3, #62] @ 0x3e 8004264: 687b ldr r3, [r7, #4] 8004266: 2201 movs r2, #1 8004268: f883 203f strb.w r2, [r3, #63] @ 0x3f 800426c: 687b ldr r3, [r7, #4] 800426e: 2201 movs r2, #1 8004270: f883 2040 strb.w r2, [r3, #64] @ 0x40 8004274: 687b ldr r3, [r7, #4] 8004276: 2201 movs r2, #1 8004278: f883 2041 strb.w r2, [r3, #65] @ 0x41 800427c: 687b ldr r3, [r7, #4] 800427e: 2201 movs r2, #1 8004280: f883 2042 strb.w r2, [r3, #66] @ 0x42 8004284: 687b ldr r3, [r7, #4] 8004286: 2201 movs r2, #1 8004288: f883 2043 strb.w r2, [r3, #67] @ 0x43 TIM_CHANNEL_N_STATE_SET_ALL(htim, HAL_TIM_CHANNEL_STATE_READY); 800428c: 687b ldr r3, [r7, #4] 800428e: 2201 movs r2, #1 8004290: f883 2044 strb.w r2, [r3, #68] @ 0x44 8004294: 687b ldr r3, [r7, #4] 8004296: 2201 movs r2, #1 8004298: f883 2045 strb.w r2, [r3, #69] @ 0x45 800429c: 687b ldr r3, [r7, #4] 800429e: 2201 movs r2, #1 80042a0: f883 2046 strb.w r2, [r3, #70] @ 0x46 80042a4: 687b ldr r3, [r7, #4] 80042a6: 2201 movs r2, #1 80042a8: f883 2047 strb.w r2, [r3, #71] @ 0x47 /* Initialize the TIM state*/ htim->State = HAL_TIM_STATE_READY; 80042ac: 687b ldr r3, [r7, #4] 80042ae: 2201 movs r2, #1 80042b0: f883 203d strb.w r2, [r3, #61] @ 0x3d return HAL_OK; 80042b4: 2300 movs r3, #0 } 80042b6: 4618 mov r0, r3 80042b8: 3708 adds r7, #8 80042ba: 46bd mov sp, r7 80042bc: bd80 pop {r7, pc} 080042be : * @brief Initializes the TIM Base MSP. * @param htim TIM Base handle * @retval None */ __weak void HAL_TIM_Base_MspInit(TIM_HandleTypeDef *htim) { 80042be: b480 push {r7} 80042c0: b083 sub sp, #12 80042c2: af00 add r7, sp, #0 80042c4: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_Base_MspInit could be implemented in the user file */ } 80042c6: bf00 nop 80042c8: 370c adds r7, #12 80042ca: 46bd mov sp, r7 80042cc: f85d 7b04 ldr.w r7, [sp], #4 80042d0: 4770 bx lr ... 080042d4 : * @brief Starts the TIM Base generation in interrupt mode. * @param htim TIM Base handle * @retval HAL status */ HAL_StatusTypeDef HAL_TIM_Base_Start_IT(TIM_HandleTypeDef *htim) { 80042d4: b480 push {r7} 80042d6: b085 sub sp, #20 80042d8: af00 add r7, sp, #0 80042da: 6078 str r0, [r7, #4] /* Check the parameters */ assert_param(IS_TIM_INSTANCE(htim->Instance)); /* Check the TIM state */ if (htim->State != HAL_TIM_STATE_READY) 80042dc: 687b ldr r3, [r7, #4] 80042de: f893 303d ldrb.w r3, [r3, #61] @ 0x3d 80042e2: b2db uxtb r3, r3 80042e4: 2b01 cmp r3, #1 80042e6: d001 beq.n 80042ec { return HAL_ERROR; 80042e8: 2301 movs r3, #1 80042ea: e054 b.n 8004396 } /* Set the TIM state */ htim->State = HAL_TIM_STATE_BUSY; 80042ec: 687b ldr r3, [r7, #4] 80042ee: 2202 movs r2, #2 80042f0: f883 203d strb.w r2, [r3, #61] @ 0x3d /* Enable the TIM Update interrupt */ __HAL_TIM_ENABLE_IT(htim, TIM_IT_UPDATE); 80042f4: 687b ldr r3, [r7, #4] 80042f6: 681b ldr r3, [r3, #0] 80042f8: 68da ldr r2, [r3, #12] 80042fa: 687b ldr r3, [r7, #4] 80042fc: 681b ldr r3, [r3, #0] 80042fe: f042 0201 orr.w r2, r2, #1 8004302: 60da str r2, [r3, #12] /* Enable the Peripheral, except in trigger mode where enable is automatically done with trigger */ if (IS_TIM_SLAVE_INSTANCE(htim->Instance)) 8004304: 687b ldr r3, [r7, #4] 8004306: 681b ldr r3, [r3, #0] 8004308: 4a26 ldr r2, [pc, #152] @ (80043a4 ) 800430a: 4293 cmp r3, r2 800430c: d022 beq.n 8004354 800430e: 687b ldr r3, [r7, #4] 8004310: 681b ldr r3, [r3, #0] 8004312: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004316: d01d beq.n 8004354 8004318: 687b ldr r3, [r7, #4] 800431a: 681b ldr r3, [r3, #0] 800431c: 4a22 ldr r2, [pc, #136] @ (80043a8 ) 800431e: 4293 cmp r3, r2 8004320: d018 beq.n 8004354 8004322: 687b ldr r3, [r7, #4] 8004324: 681b ldr r3, [r3, #0] 8004326: 4a21 ldr r2, [pc, #132] @ (80043ac ) 8004328: 4293 cmp r3, r2 800432a: d013 beq.n 8004354 800432c: 687b ldr r3, [r7, #4] 800432e: 681b ldr r3, [r3, #0] 8004330: 4a1f ldr r2, [pc, #124] @ (80043b0 ) 8004332: 4293 cmp r3, r2 8004334: d00e beq.n 8004354 8004336: 687b ldr r3, [r7, #4] 8004338: 681b ldr r3, [r3, #0] 800433a: 4a1e ldr r2, [pc, #120] @ (80043b4 ) 800433c: 4293 cmp r3, r2 800433e: d009 beq.n 8004354 8004340: 687b ldr r3, [r7, #4] 8004342: 681b ldr r3, [r3, #0] 8004344: 4a1c ldr r2, [pc, #112] @ (80043b8 ) 8004346: 4293 cmp r3, r2 8004348: d004 beq.n 8004354 800434a: 687b ldr r3, [r7, #4] 800434c: 681b ldr r3, [r3, #0] 800434e: 4a1b ldr r2, [pc, #108] @ (80043bc ) 8004350: 4293 cmp r3, r2 8004352: d115 bne.n 8004380 { tmpsmcr = htim->Instance->SMCR & TIM_SMCR_SMS; 8004354: 687b ldr r3, [r7, #4] 8004356: 681b ldr r3, [r3, #0] 8004358: 689a ldr r2, [r3, #8] 800435a: 4b19 ldr r3, [pc, #100] @ (80043c0 ) 800435c: 4013 ands r3, r2 800435e: 60fb str r3, [r7, #12] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8004360: 68fb ldr r3, [r7, #12] 8004362: 2b06 cmp r3, #6 8004364: d015 beq.n 8004392 8004366: 68fb ldr r3, [r7, #12] 8004368: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 800436c: d011 beq.n 8004392 { __HAL_TIM_ENABLE(htim); 800436e: 687b ldr r3, [r7, #4] 8004370: 681b ldr r3, [r3, #0] 8004372: 681a ldr r2, [r3, #0] 8004374: 687b ldr r3, [r7, #4] 8004376: 681b ldr r3, [r3, #0] 8004378: f042 0201 orr.w r2, r2, #1 800437c: 601a str r2, [r3, #0] if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 800437e: e008 b.n 8004392 } } else { __HAL_TIM_ENABLE(htim); 8004380: 687b ldr r3, [r7, #4] 8004382: 681b ldr r3, [r3, #0] 8004384: 681a ldr r2, [r3, #0] 8004386: 687b ldr r3, [r7, #4] 8004388: 681b ldr r3, [r3, #0] 800438a: f042 0201 orr.w r2, r2, #1 800438e: 601a str r2, [r3, #0] 8004390: e000 b.n 8004394 if (!IS_TIM_SLAVEMODE_TRIGGER_ENABLED(tmpsmcr)) 8004392: bf00 nop } /* Return function status */ return HAL_OK; 8004394: 2300 movs r3, #0 } 8004396: 4618 mov r0, r3 8004398: 3714 adds r7, #20 800439a: 46bd mov sp, r7 800439c: f85d 7b04 ldr.w r7, [sp], #4 80043a0: 4770 bx lr 80043a2: bf00 nop 80043a4: 40010000 .word 0x40010000 80043a8: 40000400 .word 0x40000400 80043ac: 40000800 .word 0x40000800 80043b0: 40000c00 .word 0x40000c00 80043b4: 40010400 .word 0x40010400 80043b8: 40014000 .word 0x40014000 80043bc: 40001800 .word 0x40001800 80043c0: 00010007 .word 0x00010007 080043c4 : * @brief This function handles TIM interrupts requests. * @param htim TIM handle * @retval None */ void HAL_TIM_IRQHandler(TIM_HandleTypeDef *htim) { 80043c4: b580 push {r7, lr} 80043c6: b084 sub sp, #16 80043c8: af00 add r7, sp, #0 80043ca: 6078 str r0, [r7, #4] uint32_t itsource = htim->Instance->DIER; 80043cc: 687b ldr r3, [r7, #4] 80043ce: 681b ldr r3, [r3, #0] 80043d0: 68db ldr r3, [r3, #12] 80043d2: 60fb str r3, [r7, #12] uint32_t itflag = htim->Instance->SR; 80043d4: 687b ldr r3, [r7, #4] 80043d6: 681b ldr r3, [r3, #0] 80043d8: 691b ldr r3, [r3, #16] 80043da: 60bb str r3, [r7, #8] /* Capture compare 1 event */ if ((itflag & (TIM_FLAG_CC1)) == (TIM_FLAG_CC1)) 80043dc: 68bb ldr r3, [r7, #8] 80043de: f003 0302 and.w r3, r3, #2 80043e2: 2b00 cmp r3, #0 80043e4: d020 beq.n 8004428 { if ((itsource & (TIM_IT_CC1)) == (TIM_IT_CC1)) 80043e6: 68fb ldr r3, [r7, #12] 80043e8: f003 0302 and.w r3, r3, #2 80043ec: 2b00 cmp r3, #0 80043ee: d01b beq.n 8004428 { { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC1); 80043f0: 687b ldr r3, [r7, #4] 80043f2: 681b ldr r3, [r3, #0] 80043f4: f06f 0202 mvn.w r2, #2 80043f8: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_1; 80043fa: 687b ldr r3, [r7, #4] 80043fc: 2201 movs r2, #1 80043fe: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC1S) != 0x00U) 8004400: 687b ldr r3, [r7, #4] 8004402: 681b ldr r3, [r3, #0] 8004404: 699b ldr r3, [r3, #24] 8004406: f003 0303 and.w r3, r3, #3 800440a: 2b00 cmp r3, #0 800440c: d003 beq.n 8004416 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800440e: 6878 ldr r0, [r7, #4] 8004410: f000 f8e9 bl 80045e6 8004414: e005 b.n 8004422 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8004416: 6878 ldr r0, [r7, #4] 8004418: f000 f8db bl 80045d2 HAL_TIM_PWM_PulseFinishedCallback(htim); 800441c: 6878 ldr r0, [r7, #4] 800441e: f000 f8ec bl 80045fa #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004422: 687b ldr r3, [r7, #4] 8004424: 2200 movs r2, #0 8004426: 771a strb r2, [r3, #28] } } } /* Capture compare 2 event */ if ((itflag & (TIM_FLAG_CC2)) == (TIM_FLAG_CC2)) 8004428: 68bb ldr r3, [r7, #8] 800442a: f003 0304 and.w r3, r3, #4 800442e: 2b00 cmp r3, #0 8004430: d020 beq.n 8004474 { if ((itsource & (TIM_IT_CC2)) == (TIM_IT_CC2)) 8004432: 68fb ldr r3, [r7, #12] 8004434: f003 0304 and.w r3, r3, #4 8004438: 2b00 cmp r3, #0 800443a: d01b beq.n 8004474 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC2); 800443c: 687b ldr r3, [r7, #4] 800443e: 681b ldr r3, [r3, #0] 8004440: f06f 0204 mvn.w r2, #4 8004444: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_2; 8004446: 687b ldr r3, [r7, #4] 8004448: 2202 movs r2, #2 800444a: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR1 & TIM_CCMR1_CC2S) != 0x00U) 800444c: 687b ldr r3, [r7, #4] 800444e: 681b ldr r3, [r3, #0] 8004450: 699b ldr r3, [r3, #24] 8004452: f403 7340 and.w r3, r3, #768 @ 0x300 8004456: 2b00 cmp r3, #0 8004458: d003 beq.n 8004462 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 800445a: 6878 ldr r0, [r7, #4] 800445c: f000 f8c3 bl 80045e6 8004460: e005 b.n 800446e { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 8004462: 6878 ldr r0, [r7, #4] 8004464: f000 f8b5 bl 80045d2 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004468: 6878 ldr r0, [r7, #4] 800446a: f000 f8c6 bl 80045fa #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 800446e: 687b ldr r3, [r7, #4] 8004470: 2200 movs r2, #0 8004472: 771a strb r2, [r3, #28] } } /* Capture compare 3 event */ if ((itflag & (TIM_FLAG_CC3)) == (TIM_FLAG_CC3)) 8004474: 68bb ldr r3, [r7, #8] 8004476: f003 0308 and.w r3, r3, #8 800447a: 2b00 cmp r3, #0 800447c: d020 beq.n 80044c0 { if ((itsource & (TIM_IT_CC3)) == (TIM_IT_CC3)) 800447e: 68fb ldr r3, [r7, #12] 8004480: f003 0308 and.w r3, r3, #8 8004484: 2b00 cmp r3, #0 8004486: d01b beq.n 80044c0 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC3); 8004488: 687b ldr r3, [r7, #4] 800448a: 681b ldr r3, [r3, #0] 800448c: f06f 0208 mvn.w r2, #8 8004490: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_3; 8004492: 687b ldr r3, [r7, #4] 8004494: 2204 movs r2, #4 8004496: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC3S) != 0x00U) 8004498: 687b ldr r3, [r7, #4] 800449a: 681b ldr r3, [r3, #0] 800449c: 69db ldr r3, [r3, #28] 800449e: f003 0303 and.w r3, r3, #3 80044a2: 2b00 cmp r3, #0 80044a4: d003 beq.n 80044ae { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80044a6: 6878 ldr r0, [r7, #4] 80044a8: f000 f89d bl 80045e6 80044ac: e005 b.n 80044ba { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80044ae: 6878 ldr r0, [r7, #4] 80044b0: f000 f88f bl 80045d2 HAL_TIM_PWM_PulseFinishedCallback(htim); 80044b4: 6878 ldr r0, [r7, #4] 80044b6: f000 f8a0 bl 80045fa #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 80044ba: 687b ldr r3, [r7, #4] 80044bc: 2200 movs r2, #0 80044be: 771a strb r2, [r3, #28] } } /* Capture compare 4 event */ if ((itflag & (TIM_FLAG_CC4)) == (TIM_FLAG_CC4)) 80044c0: 68bb ldr r3, [r7, #8] 80044c2: f003 0310 and.w r3, r3, #16 80044c6: 2b00 cmp r3, #0 80044c8: d020 beq.n 800450c { if ((itsource & (TIM_IT_CC4)) == (TIM_IT_CC4)) 80044ca: 68fb ldr r3, [r7, #12] 80044cc: f003 0310 and.w r3, r3, #16 80044d0: 2b00 cmp r3, #0 80044d2: d01b beq.n 800450c { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_CC4); 80044d4: 687b ldr r3, [r7, #4] 80044d6: 681b ldr r3, [r3, #0] 80044d8: f06f 0210 mvn.w r2, #16 80044dc: 611a str r2, [r3, #16] htim->Channel = HAL_TIM_ACTIVE_CHANNEL_4; 80044de: 687b ldr r3, [r7, #4] 80044e0: 2208 movs r2, #8 80044e2: 771a strb r2, [r3, #28] /* Input capture event */ if ((htim->Instance->CCMR2 & TIM_CCMR2_CC4S) != 0x00U) 80044e4: 687b ldr r3, [r7, #4] 80044e6: 681b ldr r3, [r3, #0] 80044e8: 69db ldr r3, [r3, #28] 80044ea: f403 7340 and.w r3, r3, #768 @ 0x300 80044ee: 2b00 cmp r3, #0 80044f0: d003 beq.n 80044fa { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->IC_CaptureCallback(htim); #else HAL_TIM_IC_CaptureCallback(htim); 80044f2: 6878 ldr r0, [r7, #4] 80044f4: f000 f877 bl 80045e6 80044f8: e005 b.n 8004506 { #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->OC_DelayElapsedCallback(htim); htim->PWM_PulseFinishedCallback(htim); #else HAL_TIM_OC_DelayElapsedCallback(htim); 80044fa: 6878 ldr r0, [r7, #4] 80044fc: f000 f869 bl 80045d2 HAL_TIM_PWM_PulseFinishedCallback(htim); 8004500: 6878 ldr r0, [r7, #4] 8004502: f000 f87a bl 80045fa #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } htim->Channel = HAL_TIM_ACTIVE_CHANNEL_CLEARED; 8004506: 687b ldr r3, [r7, #4] 8004508: 2200 movs r2, #0 800450a: 771a strb r2, [r3, #28] } } /* TIM Update event */ if ((itflag & (TIM_FLAG_UPDATE)) == (TIM_FLAG_UPDATE)) 800450c: 68bb ldr r3, [r7, #8] 800450e: f003 0301 and.w r3, r3, #1 8004512: 2b00 cmp r3, #0 8004514: d00c beq.n 8004530 { if ((itsource & (TIM_IT_UPDATE)) == (TIM_IT_UPDATE)) 8004516: 68fb ldr r3, [r7, #12] 8004518: f003 0301 and.w r3, r3, #1 800451c: 2b00 cmp r3, #0 800451e: d007 beq.n 8004530 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_UPDATE); 8004520: 687b ldr r3, [r7, #4] 8004522: 681b ldr r3, [r3, #0] 8004524: f06f 0201 mvn.w r2, #1 8004528: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->PeriodElapsedCallback(htim); #else HAL_TIM_PeriodElapsedCallback(htim); 800452a: 6878 ldr r0, [r7, #4] 800452c: f7fd fb0e bl 8001b4c #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break input event */ if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \ 8004530: 68bb ldr r3, [r7, #8] 8004532: f003 0380 and.w r3, r3, #128 @ 0x80 8004536: 2b00 cmp r3, #0 8004538: d104 bne.n 8004544 ((itflag & (TIM_FLAG_SYSTEM_BREAK)) == (TIM_FLAG_SYSTEM_BREAK))) 800453a: 68bb ldr r3, [r7, #8] 800453c: f403 5300 and.w r3, r3, #8192 @ 0x2000 if (((itflag & (TIM_FLAG_BREAK)) == (TIM_FLAG_BREAK)) || \ 8004540: 2b00 cmp r3, #0 8004542: d00c beq.n 800455e { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) 8004544: 68fb ldr r3, [r7, #12] 8004546: f003 0380 and.w r3, r3, #128 @ 0x80 800454a: 2b00 cmp r3, #0 800454c: d007 beq.n 800455e { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK | TIM_FLAG_SYSTEM_BREAK); 800454e: 687b ldr r3, [r7, #4] 8004550: 681b ldr r3, [r3, #0] 8004552: f46f 5202 mvn.w r2, #8320 @ 0x2080 8004556: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->BreakCallback(htim); #else HAL_TIMEx_BreakCallback(htim); 8004558: 6878 ldr r0, [r7, #4] 800455a: f000 f913 bl 8004784 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Break2 input event */ if ((itflag & (TIM_FLAG_BREAK2)) == (TIM_FLAG_BREAK2)) 800455e: 68bb ldr r3, [r7, #8] 8004560: f403 7380 and.w r3, r3, #256 @ 0x100 8004564: 2b00 cmp r3, #0 8004566: d00c beq.n 8004582 { if ((itsource & (TIM_IT_BREAK)) == (TIM_IT_BREAK)) 8004568: 68fb ldr r3, [r7, #12] 800456a: f003 0380 and.w r3, r3, #128 @ 0x80 800456e: 2b00 cmp r3, #0 8004570: d007 beq.n 8004582 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_BREAK2); 8004572: 687b ldr r3, [r7, #4] 8004574: 681b ldr r3, [r3, #0] 8004576: f46f 7280 mvn.w r2, #256 @ 0x100 800457a: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->Break2Callback(htim); #else HAL_TIMEx_Break2Callback(htim); 800457c: 6878 ldr r0, [r7, #4] 800457e: f000 f90b bl 8004798 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM Trigger detection event */ if ((itflag & (TIM_FLAG_TRIGGER)) == (TIM_FLAG_TRIGGER)) 8004582: 68bb ldr r3, [r7, #8] 8004584: f003 0340 and.w r3, r3, #64 @ 0x40 8004588: 2b00 cmp r3, #0 800458a: d00c beq.n 80045a6 { if ((itsource & (TIM_IT_TRIGGER)) == (TIM_IT_TRIGGER)) 800458c: 68fb ldr r3, [r7, #12] 800458e: f003 0340 and.w r3, r3, #64 @ 0x40 8004592: 2b00 cmp r3, #0 8004594: d007 beq.n 80045a6 { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_TRIGGER); 8004596: 687b ldr r3, [r7, #4] 8004598: 681b ldr r3, [r3, #0] 800459a: f06f 0240 mvn.w r2, #64 @ 0x40 800459e: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->TriggerCallback(htim); #else HAL_TIM_TriggerCallback(htim); 80045a0: 6878 ldr r0, [r7, #4] 80045a2: f000 f834 bl 800460e #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } /* TIM commutation event */ if ((itflag & (TIM_FLAG_COM)) == (TIM_FLAG_COM)) 80045a6: 68bb ldr r3, [r7, #8] 80045a8: f003 0320 and.w r3, r3, #32 80045ac: 2b00 cmp r3, #0 80045ae: d00c beq.n 80045ca { if ((itsource & (TIM_IT_COM)) == (TIM_IT_COM)) 80045b0: 68fb ldr r3, [r7, #12] 80045b2: f003 0320 and.w r3, r3, #32 80045b6: 2b00 cmp r3, #0 80045b8: d007 beq.n 80045ca { __HAL_TIM_CLEAR_FLAG(htim, TIM_FLAG_COM); 80045ba: 687b ldr r3, [r7, #4] 80045bc: 681b ldr r3, [r3, #0] 80045be: f06f 0220 mvn.w r2, #32 80045c2: 611a str r2, [r3, #16] #if (USE_HAL_TIM_REGISTER_CALLBACKS == 1) htim->CommutationCallback(htim); #else HAL_TIMEx_CommutCallback(htim); 80045c4: 6878 ldr r0, [r7, #4] 80045c6: f000 f8d3 bl 8004770 #endif /* USE_HAL_TIM_REGISTER_CALLBACKS */ } } } 80045ca: bf00 nop 80045cc: 3710 adds r7, #16 80045ce: 46bd mov sp, r7 80045d0: bd80 pop {r7, pc} 080045d2 : * @brief Output Compare callback in non-blocking mode * @param htim TIM OC handle * @retval None */ __weak void HAL_TIM_OC_DelayElapsedCallback(TIM_HandleTypeDef *htim) { 80045d2: b480 push {r7} 80045d4: b083 sub sp, #12 80045d6: af00 add r7, sp, #0 80045d8: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_OC_DelayElapsedCallback could be implemented in the user file */ } 80045da: bf00 nop 80045dc: 370c adds r7, #12 80045de: 46bd mov sp, r7 80045e0: f85d 7b04 ldr.w r7, [sp], #4 80045e4: 4770 bx lr 080045e6 : * @brief Input Capture callback in non-blocking mode * @param htim TIM IC handle * @retval None */ __weak void HAL_TIM_IC_CaptureCallback(TIM_HandleTypeDef *htim) { 80045e6: b480 push {r7} 80045e8: b083 sub sp, #12 80045ea: af00 add r7, sp, #0 80045ec: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_IC_CaptureCallback could be implemented in the user file */ } 80045ee: bf00 nop 80045f0: 370c adds r7, #12 80045f2: 46bd mov sp, r7 80045f4: f85d 7b04 ldr.w r7, [sp], #4 80045f8: 4770 bx lr 080045fa : * @brief PWM Pulse finished callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_PWM_PulseFinishedCallback(TIM_HandleTypeDef *htim) { 80045fa: b480 push {r7} 80045fc: b083 sub sp, #12 80045fe: af00 add r7, sp, #0 8004600: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_PWM_PulseFinishedCallback could be implemented in the user file */ } 8004602: bf00 nop 8004604: 370c adds r7, #12 8004606: 46bd mov sp, r7 8004608: f85d 7b04 ldr.w r7, [sp], #4 800460c: 4770 bx lr 0800460e : * @brief Hall Trigger detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIM_TriggerCallback(TIM_HandleTypeDef *htim) { 800460e: b480 push {r7} 8004610: b083 sub sp, #12 8004612: af00 add r7, sp, #0 8004614: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIM_TriggerCallback could be implemented in the user file */ } 8004616: bf00 nop 8004618: 370c adds r7, #12 800461a: 46bd mov sp, r7 800461c: f85d 7b04 ldr.w r7, [sp], #4 8004620: 4770 bx lr ... 08004624 : * @param TIMx TIM peripheral * @param Structure TIM Base configuration structure * @retval None */ void TIM_Base_SetConfig(TIM_TypeDef *TIMx, const TIM_Base_InitTypeDef *Structure) { 8004624: b480 push {r7} 8004626: b085 sub sp, #20 8004628: af00 add r7, sp, #0 800462a: 6078 str r0, [r7, #4] 800462c: 6039 str r1, [r7, #0] uint32_t tmpcr1; tmpcr1 = TIMx->CR1; 800462e: 687b ldr r3, [r7, #4] 8004630: 681b ldr r3, [r3, #0] 8004632: 60fb str r3, [r7, #12] /* Set TIM Time Base Unit parameters ---------------------------------------*/ if (IS_TIM_COUNTER_MODE_SELECT_INSTANCE(TIMx)) 8004634: 687b ldr r3, [r7, #4] 8004636: 4a43 ldr r2, [pc, #268] @ (8004744 ) 8004638: 4293 cmp r3, r2 800463a: d013 beq.n 8004664 800463c: 687b ldr r3, [r7, #4] 800463e: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004642: d00f beq.n 8004664 8004644: 687b ldr r3, [r7, #4] 8004646: 4a40 ldr r2, [pc, #256] @ (8004748 ) 8004648: 4293 cmp r3, r2 800464a: d00b beq.n 8004664 800464c: 687b ldr r3, [r7, #4] 800464e: 4a3f ldr r2, [pc, #252] @ (800474c ) 8004650: 4293 cmp r3, r2 8004652: d007 beq.n 8004664 8004654: 687b ldr r3, [r7, #4] 8004656: 4a3e ldr r2, [pc, #248] @ (8004750 ) 8004658: 4293 cmp r3, r2 800465a: d003 beq.n 8004664 800465c: 687b ldr r3, [r7, #4] 800465e: 4a3d ldr r2, [pc, #244] @ (8004754 ) 8004660: 4293 cmp r3, r2 8004662: d108 bne.n 8004676 { /* Select the Counter Mode */ tmpcr1 &= ~(TIM_CR1_DIR | TIM_CR1_CMS); 8004664: 68fb ldr r3, [r7, #12] 8004666: f023 0370 bic.w r3, r3, #112 @ 0x70 800466a: 60fb str r3, [r7, #12] tmpcr1 |= Structure->CounterMode; 800466c: 683b ldr r3, [r7, #0] 800466e: 685b ldr r3, [r3, #4] 8004670: 68fa ldr r2, [r7, #12] 8004672: 4313 orrs r3, r2 8004674: 60fb str r3, [r7, #12] } if (IS_TIM_CLOCK_DIVISION_INSTANCE(TIMx)) 8004676: 687b ldr r3, [r7, #4] 8004678: 4a32 ldr r2, [pc, #200] @ (8004744 ) 800467a: 4293 cmp r3, r2 800467c: d02b beq.n 80046d6 800467e: 687b ldr r3, [r7, #4] 8004680: f1b3 4f80 cmp.w r3, #1073741824 @ 0x40000000 8004684: d027 beq.n 80046d6 8004686: 687b ldr r3, [r7, #4] 8004688: 4a2f ldr r2, [pc, #188] @ (8004748 ) 800468a: 4293 cmp r3, r2 800468c: d023 beq.n 80046d6 800468e: 687b ldr r3, [r7, #4] 8004690: 4a2e ldr r2, [pc, #184] @ (800474c ) 8004692: 4293 cmp r3, r2 8004694: d01f beq.n 80046d6 8004696: 687b ldr r3, [r7, #4] 8004698: 4a2d ldr r2, [pc, #180] @ (8004750 ) 800469a: 4293 cmp r3, r2 800469c: d01b beq.n 80046d6 800469e: 687b ldr r3, [r7, #4] 80046a0: 4a2c ldr r2, [pc, #176] @ (8004754 ) 80046a2: 4293 cmp r3, r2 80046a4: d017 beq.n 80046d6 80046a6: 687b ldr r3, [r7, #4] 80046a8: 4a2b ldr r2, [pc, #172] @ (8004758 ) 80046aa: 4293 cmp r3, r2 80046ac: d013 beq.n 80046d6 80046ae: 687b ldr r3, [r7, #4] 80046b0: 4a2a ldr r2, [pc, #168] @ (800475c ) 80046b2: 4293 cmp r3, r2 80046b4: d00f beq.n 80046d6 80046b6: 687b ldr r3, [r7, #4] 80046b8: 4a29 ldr r2, [pc, #164] @ (8004760 ) 80046ba: 4293 cmp r3, r2 80046bc: d00b beq.n 80046d6 80046be: 687b ldr r3, [r7, #4] 80046c0: 4a28 ldr r2, [pc, #160] @ (8004764 ) 80046c2: 4293 cmp r3, r2 80046c4: d007 beq.n 80046d6 80046c6: 687b ldr r3, [r7, #4] 80046c8: 4a27 ldr r2, [pc, #156] @ (8004768 ) 80046ca: 4293 cmp r3, r2 80046cc: d003 beq.n 80046d6 80046ce: 687b ldr r3, [r7, #4] 80046d0: 4a26 ldr r2, [pc, #152] @ (800476c ) 80046d2: 4293 cmp r3, r2 80046d4: d108 bne.n 80046e8 { /* Set the clock division */ tmpcr1 &= ~TIM_CR1_CKD; 80046d6: 68fb ldr r3, [r7, #12] 80046d8: f423 7340 bic.w r3, r3, #768 @ 0x300 80046dc: 60fb str r3, [r7, #12] tmpcr1 |= (uint32_t)Structure->ClockDivision; 80046de: 683b ldr r3, [r7, #0] 80046e0: 68db ldr r3, [r3, #12] 80046e2: 68fa ldr r2, [r7, #12] 80046e4: 4313 orrs r3, r2 80046e6: 60fb str r3, [r7, #12] } /* Set the auto-reload preload */ MODIFY_REG(tmpcr1, TIM_CR1_ARPE, Structure->AutoReloadPreload); 80046e8: 68fb ldr r3, [r7, #12] 80046ea: f023 0280 bic.w r2, r3, #128 @ 0x80 80046ee: 683b ldr r3, [r7, #0] 80046f0: 695b ldr r3, [r3, #20] 80046f2: 4313 orrs r3, r2 80046f4: 60fb str r3, [r7, #12] /* Set the Autoreload value */ TIMx->ARR = (uint32_t)Structure->Period ; 80046f6: 683b ldr r3, [r7, #0] 80046f8: 689a ldr r2, [r3, #8] 80046fa: 687b ldr r3, [r7, #4] 80046fc: 62da str r2, [r3, #44] @ 0x2c /* Set the Prescaler value */ TIMx->PSC = Structure->Prescaler; 80046fe: 683b ldr r3, [r7, #0] 8004700: 681a ldr r2, [r3, #0] 8004702: 687b ldr r3, [r7, #4] 8004704: 629a str r2, [r3, #40] @ 0x28 if (IS_TIM_REPETITION_COUNTER_INSTANCE(TIMx)) 8004706: 687b ldr r3, [r7, #4] 8004708: 4a0e ldr r2, [pc, #56] @ (8004744 ) 800470a: 4293 cmp r3, r2 800470c: d003 beq.n 8004716 800470e: 687b ldr r3, [r7, #4] 8004710: 4a10 ldr r2, [pc, #64] @ (8004754 ) 8004712: 4293 cmp r3, r2 8004714: d103 bne.n 800471e { /* Set the Repetition Counter value */ TIMx->RCR = Structure->RepetitionCounter; 8004716: 683b ldr r3, [r7, #0] 8004718: 691a ldr r2, [r3, #16] 800471a: 687b ldr r3, [r7, #4] 800471c: 631a str r2, [r3, #48] @ 0x30 } /* Disable Update Event (UEV) with Update Generation (UG) by changing Update Request Source (URS) to avoid Update flag (UIF) */ SET_BIT(TIMx->CR1, TIM_CR1_URS); 800471e: 687b ldr r3, [r7, #4] 8004720: 681b ldr r3, [r3, #0] 8004722: f043 0204 orr.w r2, r3, #4 8004726: 687b ldr r3, [r7, #4] 8004728: 601a str r2, [r3, #0] /* Generate an update event to reload the Prescaler and the repetition counter (only for advanced timer) value immediately */ TIMx->EGR = TIM_EGR_UG; 800472a: 687b ldr r3, [r7, #4] 800472c: 2201 movs r2, #1 800472e: 615a str r2, [r3, #20] TIMx->CR1 = tmpcr1; 8004730: 687b ldr r3, [r7, #4] 8004732: 68fa ldr r2, [r7, #12] 8004734: 601a str r2, [r3, #0] } 8004736: bf00 nop 8004738: 3714 adds r7, #20 800473a: 46bd mov sp, r7 800473c: f85d 7b04 ldr.w r7, [sp], #4 8004740: 4770 bx lr 8004742: bf00 nop 8004744: 40010000 .word 0x40010000 8004748: 40000400 .word 0x40000400 800474c: 40000800 .word 0x40000800 8004750: 40000c00 .word 0x40000c00 8004754: 40010400 .word 0x40010400 8004758: 40014000 .word 0x40014000 800475c: 40014400 .word 0x40014400 8004760: 40014800 .word 0x40014800 8004764: 40001800 .word 0x40001800 8004768: 40001c00 .word 0x40001c00 800476c: 40002000 .word 0x40002000 08004770 : * @brief Commutation callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_CommutCallback(TIM_HandleTypeDef *htim) { 8004770: b480 push {r7} 8004772: b083 sub sp, #12 8004774: af00 add r7, sp, #0 8004776: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_CommutCallback could be implemented in the user file */ } 8004778: bf00 nop 800477a: 370c adds r7, #12 800477c: 46bd mov sp, r7 800477e: f85d 7b04 ldr.w r7, [sp], #4 8004782: 4770 bx lr 08004784 : * @brief Break detection callback in non-blocking mode * @param htim TIM handle * @retval None */ __weak void HAL_TIMEx_BreakCallback(TIM_HandleTypeDef *htim) { 8004784: b480 push {r7} 8004786: b083 sub sp, #12 8004788: af00 add r7, sp, #0 800478a: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function should not be modified, when the callback is needed, the HAL_TIMEx_BreakCallback could be implemented in the user file */ } 800478c: bf00 nop 800478e: 370c adds r7, #12 8004790: 46bd mov sp, r7 8004792: f85d 7b04 ldr.w r7, [sp], #4 8004796: 4770 bx lr 08004798 : * @brief Break2 detection callback in non blocking mode * @param htim: TIM handle * @retval None */ __weak void HAL_TIMEx_Break2Callback(TIM_HandleTypeDef *htim) { 8004798: b480 push {r7} 800479a: b083 sub sp, #12 800479c: af00 add r7, sp, #0 800479e: 6078 str r0, [r7, #4] UNUSED(htim); /* NOTE : This function Should not be modified, when the callback is needed, the HAL_TIMEx_Break2Callback could be implemented in the user file */ } 80047a0: bf00 nop 80047a2: 370c adds r7, #12 80047a4: 46bd mov sp, r7 80047a6: f85d 7b04 ldr.w r7, [sp], #4 80047aa: 4770 bx lr 080047ac : * parameters in the UART_InitTypeDef and initialize the associated handle. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart) { 80047ac: b580 push {r7, lr} 80047ae: b082 sub sp, #8 80047b0: af00 add r7, sp, #0 80047b2: 6078 str r0, [r7, #4] /* Check the UART handle allocation */ if (huart == NULL) 80047b4: 687b ldr r3, [r7, #4] 80047b6: 2b00 cmp r3, #0 80047b8: d101 bne.n 80047be { return HAL_ERROR; 80047ba: 2301 movs r3, #1 80047bc: e040 b.n 8004840 { /* Check the parameters */ assert_param(IS_UART_INSTANCE(huart->Instance)); } if (huart->gState == HAL_UART_STATE_RESET) 80047be: 687b ldr r3, [r7, #4] 80047c0: 6fdb ldr r3, [r3, #124] @ 0x7c 80047c2: 2b00 cmp r3, #0 80047c4: d106 bne.n 80047d4 { /* Allocate lock resource and initialize it */ huart->Lock = HAL_UNLOCKED; 80047c6: 687b ldr r3, [r7, #4] 80047c8: 2200 movs r2, #0 80047ca: f883 2078 strb.w r2, [r3, #120] @ 0x78 /* Init the low level hardware */ huart->MspInitCallback(huart); #else /* Init the low level hardware : GPIO, CLOCK */ HAL_UART_MspInit(huart); 80047ce: 6878 ldr r0, [r7, #4] 80047d0: f7fd fa80 bl 8001cd4 #endif /* (USE_HAL_UART_REGISTER_CALLBACKS) */ } huart->gState = HAL_UART_STATE_BUSY; 80047d4: 687b ldr r3, [r7, #4] 80047d6: 2224 movs r2, #36 @ 0x24 80047d8: 67da str r2, [r3, #124] @ 0x7c __HAL_UART_DISABLE(huart); 80047da: 687b ldr r3, [r7, #4] 80047dc: 681b ldr r3, [r3, #0] 80047de: 681a ldr r2, [r3, #0] 80047e0: 687b ldr r3, [r7, #4] 80047e2: 681b ldr r3, [r3, #0] 80047e4: f022 0201 bic.w r2, r2, #1 80047e8: 601a str r2, [r3, #0] /* Perform advanced settings configuration */ /* For some items, configuration requires to be done prior TE and RE bits are set */ if (huart->AdvancedInit.AdvFeatureInit != UART_ADVFEATURE_NO_INIT) 80047ea: 687b ldr r3, [r7, #4] 80047ec: 6a5b ldr r3, [r3, #36] @ 0x24 80047ee: 2b00 cmp r3, #0 80047f0: d002 beq.n 80047f8 { UART_AdvFeatureConfig(huart); 80047f2: 6878 ldr r0, [r7, #4] 80047f4: f000 fb16 bl 8004e24 } /* Set the UART Communication parameters */ if (UART_SetConfig(huart) == HAL_ERROR) 80047f8: 6878 ldr r0, [r7, #4] 80047fa: f000 f8af bl 800495c 80047fe: 4603 mov r3, r0 8004800: 2b01 cmp r3, #1 8004802: d101 bne.n 8004808 { return HAL_ERROR; 8004804: 2301 movs r3, #1 8004806: e01b b.n 8004840 } /* In asynchronous mode, the following bits must be kept cleared: - LINEN and CLKEN bits in the USART_CR2 register, - SCEN, HDSEL and IREN bits in the USART_CR3 register.*/ CLEAR_BIT(huart->Instance->CR2, (USART_CR2_LINEN | USART_CR2_CLKEN)); 8004808: 687b ldr r3, [r7, #4] 800480a: 681b ldr r3, [r3, #0] 800480c: 685a ldr r2, [r3, #4] 800480e: 687b ldr r3, [r7, #4] 8004810: 681b ldr r3, [r3, #0] 8004812: f422 4290 bic.w r2, r2, #18432 @ 0x4800 8004816: 605a str r2, [r3, #4] CLEAR_BIT(huart->Instance->CR3, (USART_CR3_SCEN | USART_CR3_HDSEL | USART_CR3_IREN)); 8004818: 687b ldr r3, [r7, #4] 800481a: 681b ldr r3, [r3, #0] 800481c: 689a ldr r2, [r3, #8] 800481e: 687b ldr r3, [r7, #4] 8004820: 681b ldr r3, [r3, #0] 8004822: f022 022a bic.w r2, r2, #42 @ 0x2a 8004826: 609a str r2, [r3, #8] __HAL_UART_ENABLE(huart); 8004828: 687b ldr r3, [r7, #4] 800482a: 681b ldr r3, [r3, #0] 800482c: 681a ldr r2, [r3, #0] 800482e: 687b ldr r3, [r7, #4] 8004830: 681b ldr r3, [r3, #0] 8004832: f042 0201 orr.w r2, r2, #1 8004836: 601a str r2, [r3, #0] /* TEACK and/or REACK to check before moving huart->gState and huart->RxState to Ready */ return (UART_CheckIdleState(huart)); 8004838: 6878 ldr r0, [r7, #4] 800483a: f000 fb95 bl 8004f68 800483e: 4603 mov r3, r0 } 8004840: 4618 mov r0, r3 8004842: 3708 adds r7, #8 8004844: 46bd mov sp, r7 8004846: bd80 pop {r7, pc} 08004848 : * @param Size Amount of data elements (u8 or u16) to be sent. * @param Timeout Timeout duration. * @retval HAL status */ HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, const uint8_t *pData, uint16_t Size, uint32_t Timeout) { 8004848: b580 push {r7, lr} 800484a: b08a sub sp, #40 @ 0x28 800484c: af02 add r7, sp, #8 800484e: 60f8 str r0, [r7, #12] 8004850: 60b9 str r1, [r7, #8] 8004852: 603b str r3, [r7, #0] 8004854: 4613 mov r3, r2 8004856: 80fb strh r3, [r7, #6] const uint8_t *pdata8bits; const uint16_t *pdata16bits; uint32_t tickstart; /* Check that a Tx process is not already ongoing */ if (huart->gState == HAL_UART_STATE_READY) 8004858: 68fb ldr r3, [r7, #12] 800485a: 6fdb ldr r3, [r3, #124] @ 0x7c 800485c: 2b20 cmp r3, #32 800485e: d177 bne.n 8004950 { if ((pData == NULL) || (Size == 0U)) 8004860: 68bb ldr r3, [r7, #8] 8004862: 2b00 cmp r3, #0 8004864: d002 beq.n 800486c 8004866: 88fb ldrh r3, [r7, #6] 8004868: 2b00 cmp r3, #0 800486a: d101 bne.n 8004870 { return HAL_ERROR; 800486c: 2301 movs r3, #1 800486e: e070 b.n 8004952 } huart->ErrorCode = HAL_UART_ERROR_NONE; 8004870: 68fb ldr r3, [r7, #12] 8004872: 2200 movs r2, #0 8004874: f8c3 2084 str.w r2, [r3, #132] @ 0x84 huart->gState = HAL_UART_STATE_BUSY_TX; 8004878: 68fb ldr r3, [r7, #12] 800487a: 2221 movs r2, #33 @ 0x21 800487c: 67da str r2, [r3, #124] @ 0x7c /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 800487e: f7fd fc95 bl 80021ac 8004882: 6178 str r0, [r7, #20] huart->TxXferSize = Size; 8004884: 68fb ldr r3, [r7, #12] 8004886: 88fa ldrh r2, [r7, #6] 8004888: f8a3 2050 strh.w r2, [r3, #80] @ 0x50 huart->TxXferCount = Size; 800488c: 68fb ldr r3, [r7, #12] 800488e: 88fa ldrh r2, [r7, #6] 8004890: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 /* In case of 9bits/No Parity transfer, pData needs to be handled as a uint16_t pointer */ if ((huart->Init.WordLength == UART_WORDLENGTH_9B) && (huart->Init.Parity == UART_PARITY_NONE)) 8004894: 68fb ldr r3, [r7, #12] 8004896: 689b ldr r3, [r3, #8] 8004898: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 800489c: d108 bne.n 80048b0 800489e: 68fb ldr r3, [r7, #12] 80048a0: 691b ldr r3, [r3, #16] 80048a2: 2b00 cmp r3, #0 80048a4: d104 bne.n 80048b0 { pdata8bits = NULL; 80048a6: 2300 movs r3, #0 80048a8: 61fb str r3, [r7, #28] pdata16bits = (const uint16_t *) pData; 80048aa: 68bb ldr r3, [r7, #8] 80048ac: 61bb str r3, [r7, #24] 80048ae: e003 b.n 80048b8 } else { pdata8bits = pData; 80048b0: 68bb ldr r3, [r7, #8] 80048b2: 61fb str r3, [r7, #28] pdata16bits = NULL; 80048b4: 2300 movs r3, #0 80048b6: 61bb str r3, [r7, #24] } while (huart->TxXferCount > 0U) 80048b8: e02f b.n 800491a { if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TXE, RESET, tickstart, Timeout) != HAL_OK) 80048ba: 683b ldr r3, [r7, #0] 80048bc: 9300 str r3, [sp, #0] 80048be: 697b ldr r3, [r7, #20] 80048c0: 2200 movs r2, #0 80048c2: 2180 movs r1, #128 @ 0x80 80048c4: 68f8 ldr r0, [r7, #12] 80048c6: f000 fba6 bl 8005016 80048ca: 4603 mov r3, r0 80048cc: 2b00 cmp r3, #0 80048ce: d004 beq.n 80048da { huart->gState = HAL_UART_STATE_READY; 80048d0: 68fb ldr r3, [r7, #12] 80048d2: 2220 movs r2, #32 80048d4: 67da str r2, [r3, #124] @ 0x7c return HAL_TIMEOUT; 80048d6: 2303 movs r3, #3 80048d8: e03b b.n 8004952 } if (pdata8bits == NULL) 80048da: 69fb ldr r3, [r7, #28] 80048dc: 2b00 cmp r3, #0 80048de: d10b bne.n 80048f8 { huart->Instance->TDR = (uint16_t)(*pdata16bits & 0x01FFU); 80048e0: 69bb ldr r3, [r7, #24] 80048e2: 881b ldrh r3, [r3, #0] 80048e4: 461a mov r2, r3 80048e6: 68fb ldr r3, [r7, #12] 80048e8: 681b ldr r3, [r3, #0] 80048ea: f3c2 0208 ubfx r2, r2, #0, #9 80048ee: 629a str r2, [r3, #40] @ 0x28 pdata16bits++; 80048f0: 69bb ldr r3, [r7, #24] 80048f2: 3302 adds r3, #2 80048f4: 61bb str r3, [r7, #24] 80048f6: e007 b.n 8004908 } else { huart->Instance->TDR = (uint8_t)(*pdata8bits & 0xFFU); 80048f8: 69fb ldr r3, [r7, #28] 80048fa: 781a ldrb r2, [r3, #0] 80048fc: 68fb ldr r3, [r7, #12] 80048fe: 681b ldr r3, [r3, #0] 8004900: 629a str r2, [r3, #40] @ 0x28 pdata8bits++; 8004902: 69fb ldr r3, [r7, #28] 8004904: 3301 adds r3, #1 8004906: 61fb str r3, [r7, #28] } huart->TxXferCount--; 8004908: 68fb ldr r3, [r7, #12] 800490a: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 800490e: b29b uxth r3, r3 8004910: 3b01 subs r3, #1 8004912: b29a uxth r2, r3 8004914: 68fb ldr r3, [r7, #12] 8004916: f8a3 2052 strh.w r2, [r3, #82] @ 0x52 while (huart->TxXferCount > 0U) 800491a: 68fb ldr r3, [r7, #12] 800491c: f8b3 3052 ldrh.w r3, [r3, #82] @ 0x52 8004920: b29b uxth r3, r3 8004922: 2b00 cmp r3, #0 8004924: d1c9 bne.n 80048ba } if (UART_WaitOnFlagUntilTimeout(huart, UART_FLAG_TC, RESET, tickstart, Timeout) != HAL_OK) 8004926: 683b ldr r3, [r7, #0] 8004928: 9300 str r3, [sp, #0] 800492a: 697b ldr r3, [r7, #20] 800492c: 2200 movs r2, #0 800492e: 2140 movs r1, #64 @ 0x40 8004930: 68f8 ldr r0, [r7, #12] 8004932: f000 fb70 bl 8005016 8004936: 4603 mov r3, r0 8004938: 2b00 cmp r3, #0 800493a: d004 beq.n 8004946 { huart->gState = HAL_UART_STATE_READY; 800493c: 68fb ldr r3, [r7, #12] 800493e: 2220 movs r2, #32 8004940: 67da str r2, [r3, #124] @ 0x7c return HAL_TIMEOUT; 8004942: 2303 movs r3, #3 8004944: e005 b.n 8004952 } /* At end of Tx process, restore huart->gState to Ready */ huart->gState = HAL_UART_STATE_READY; 8004946: 68fb ldr r3, [r7, #12] 8004948: 2220 movs r2, #32 800494a: 67da str r2, [r3, #124] @ 0x7c return HAL_OK; 800494c: 2300 movs r3, #0 800494e: e000 b.n 8004952 } else { return HAL_BUSY; 8004950: 2302 movs r3, #2 } } 8004952: 4618 mov r0, r3 8004954: 3720 adds r7, #32 8004956: 46bd mov sp, r7 8004958: bd80 pop {r7, pc} ... 0800495c : * @brief Configure the UART peripheral. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart) { 800495c: b580 push {r7, lr} 800495e: b088 sub sp, #32 8004960: af00 add r7, sp, #0 8004962: 6078 str r0, [r7, #4] uint32_t tmpreg; uint16_t brrtemp; UART_ClockSourceTypeDef clocksource; uint32_t usartdiv; HAL_StatusTypeDef ret = HAL_OK; 8004964: 2300 movs r3, #0 8004966: 77bb strb r3, [r7, #30] * the UART Word Length, Parity, Mode and oversampling: * set the M bits according to huart->Init.WordLength value * set PCE and PS bits according to huart->Init.Parity value * set TE and RE bits according to huart->Init.Mode value * set OVER8 bit according to huart->Init.OverSampling value */ tmpreg = (uint32_t)huart->Init.WordLength | huart->Init.Parity | huart->Init.Mode | huart->Init.OverSampling ; 8004968: 687b ldr r3, [r7, #4] 800496a: 689a ldr r2, [r3, #8] 800496c: 687b ldr r3, [r7, #4] 800496e: 691b ldr r3, [r3, #16] 8004970: 431a orrs r2, r3 8004972: 687b ldr r3, [r7, #4] 8004974: 695b ldr r3, [r3, #20] 8004976: 431a orrs r2, r3 8004978: 687b ldr r3, [r7, #4] 800497a: 69db ldr r3, [r3, #28] 800497c: 4313 orrs r3, r2 800497e: 617b str r3, [r7, #20] MODIFY_REG(huart->Instance->CR1, USART_CR1_FIELDS, tmpreg); 8004980: 687b ldr r3, [r7, #4] 8004982: 681b ldr r3, [r3, #0] 8004984: 681a ldr r2, [r3, #0] 8004986: 4ba6 ldr r3, [pc, #664] @ (8004c20 ) 8004988: 4013 ands r3, r2 800498a: 687a ldr r2, [r7, #4] 800498c: 6812 ldr r2, [r2, #0] 800498e: 6979 ldr r1, [r7, #20] 8004990: 430b orrs r3, r1 8004992: 6013 str r3, [r2, #0] /*-------------------------- USART CR2 Configuration -----------------------*/ /* Configure the UART Stop Bits: Set STOP[13:12] bits according * to huart->Init.StopBits value */ MODIFY_REG(huart->Instance->CR2, USART_CR2_STOP, huart->Init.StopBits); 8004994: 687b ldr r3, [r7, #4] 8004996: 681b ldr r3, [r3, #0] 8004998: 685b ldr r3, [r3, #4] 800499a: f423 5140 bic.w r1, r3, #12288 @ 0x3000 800499e: 687b ldr r3, [r7, #4] 80049a0: 68da ldr r2, [r3, #12] 80049a2: 687b ldr r3, [r7, #4] 80049a4: 681b ldr r3, [r3, #0] 80049a6: 430a orrs r2, r1 80049a8: 605a str r2, [r3, #4] /* Configure * - UART HardWare Flow Control: set CTSE and RTSE bits according * to huart->Init.HwFlowCtl value * - one-bit sampling method versus three samples' majority rule according * to huart->Init.OneBitSampling (not applicable to LPUART) */ tmpreg = (uint32_t)huart->Init.HwFlowCtl; 80049aa: 687b ldr r3, [r7, #4] 80049ac: 699b ldr r3, [r3, #24] 80049ae: 617b str r3, [r7, #20] tmpreg |= huart->Init.OneBitSampling; 80049b0: 687b ldr r3, [r7, #4] 80049b2: 6a1b ldr r3, [r3, #32] 80049b4: 697a ldr r2, [r7, #20] 80049b6: 4313 orrs r3, r2 80049b8: 617b str r3, [r7, #20] MODIFY_REG(huart->Instance->CR3, USART_CR3_FIELDS, tmpreg); 80049ba: 687b ldr r3, [r7, #4] 80049bc: 681b ldr r3, [r3, #0] 80049be: 689b ldr r3, [r3, #8] 80049c0: f423 6130 bic.w r1, r3, #2816 @ 0xb00 80049c4: 687b ldr r3, [r7, #4] 80049c6: 681b ldr r3, [r3, #0] 80049c8: 697a ldr r2, [r7, #20] 80049ca: 430a orrs r2, r1 80049cc: 609a str r2, [r3, #8] /*-------------------------- USART BRR Configuration -----------------------*/ UART_GETCLOCKSOURCE(huart, clocksource); 80049ce: 687b ldr r3, [r7, #4] 80049d0: 681b ldr r3, [r3, #0] 80049d2: 4a94 ldr r2, [pc, #592] @ (8004c24 ) 80049d4: 4293 cmp r3, r2 80049d6: d120 bne.n 8004a1a 80049d8: 4b93 ldr r3, [pc, #588] @ (8004c28 ) 80049da: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 80049de: f003 0303 and.w r3, r3, #3 80049e2: 2b03 cmp r3, #3 80049e4: d816 bhi.n 8004a14 80049e6: a201 add r2, pc, #4 @ (adr r2, 80049ec ) 80049e8: f852 f023 ldr.w pc, [r2, r3, lsl #2] 80049ec: 080049fd .word 0x080049fd 80049f0: 08004a09 .word 0x08004a09 80049f4: 08004a03 .word 0x08004a03 80049f8: 08004a0f .word 0x08004a0f 80049fc: 2301 movs r3, #1 80049fe: 77fb strb r3, [r7, #31] 8004a00: e150 b.n 8004ca4 8004a02: 2302 movs r3, #2 8004a04: 77fb strb r3, [r7, #31] 8004a06: e14d b.n 8004ca4 8004a08: 2304 movs r3, #4 8004a0a: 77fb strb r3, [r7, #31] 8004a0c: e14a b.n 8004ca4 8004a0e: 2308 movs r3, #8 8004a10: 77fb strb r3, [r7, #31] 8004a12: e147 b.n 8004ca4 8004a14: 2310 movs r3, #16 8004a16: 77fb strb r3, [r7, #31] 8004a18: e144 b.n 8004ca4 8004a1a: 687b ldr r3, [r7, #4] 8004a1c: 681b ldr r3, [r3, #0] 8004a1e: 4a83 ldr r2, [pc, #524] @ (8004c2c ) 8004a20: 4293 cmp r3, r2 8004a22: d132 bne.n 8004a8a 8004a24: 4b80 ldr r3, [pc, #512] @ (8004c28 ) 8004a26: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004a2a: f003 030c and.w r3, r3, #12 8004a2e: 2b0c cmp r3, #12 8004a30: d828 bhi.n 8004a84 8004a32: a201 add r2, pc, #4 @ (adr r2, 8004a38 ) 8004a34: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004a38: 08004a6d .word 0x08004a6d 8004a3c: 08004a85 .word 0x08004a85 8004a40: 08004a85 .word 0x08004a85 8004a44: 08004a85 .word 0x08004a85 8004a48: 08004a79 .word 0x08004a79 8004a4c: 08004a85 .word 0x08004a85 8004a50: 08004a85 .word 0x08004a85 8004a54: 08004a85 .word 0x08004a85 8004a58: 08004a73 .word 0x08004a73 8004a5c: 08004a85 .word 0x08004a85 8004a60: 08004a85 .word 0x08004a85 8004a64: 08004a85 .word 0x08004a85 8004a68: 08004a7f .word 0x08004a7f 8004a6c: 2300 movs r3, #0 8004a6e: 77fb strb r3, [r7, #31] 8004a70: e118 b.n 8004ca4 8004a72: 2302 movs r3, #2 8004a74: 77fb strb r3, [r7, #31] 8004a76: e115 b.n 8004ca4 8004a78: 2304 movs r3, #4 8004a7a: 77fb strb r3, [r7, #31] 8004a7c: e112 b.n 8004ca4 8004a7e: 2308 movs r3, #8 8004a80: 77fb strb r3, [r7, #31] 8004a82: e10f b.n 8004ca4 8004a84: 2310 movs r3, #16 8004a86: 77fb strb r3, [r7, #31] 8004a88: e10c b.n 8004ca4 8004a8a: 687b ldr r3, [r7, #4] 8004a8c: 681b ldr r3, [r3, #0] 8004a8e: 4a68 ldr r2, [pc, #416] @ (8004c30 ) 8004a90: 4293 cmp r3, r2 8004a92: d120 bne.n 8004ad6 8004a94: 4b64 ldr r3, [pc, #400] @ (8004c28 ) 8004a96: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004a9a: f003 0330 and.w r3, r3, #48 @ 0x30 8004a9e: 2b30 cmp r3, #48 @ 0x30 8004aa0: d013 beq.n 8004aca 8004aa2: 2b30 cmp r3, #48 @ 0x30 8004aa4: d814 bhi.n 8004ad0 8004aa6: 2b20 cmp r3, #32 8004aa8: d009 beq.n 8004abe 8004aaa: 2b20 cmp r3, #32 8004aac: d810 bhi.n 8004ad0 8004aae: 2b00 cmp r3, #0 8004ab0: d002 beq.n 8004ab8 8004ab2: 2b10 cmp r3, #16 8004ab4: d006 beq.n 8004ac4 8004ab6: e00b b.n 8004ad0 8004ab8: 2300 movs r3, #0 8004aba: 77fb strb r3, [r7, #31] 8004abc: e0f2 b.n 8004ca4 8004abe: 2302 movs r3, #2 8004ac0: 77fb strb r3, [r7, #31] 8004ac2: e0ef b.n 8004ca4 8004ac4: 2304 movs r3, #4 8004ac6: 77fb strb r3, [r7, #31] 8004ac8: e0ec b.n 8004ca4 8004aca: 2308 movs r3, #8 8004acc: 77fb strb r3, [r7, #31] 8004ace: e0e9 b.n 8004ca4 8004ad0: 2310 movs r3, #16 8004ad2: 77fb strb r3, [r7, #31] 8004ad4: e0e6 b.n 8004ca4 8004ad6: 687b ldr r3, [r7, #4] 8004ad8: 681b ldr r3, [r3, #0] 8004ada: 4a56 ldr r2, [pc, #344] @ (8004c34 ) 8004adc: 4293 cmp r3, r2 8004ade: d120 bne.n 8004b22 8004ae0: 4b51 ldr r3, [pc, #324] @ (8004c28 ) 8004ae2: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004ae6: f003 03c0 and.w r3, r3, #192 @ 0xc0 8004aea: 2bc0 cmp r3, #192 @ 0xc0 8004aec: d013 beq.n 8004b16 8004aee: 2bc0 cmp r3, #192 @ 0xc0 8004af0: d814 bhi.n 8004b1c 8004af2: 2b80 cmp r3, #128 @ 0x80 8004af4: d009 beq.n 8004b0a 8004af6: 2b80 cmp r3, #128 @ 0x80 8004af8: d810 bhi.n 8004b1c 8004afa: 2b00 cmp r3, #0 8004afc: d002 beq.n 8004b04 8004afe: 2b40 cmp r3, #64 @ 0x40 8004b00: d006 beq.n 8004b10 8004b02: e00b b.n 8004b1c 8004b04: 2300 movs r3, #0 8004b06: 77fb strb r3, [r7, #31] 8004b08: e0cc b.n 8004ca4 8004b0a: 2302 movs r3, #2 8004b0c: 77fb strb r3, [r7, #31] 8004b0e: e0c9 b.n 8004ca4 8004b10: 2304 movs r3, #4 8004b12: 77fb strb r3, [r7, #31] 8004b14: e0c6 b.n 8004ca4 8004b16: 2308 movs r3, #8 8004b18: 77fb strb r3, [r7, #31] 8004b1a: e0c3 b.n 8004ca4 8004b1c: 2310 movs r3, #16 8004b1e: 77fb strb r3, [r7, #31] 8004b20: e0c0 b.n 8004ca4 8004b22: 687b ldr r3, [r7, #4] 8004b24: 681b ldr r3, [r3, #0] 8004b26: 4a44 ldr r2, [pc, #272] @ (8004c38 ) 8004b28: 4293 cmp r3, r2 8004b2a: d125 bne.n 8004b78 8004b2c: 4b3e ldr r3, [pc, #248] @ (8004c28 ) 8004b2e: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004b32: f403 7340 and.w r3, r3, #768 @ 0x300 8004b36: f5b3 7f40 cmp.w r3, #768 @ 0x300 8004b3a: d017 beq.n 8004b6c 8004b3c: f5b3 7f40 cmp.w r3, #768 @ 0x300 8004b40: d817 bhi.n 8004b72 8004b42: f5b3 7f00 cmp.w r3, #512 @ 0x200 8004b46: d00b beq.n 8004b60 8004b48: f5b3 7f00 cmp.w r3, #512 @ 0x200 8004b4c: d811 bhi.n 8004b72 8004b4e: 2b00 cmp r3, #0 8004b50: d003 beq.n 8004b5a 8004b52: f5b3 7f80 cmp.w r3, #256 @ 0x100 8004b56: d006 beq.n 8004b66 8004b58: e00b b.n 8004b72 8004b5a: 2300 movs r3, #0 8004b5c: 77fb strb r3, [r7, #31] 8004b5e: e0a1 b.n 8004ca4 8004b60: 2302 movs r3, #2 8004b62: 77fb strb r3, [r7, #31] 8004b64: e09e b.n 8004ca4 8004b66: 2304 movs r3, #4 8004b68: 77fb strb r3, [r7, #31] 8004b6a: e09b b.n 8004ca4 8004b6c: 2308 movs r3, #8 8004b6e: 77fb strb r3, [r7, #31] 8004b70: e098 b.n 8004ca4 8004b72: 2310 movs r3, #16 8004b74: 77fb strb r3, [r7, #31] 8004b76: e095 b.n 8004ca4 8004b78: 687b ldr r3, [r7, #4] 8004b7a: 681b ldr r3, [r3, #0] 8004b7c: 4a2f ldr r2, [pc, #188] @ (8004c3c ) 8004b7e: 4293 cmp r3, r2 8004b80: d125 bne.n 8004bce 8004b82: 4b29 ldr r3, [pc, #164] @ (8004c28 ) 8004b84: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004b88: f403 6340 and.w r3, r3, #3072 @ 0xc00 8004b8c: f5b3 6f40 cmp.w r3, #3072 @ 0xc00 8004b90: d017 beq.n 8004bc2 8004b92: f5b3 6f40 cmp.w r3, #3072 @ 0xc00 8004b96: d817 bhi.n 8004bc8 8004b98: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8004b9c: d00b beq.n 8004bb6 8004b9e: f5b3 6f00 cmp.w r3, #2048 @ 0x800 8004ba2: d811 bhi.n 8004bc8 8004ba4: 2b00 cmp r3, #0 8004ba6: d003 beq.n 8004bb0 8004ba8: f5b3 6f80 cmp.w r3, #1024 @ 0x400 8004bac: d006 beq.n 8004bbc 8004bae: e00b b.n 8004bc8 8004bb0: 2301 movs r3, #1 8004bb2: 77fb strb r3, [r7, #31] 8004bb4: e076 b.n 8004ca4 8004bb6: 2302 movs r3, #2 8004bb8: 77fb strb r3, [r7, #31] 8004bba: e073 b.n 8004ca4 8004bbc: 2304 movs r3, #4 8004bbe: 77fb strb r3, [r7, #31] 8004bc0: e070 b.n 8004ca4 8004bc2: 2308 movs r3, #8 8004bc4: 77fb strb r3, [r7, #31] 8004bc6: e06d b.n 8004ca4 8004bc8: 2310 movs r3, #16 8004bca: 77fb strb r3, [r7, #31] 8004bcc: e06a b.n 8004ca4 8004bce: 687b ldr r3, [r7, #4] 8004bd0: 681b ldr r3, [r3, #0] 8004bd2: 4a1b ldr r2, [pc, #108] @ (8004c40 ) 8004bd4: 4293 cmp r3, r2 8004bd6: d138 bne.n 8004c4a 8004bd8: 4b13 ldr r3, [pc, #76] @ (8004c28 ) 8004bda: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004bde: f403 5340 and.w r3, r3, #12288 @ 0x3000 8004be2: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 8004be6: d017 beq.n 8004c18 8004be8: f5b3 5f40 cmp.w r3, #12288 @ 0x3000 8004bec: d82a bhi.n 8004c44 8004bee: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8004bf2: d00b beq.n 8004c0c 8004bf4: f5b3 5f00 cmp.w r3, #8192 @ 0x2000 8004bf8: d824 bhi.n 8004c44 8004bfa: 2b00 cmp r3, #0 8004bfc: d003 beq.n 8004c06 8004bfe: f5b3 5f80 cmp.w r3, #4096 @ 0x1000 8004c02: d006 beq.n 8004c12 8004c04: e01e b.n 8004c44 8004c06: 2300 movs r3, #0 8004c08: 77fb strb r3, [r7, #31] 8004c0a: e04b b.n 8004ca4 8004c0c: 2302 movs r3, #2 8004c0e: 77fb strb r3, [r7, #31] 8004c10: e048 b.n 8004ca4 8004c12: 2304 movs r3, #4 8004c14: 77fb strb r3, [r7, #31] 8004c16: e045 b.n 8004ca4 8004c18: 2308 movs r3, #8 8004c1a: 77fb strb r3, [r7, #31] 8004c1c: e042 b.n 8004ca4 8004c1e: bf00 nop 8004c20: efff69f3 .word 0xefff69f3 8004c24: 40011000 .word 0x40011000 8004c28: 40023800 .word 0x40023800 8004c2c: 40004400 .word 0x40004400 8004c30: 40004800 .word 0x40004800 8004c34: 40004c00 .word 0x40004c00 8004c38: 40005000 .word 0x40005000 8004c3c: 40011400 .word 0x40011400 8004c40: 40007800 .word 0x40007800 8004c44: 2310 movs r3, #16 8004c46: 77fb strb r3, [r7, #31] 8004c48: e02c b.n 8004ca4 8004c4a: 687b ldr r3, [r7, #4] 8004c4c: 681b ldr r3, [r3, #0] 8004c4e: 4a72 ldr r2, [pc, #456] @ (8004e18 ) 8004c50: 4293 cmp r3, r2 8004c52: d125 bne.n 8004ca0 8004c54: 4b71 ldr r3, [pc, #452] @ (8004e1c ) 8004c56: f8d3 3090 ldr.w r3, [r3, #144] @ 0x90 8004c5a: f403 4340 and.w r3, r3, #49152 @ 0xc000 8004c5e: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 8004c62: d017 beq.n 8004c94 8004c64: f5b3 4f40 cmp.w r3, #49152 @ 0xc000 8004c68: d817 bhi.n 8004c9a 8004c6a: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8004c6e: d00b beq.n 8004c88 8004c70: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8004c74: d811 bhi.n 8004c9a 8004c76: 2b00 cmp r3, #0 8004c78: d003 beq.n 8004c82 8004c7a: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 8004c7e: d006 beq.n 8004c8e 8004c80: e00b b.n 8004c9a 8004c82: 2300 movs r3, #0 8004c84: 77fb strb r3, [r7, #31] 8004c86: e00d b.n 8004ca4 8004c88: 2302 movs r3, #2 8004c8a: 77fb strb r3, [r7, #31] 8004c8c: e00a b.n 8004ca4 8004c8e: 2304 movs r3, #4 8004c90: 77fb strb r3, [r7, #31] 8004c92: e007 b.n 8004ca4 8004c94: 2308 movs r3, #8 8004c96: 77fb strb r3, [r7, #31] 8004c98: e004 b.n 8004ca4 8004c9a: 2310 movs r3, #16 8004c9c: 77fb strb r3, [r7, #31] 8004c9e: e001 b.n 8004ca4 8004ca0: 2310 movs r3, #16 8004ca2: 77fb strb r3, [r7, #31] if (huart->Init.OverSampling == UART_OVERSAMPLING_8) 8004ca4: 687b ldr r3, [r7, #4] 8004ca6: 69db ldr r3, [r3, #28] 8004ca8: f5b3 4f00 cmp.w r3, #32768 @ 0x8000 8004cac: d15b bne.n 8004d66 { switch (clocksource) 8004cae: 7ffb ldrb r3, [r7, #31] 8004cb0: 2b08 cmp r3, #8 8004cb2: d828 bhi.n 8004d06 8004cb4: a201 add r2, pc, #4 @ (adr r2, 8004cbc ) 8004cb6: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004cba: bf00 nop 8004cbc: 08004ce1 .word 0x08004ce1 8004cc0: 08004ce9 .word 0x08004ce9 8004cc4: 08004cf1 .word 0x08004cf1 8004cc8: 08004d07 .word 0x08004d07 8004ccc: 08004cf7 .word 0x08004cf7 8004cd0: 08004d07 .word 0x08004d07 8004cd4: 08004d07 .word 0x08004d07 8004cd8: 08004d07 .word 0x08004d07 8004cdc: 08004cff .word 0x08004cff { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); 8004ce0: f7fe feaa bl 8003a38 8004ce4: 61b8 str r0, [r7, #24] break; 8004ce6: e013 b.n 8004d10 case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); 8004ce8: f7fe feba bl 8003a60 8004cec: 61b8 str r0, [r7, #24] break; 8004cee: e00f b.n 8004d10 case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; 8004cf0: 4b4b ldr r3, [pc, #300] @ (8004e20 ) 8004cf2: 61bb str r3, [r7, #24] break; 8004cf4: e00c b.n 8004d10 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); 8004cf6: f7fe fdcd bl 8003894 8004cfa: 61b8 str r0, [r7, #24] break; 8004cfc: e008 b.n 8004d10 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; 8004cfe: f44f 4300 mov.w r3, #32768 @ 0x8000 8004d02: 61bb str r3, [r7, #24] break; 8004d04: e004 b.n 8004d10 default: pclk = 0U; 8004d06: 2300 movs r3, #0 8004d08: 61bb str r3, [r7, #24] ret = HAL_ERROR; 8004d0a: 2301 movs r3, #1 8004d0c: 77bb strb r3, [r7, #30] break; 8004d0e: bf00 nop } /* USARTDIV must be greater than or equal to 0d16 */ if (pclk != 0U) 8004d10: 69bb ldr r3, [r7, #24] 8004d12: 2b00 cmp r3, #0 8004d14: d074 beq.n 8004e00 { usartdiv = (uint32_t)(UART_DIV_SAMPLING8(pclk, huart->Init.BaudRate)); 8004d16: 69bb ldr r3, [r7, #24] 8004d18: 005a lsls r2, r3, #1 8004d1a: 687b ldr r3, [r7, #4] 8004d1c: 685b ldr r3, [r3, #4] 8004d1e: 085b lsrs r3, r3, #1 8004d20: 441a add r2, r3 8004d22: 687b ldr r3, [r7, #4] 8004d24: 685b ldr r3, [r3, #4] 8004d26: fbb2 f3f3 udiv r3, r2, r3 8004d2a: 613b str r3, [r7, #16] if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 8004d2c: 693b ldr r3, [r7, #16] 8004d2e: 2b0f cmp r3, #15 8004d30: d916 bls.n 8004d60 8004d32: 693b ldr r3, [r7, #16] 8004d34: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8004d38: d212 bcs.n 8004d60 { brrtemp = (uint16_t)(usartdiv & 0xFFF0U); 8004d3a: 693b ldr r3, [r7, #16] 8004d3c: b29b uxth r3, r3 8004d3e: f023 030f bic.w r3, r3, #15 8004d42: 81fb strh r3, [r7, #14] brrtemp |= (uint16_t)((usartdiv & (uint16_t)0x000FU) >> 1U); 8004d44: 693b ldr r3, [r7, #16] 8004d46: 085b lsrs r3, r3, #1 8004d48: b29b uxth r3, r3 8004d4a: f003 0307 and.w r3, r3, #7 8004d4e: b29a uxth r2, r3 8004d50: 89fb ldrh r3, [r7, #14] 8004d52: 4313 orrs r3, r2 8004d54: 81fb strh r3, [r7, #14] huart->Instance->BRR = brrtemp; 8004d56: 687b ldr r3, [r7, #4] 8004d58: 681b ldr r3, [r3, #0] 8004d5a: 89fa ldrh r2, [r7, #14] 8004d5c: 60da str r2, [r3, #12] 8004d5e: e04f b.n 8004e00 } else { ret = HAL_ERROR; 8004d60: 2301 movs r3, #1 8004d62: 77bb strb r3, [r7, #30] 8004d64: e04c b.n 8004e00 } } } else { switch (clocksource) 8004d66: 7ffb ldrb r3, [r7, #31] 8004d68: 2b08 cmp r3, #8 8004d6a: d828 bhi.n 8004dbe 8004d6c: a201 add r2, pc, #4 @ (adr r2, 8004d74 ) 8004d6e: f852 f023 ldr.w pc, [r2, r3, lsl #2] 8004d72: bf00 nop 8004d74: 08004d99 .word 0x08004d99 8004d78: 08004da1 .word 0x08004da1 8004d7c: 08004da9 .word 0x08004da9 8004d80: 08004dbf .word 0x08004dbf 8004d84: 08004daf .word 0x08004daf 8004d88: 08004dbf .word 0x08004dbf 8004d8c: 08004dbf .word 0x08004dbf 8004d90: 08004dbf .word 0x08004dbf 8004d94: 08004db7 .word 0x08004db7 { case UART_CLOCKSOURCE_PCLK1: pclk = HAL_RCC_GetPCLK1Freq(); 8004d98: f7fe fe4e bl 8003a38 8004d9c: 61b8 str r0, [r7, #24] break; 8004d9e: e013 b.n 8004dc8 case UART_CLOCKSOURCE_PCLK2: pclk = HAL_RCC_GetPCLK2Freq(); 8004da0: f7fe fe5e bl 8003a60 8004da4: 61b8 str r0, [r7, #24] break; 8004da6: e00f b.n 8004dc8 case UART_CLOCKSOURCE_HSI: pclk = (uint32_t) HSI_VALUE; 8004da8: 4b1d ldr r3, [pc, #116] @ (8004e20 ) 8004daa: 61bb str r3, [r7, #24] break; 8004dac: e00c b.n 8004dc8 case UART_CLOCKSOURCE_SYSCLK: pclk = HAL_RCC_GetSysClockFreq(); 8004dae: f7fe fd71 bl 8003894 8004db2: 61b8 str r0, [r7, #24] break; 8004db4: e008 b.n 8004dc8 case UART_CLOCKSOURCE_LSE: pclk = (uint32_t) LSE_VALUE; 8004db6: f44f 4300 mov.w r3, #32768 @ 0x8000 8004dba: 61bb str r3, [r7, #24] break; 8004dbc: e004 b.n 8004dc8 default: pclk = 0U; 8004dbe: 2300 movs r3, #0 8004dc0: 61bb str r3, [r7, #24] ret = HAL_ERROR; 8004dc2: 2301 movs r3, #1 8004dc4: 77bb strb r3, [r7, #30] break; 8004dc6: bf00 nop } if (pclk != 0U) 8004dc8: 69bb ldr r3, [r7, #24] 8004dca: 2b00 cmp r3, #0 8004dcc: d018 beq.n 8004e00 { /* USARTDIV must be greater than or equal to 0d16 */ usartdiv = (uint32_t)(UART_DIV_SAMPLING16(pclk, huart->Init.BaudRate)); 8004dce: 687b ldr r3, [r7, #4] 8004dd0: 685b ldr r3, [r3, #4] 8004dd2: 085a lsrs r2, r3, #1 8004dd4: 69bb ldr r3, [r7, #24] 8004dd6: 441a add r2, r3 8004dd8: 687b ldr r3, [r7, #4] 8004dda: 685b ldr r3, [r3, #4] 8004ddc: fbb2 f3f3 udiv r3, r2, r3 8004de0: 613b str r3, [r7, #16] if ((usartdiv >= UART_BRR_MIN) && (usartdiv <= UART_BRR_MAX)) 8004de2: 693b ldr r3, [r7, #16] 8004de4: 2b0f cmp r3, #15 8004de6: d909 bls.n 8004dfc 8004de8: 693b ldr r3, [r7, #16] 8004dea: f5b3 3f80 cmp.w r3, #65536 @ 0x10000 8004dee: d205 bcs.n 8004dfc { huart->Instance->BRR = (uint16_t)usartdiv; 8004df0: 693b ldr r3, [r7, #16] 8004df2: b29a uxth r2, r3 8004df4: 687b ldr r3, [r7, #4] 8004df6: 681b ldr r3, [r3, #0] 8004df8: 60da str r2, [r3, #12] 8004dfa: e001 b.n 8004e00 } else { ret = HAL_ERROR; 8004dfc: 2301 movs r3, #1 8004dfe: 77bb strb r3, [r7, #30] } } /* Clear ISR function pointers */ huart->RxISR = NULL; 8004e00: 687b ldr r3, [r7, #4] 8004e02: 2200 movs r2, #0 8004e04: 669a str r2, [r3, #104] @ 0x68 huart->TxISR = NULL; 8004e06: 687b ldr r3, [r7, #4] 8004e08: 2200 movs r2, #0 8004e0a: 66da str r2, [r3, #108] @ 0x6c return ret; 8004e0c: 7fbb ldrb r3, [r7, #30] } 8004e0e: 4618 mov r0, r3 8004e10: 3720 adds r7, #32 8004e12: 46bd mov sp, r7 8004e14: bd80 pop {r7, pc} 8004e16: bf00 nop 8004e18: 40007c00 .word 0x40007c00 8004e1c: 40023800 .word 0x40023800 8004e20: 00f42400 .word 0x00f42400 08004e24 : * @brief Configure the UART peripheral advanced features. * @param huart UART handle. * @retval None */ void UART_AdvFeatureConfig(UART_HandleTypeDef *huart) { 8004e24: b480 push {r7} 8004e26: b083 sub sp, #12 8004e28: af00 add r7, sp, #0 8004e2a: 6078 str r0, [r7, #4] /* Check whether the set of advanced features to configure is properly set */ assert_param(IS_UART_ADVFEATURE_INIT(huart->AdvancedInit.AdvFeatureInit)); /* if required, configure RX/TX pins swap */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_SWAP_INIT)) 8004e2c: 687b ldr r3, [r7, #4] 8004e2e: 6a5b ldr r3, [r3, #36] @ 0x24 8004e30: f003 0308 and.w r3, r3, #8 8004e34: 2b00 cmp r3, #0 8004e36: d00a beq.n 8004e4e { assert_param(IS_UART_ADVFEATURE_SWAP(huart->AdvancedInit.Swap)); MODIFY_REG(huart->Instance->CR2, USART_CR2_SWAP, huart->AdvancedInit.Swap); 8004e38: 687b ldr r3, [r7, #4] 8004e3a: 681b ldr r3, [r3, #0] 8004e3c: 685b ldr r3, [r3, #4] 8004e3e: f423 4100 bic.w r1, r3, #32768 @ 0x8000 8004e42: 687b ldr r3, [r7, #4] 8004e44: 6b5a ldr r2, [r3, #52] @ 0x34 8004e46: 687b ldr r3, [r7, #4] 8004e48: 681b ldr r3, [r3, #0] 8004e4a: 430a orrs r2, r1 8004e4c: 605a str r2, [r3, #4] } /* if required, configure TX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_TXINVERT_INIT)) 8004e4e: 687b ldr r3, [r7, #4] 8004e50: 6a5b ldr r3, [r3, #36] @ 0x24 8004e52: f003 0301 and.w r3, r3, #1 8004e56: 2b00 cmp r3, #0 8004e58: d00a beq.n 8004e70 { assert_param(IS_UART_ADVFEATURE_TXINV(huart->AdvancedInit.TxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_TXINV, huart->AdvancedInit.TxPinLevelInvert); 8004e5a: 687b ldr r3, [r7, #4] 8004e5c: 681b ldr r3, [r3, #0] 8004e5e: 685b ldr r3, [r3, #4] 8004e60: f423 3100 bic.w r1, r3, #131072 @ 0x20000 8004e64: 687b ldr r3, [r7, #4] 8004e66: 6a9a ldr r2, [r3, #40] @ 0x28 8004e68: 687b ldr r3, [r7, #4] 8004e6a: 681b ldr r3, [r3, #0] 8004e6c: 430a orrs r2, r1 8004e6e: 605a str r2, [r3, #4] } /* if required, configure RX pin active level inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXINVERT_INIT)) 8004e70: 687b ldr r3, [r7, #4] 8004e72: 6a5b ldr r3, [r3, #36] @ 0x24 8004e74: f003 0302 and.w r3, r3, #2 8004e78: 2b00 cmp r3, #0 8004e7a: d00a beq.n 8004e92 { assert_param(IS_UART_ADVFEATURE_RXINV(huart->AdvancedInit.RxPinLevelInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_RXINV, huart->AdvancedInit.RxPinLevelInvert); 8004e7c: 687b ldr r3, [r7, #4] 8004e7e: 681b ldr r3, [r3, #0] 8004e80: 685b ldr r3, [r3, #4] 8004e82: f423 3180 bic.w r1, r3, #65536 @ 0x10000 8004e86: 687b ldr r3, [r7, #4] 8004e88: 6ada ldr r2, [r3, #44] @ 0x2c 8004e8a: 687b ldr r3, [r7, #4] 8004e8c: 681b ldr r3, [r3, #0] 8004e8e: 430a orrs r2, r1 8004e90: 605a str r2, [r3, #4] } /* if required, configure data inversion */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DATAINVERT_INIT)) 8004e92: 687b ldr r3, [r7, #4] 8004e94: 6a5b ldr r3, [r3, #36] @ 0x24 8004e96: f003 0304 and.w r3, r3, #4 8004e9a: 2b00 cmp r3, #0 8004e9c: d00a beq.n 8004eb4 { assert_param(IS_UART_ADVFEATURE_DATAINV(huart->AdvancedInit.DataInvert)); MODIFY_REG(huart->Instance->CR2, USART_CR2_DATAINV, huart->AdvancedInit.DataInvert); 8004e9e: 687b ldr r3, [r7, #4] 8004ea0: 681b ldr r3, [r3, #0] 8004ea2: 685b ldr r3, [r3, #4] 8004ea4: f423 2180 bic.w r1, r3, #262144 @ 0x40000 8004ea8: 687b ldr r3, [r7, #4] 8004eaa: 6b1a ldr r2, [r3, #48] @ 0x30 8004eac: 687b ldr r3, [r7, #4] 8004eae: 681b ldr r3, [r3, #0] 8004eb0: 430a orrs r2, r1 8004eb2: 605a str r2, [r3, #4] } /* if required, configure RX overrun detection disabling */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_RXOVERRUNDISABLE_INIT)) 8004eb4: 687b ldr r3, [r7, #4] 8004eb6: 6a5b ldr r3, [r3, #36] @ 0x24 8004eb8: f003 0310 and.w r3, r3, #16 8004ebc: 2b00 cmp r3, #0 8004ebe: d00a beq.n 8004ed6 { assert_param(IS_UART_OVERRUN(huart->AdvancedInit.OverrunDisable)); MODIFY_REG(huart->Instance->CR3, USART_CR3_OVRDIS, huart->AdvancedInit.OverrunDisable); 8004ec0: 687b ldr r3, [r7, #4] 8004ec2: 681b ldr r3, [r3, #0] 8004ec4: 689b ldr r3, [r3, #8] 8004ec6: f423 5180 bic.w r1, r3, #4096 @ 0x1000 8004eca: 687b ldr r3, [r7, #4] 8004ecc: 6b9a ldr r2, [r3, #56] @ 0x38 8004ece: 687b ldr r3, [r7, #4] 8004ed0: 681b ldr r3, [r3, #0] 8004ed2: 430a orrs r2, r1 8004ed4: 609a str r2, [r3, #8] } /* if required, configure DMA disabling on reception error */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_DMADISABLEONERROR_INIT)) 8004ed6: 687b ldr r3, [r7, #4] 8004ed8: 6a5b ldr r3, [r3, #36] @ 0x24 8004eda: f003 0320 and.w r3, r3, #32 8004ede: 2b00 cmp r3, #0 8004ee0: d00a beq.n 8004ef8 { assert_param(IS_UART_ADVFEATURE_DMAONRXERROR(huart->AdvancedInit.DMADisableonRxError)); MODIFY_REG(huart->Instance->CR3, USART_CR3_DDRE, huart->AdvancedInit.DMADisableonRxError); 8004ee2: 687b ldr r3, [r7, #4] 8004ee4: 681b ldr r3, [r3, #0] 8004ee6: 689b ldr r3, [r3, #8] 8004ee8: f423 5100 bic.w r1, r3, #8192 @ 0x2000 8004eec: 687b ldr r3, [r7, #4] 8004eee: 6bda ldr r2, [r3, #60] @ 0x3c 8004ef0: 687b ldr r3, [r7, #4] 8004ef2: 681b ldr r3, [r3, #0] 8004ef4: 430a orrs r2, r1 8004ef6: 609a str r2, [r3, #8] } /* if required, configure auto Baud rate detection scheme */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_AUTOBAUDRATE_INIT)) 8004ef8: 687b ldr r3, [r7, #4] 8004efa: 6a5b ldr r3, [r3, #36] @ 0x24 8004efc: f003 0340 and.w r3, r3, #64 @ 0x40 8004f00: 2b00 cmp r3, #0 8004f02: d01a beq.n 8004f3a { assert_param(IS_USART_AUTOBAUDRATE_DETECTION_INSTANCE(huart->Instance)); assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATE(huart->AdvancedInit.AutoBaudRateEnable)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABREN, huart->AdvancedInit.AutoBaudRateEnable); 8004f04: 687b ldr r3, [r7, #4] 8004f06: 681b ldr r3, [r3, #0] 8004f08: 685b ldr r3, [r3, #4] 8004f0a: f423 1180 bic.w r1, r3, #1048576 @ 0x100000 8004f0e: 687b ldr r3, [r7, #4] 8004f10: 6c1a ldr r2, [r3, #64] @ 0x40 8004f12: 687b ldr r3, [r7, #4] 8004f14: 681b ldr r3, [r3, #0] 8004f16: 430a orrs r2, r1 8004f18: 605a str r2, [r3, #4] /* set auto Baudrate detection parameters if detection is enabled */ if (huart->AdvancedInit.AutoBaudRateEnable == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE) 8004f1a: 687b ldr r3, [r7, #4] 8004f1c: 6c1b ldr r3, [r3, #64] @ 0x40 8004f1e: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8004f22: d10a bne.n 8004f3a { assert_param(IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(huart->AdvancedInit.AutoBaudRateMode)); MODIFY_REG(huart->Instance->CR2, USART_CR2_ABRMODE, huart->AdvancedInit.AutoBaudRateMode); 8004f24: 687b ldr r3, [r7, #4] 8004f26: 681b ldr r3, [r3, #0] 8004f28: 685b ldr r3, [r3, #4] 8004f2a: f423 01c0 bic.w r1, r3, #6291456 @ 0x600000 8004f2e: 687b ldr r3, [r7, #4] 8004f30: 6c5a ldr r2, [r3, #68] @ 0x44 8004f32: 687b ldr r3, [r7, #4] 8004f34: 681b ldr r3, [r3, #0] 8004f36: 430a orrs r2, r1 8004f38: 605a str r2, [r3, #4] } } /* if required, configure MSB first on communication line */ if (HAL_IS_BIT_SET(huart->AdvancedInit.AdvFeatureInit, UART_ADVFEATURE_MSBFIRST_INIT)) 8004f3a: 687b ldr r3, [r7, #4] 8004f3c: 6a5b ldr r3, [r3, #36] @ 0x24 8004f3e: f003 0380 and.w r3, r3, #128 @ 0x80 8004f42: 2b00 cmp r3, #0 8004f44: d00a beq.n 8004f5c { assert_param(IS_UART_ADVFEATURE_MSBFIRST(huart->AdvancedInit.MSBFirst)); MODIFY_REG(huart->Instance->CR2, USART_CR2_MSBFIRST, huart->AdvancedInit.MSBFirst); 8004f46: 687b ldr r3, [r7, #4] 8004f48: 681b ldr r3, [r3, #0] 8004f4a: 685b ldr r3, [r3, #4] 8004f4c: f423 2100 bic.w r1, r3, #524288 @ 0x80000 8004f50: 687b ldr r3, [r7, #4] 8004f52: 6c9a ldr r2, [r3, #72] @ 0x48 8004f54: 687b ldr r3, [r7, #4] 8004f56: 681b ldr r3, [r3, #0] 8004f58: 430a orrs r2, r1 8004f5a: 605a str r2, [r3, #4] } } 8004f5c: bf00 nop 8004f5e: 370c adds r7, #12 8004f60: 46bd mov sp, r7 8004f62: f85d 7b04 ldr.w r7, [sp], #4 8004f66: 4770 bx lr 08004f68 : * @brief Check the UART Idle State. * @param huart UART handle. * @retval HAL status */ HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart) { 8004f68: b580 push {r7, lr} 8004f6a: b08c sub sp, #48 @ 0x30 8004f6c: af02 add r7, sp, #8 8004f6e: 6078 str r0, [r7, #4] uint32_t tickstart; /* Initialize the UART ErrorCode */ huart->ErrorCode = HAL_UART_ERROR_NONE; 8004f70: 687b ldr r3, [r7, #4] 8004f72: 2200 movs r2, #0 8004f74: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Init tickstart for timeout management */ tickstart = HAL_GetTick(); 8004f78: f7fd f918 bl 80021ac 8004f7c: 6278 str r0, [r7, #36] @ 0x24 /* Check if the Transmitter is enabled */ if ((huart->Instance->CR1 & USART_CR1_TE) == USART_CR1_TE) 8004f7e: 687b ldr r3, [r7, #4] 8004f80: 681b ldr r3, [r3, #0] 8004f82: 681b ldr r3, [r3, #0] 8004f84: f003 0308 and.w r3, r3, #8 8004f88: 2b08 cmp r3, #8 8004f8a: d12e bne.n 8004fea { /* Wait until TEACK flag is set */ if (UART_WaitOnFlagUntilTimeout(huart, USART_ISR_TEACK, RESET, tickstart, HAL_UART_TIMEOUT_VALUE) != HAL_OK) 8004f8c: f06f 437e mvn.w r3, #4261412864 @ 0xfe000000 8004f90: 9300 str r3, [sp, #0] 8004f92: 6a7b ldr r3, [r7, #36] @ 0x24 8004f94: 2200 movs r2, #0 8004f96: f44f 1100 mov.w r1, #2097152 @ 0x200000 8004f9a: 6878 ldr r0, [r7, #4] 8004f9c: f000 f83b bl 8005016 8004fa0: 4603 mov r3, r0 8004fa2: 2b00 cmp r3, #0 8004fa4: d021 beq.n 8004fea { /* Disable TXE interrupt for the interrupt process */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_TXEIE)); 8004fa6: 687b ldr r3, [r7, #4] 8004fa8: 681b ldr r3, [r3, #0] 8004faa: 613b str r3, [r7, #16] */ __STATIC_FORCEINLINE uint32_t __LDREXW(volatile uint32_t *addr) { uint32_t result; __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8004fac: 693b ldr r3, [r7, #16] 8004fae: e853 3f00 ldrex r3, [r3] 8004fb2: 60fb str r3, [r7, #12] return(result); 8004fb4: 68fb ldr r3, [r7, #12] 8004fb6: f023 0380 bic.w r3, r3, #128 @ 0x80 8004fba: 623b str r3, [r7, #32] 8004fbc: 687b ldr r3, [r7, #4] 8004fbe: 681b ldr r3, [r3, #0] 8004fc0: 461a mov r2, r3 8004fc2: 6a3b ldr r3, [r7, #32] 8004fc4: 61fb str r3, [r7, #28] 8004fc6: 61ba str r2, [r7, #24] */ __STATIC_FORCEINLINE uint32_t __STREXW(uint32_t value, volatile uint32_t *addr) { uint32_t result; __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8004fc8: 69b9 ldr r1, [r7, #24] 8004fca: 69fa ldr r2, [r7, #28] 8004fcc: e841 2300 strex r3, r2, [r1] 8004fd0: 617b str r3, [r7, #20] return(result); 8004fd2: 697b ldr r3, [r7, #20] 8004fd4: 2b00 cmp r3, #0 8004fd6: d1e6 bne.n 8004fa6 huart->gState = HAL_UART_STATE_READY; 8004fd8: 687b ldr r3, [r7, #4] 8004fda: 2220 movs r2, #32 8004fdc: 67da str r2, [r3, #124] @ 0x7c __HAL_UNLOCK(huart); 8004fde: 687b ldr r3, [r7, #4] 8004fe0: 2200 movs r2, #0 8004fe2: f883 2078 strb.w r2, [r3, #120] @ 0x78 /* Timeout occurred */ return HAL_TIMEOUT; 8004fe6: 2303 movs r3, #3 8004fe8: e011 b.n 800500e } } #endif /* USART_ISR_REACK */ /* Initialize the UART State */ huart->gState = HAL_UART_STATE_READY; 8004fea: 687b ldr r3, [r7, #4] 8004fec: 2220 movs r2, #32 8004fee: 67da str r2, [r3, #124] @ 0x7c huart->RxState = HAL_UART_STATE_READY; 8004ff0: 687b ldr r3, [r7, #4] 8004ff2: 2220 movs r2, #32 8004ff4: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 8004ff8: 687b ldr r3, [r7, #4] 8004ffa: 2200 movs r2, #0 8004ffc: 661a str r2, [r3, #96] @ 0x60 huart->RxEventType = HAL_UART_RXEVENT_TC; 8004ffe: 687b ldr r3, [r7, #4] 8005000: 2200 movs r2, #0 8005002: 665a str r2, [r3, #100] @ 0x64 __HAL_UNLOCK(huart); 8005004: 687b ldr r3, [r7, #4] 8005006: 2200 movs r2, #0 8005008: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_OK; 800500c: 2300 movs r3, #0 } 800500e: 4618 mov r0, r3 8005010: 3728 adds r7, #40 @ 0x28 8005012: 46bd mov sp, r7 8005014: bd80 pop {r7, pc} 08005016 : * @param Timeout Timeout duration * @retval HAL status */ HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status, uint32_t Tickstart, uint32_t Timeout) { 8005016: b580 push {r7, lr} 8005018: b084 sub sp, #16 800501a: af00 add r7, sp, #0 800501c: 60f8 str r0, [r7, #12] 800501e: 60b9 str r1, [r7, #8] 8005020: 603b str r3, [r7, #0] 8005022: 4613 mov r3, r2 8005024: 71fb strb r3, [r7, #7] /* Wait until flag is set */ while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 8005026: e04f b.n 80050c8 { /* Check for the Timeout */ if (Timeout != HAL_MAX_DELAY) 8005028: 69bb ldr r3, [r7, #24] 800502a: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 800502e: d04b beq.n 80050c8 { if (((HAL_GetTick() - Tickstart) > Timeout) || (Timeout == 0U)) 8005030: f7fd f8bc bl 80021ac 8005034: 4602 mov r2, r0 8005036: 683b ldr r3, [r7, #0] 8005038: 1ad3 subs r3, r2, r3 800503a: 69ba ldr r2, [r7, #24] 800503c: 429a cmp r2, r3 800503e: d302 bcc.n 8005046 8005040: 69bb ldr r3, [r7, #24] 8005042: 2b00 cmp r3, #0 8005044: d101 bne.n 800504a { return HAL_TIMEOUT; 8005046: 2303 movs r3, #3 8005048: e04e b.n 80050e8 } if ((READ_BIT(huart->Instance->CR1, USART_CR1_RE) != 0U) && (Flag != UART_FLAG_TXE) && (Flag != UART_FLAG_TC)) 800504a: 68fb ldr r3, [r7, #12] 800504c: 681b ldr r3, [r3, #0] 800504e: 681b ldr r3, [r3, #0] 8005050: f003 0304 and.w r3, r3, #4 8005054: 2b00 cmp r3, #0 8005056: d037 beq.n 80050c8 8005058: 68bb ldr r3, [r7, #8] 800505a: 2b80 cmp r3, #128 @ 0x80 800505c: d034 beq.n 80050c8 800505e: 68bb ldr r3, [r7, #8] 8005060: 2b40 cmp r3, #64 @ 0x40 8005062: d031 beq.n 80050c8 { if (__HAL_UART_GET_FLAG(huart, UART_FLAG_ORE) == SET) 8005064: 68fb ldr r3, [r7, #12] 8005066: 681b ldr r3, [r3, #0] 8005068: 69db ldr r3, [r3, #28] 800506a: f003 0308 and.w r3, r3, #8 800506e: 2b08 cmp r3, #8 8005070: d110 bne.n 8005094 { /* Clear Overrun Error flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_OREF); 8005072: 68fb ldr r3, [r7, #12] 8005074: 681b ldr r3, [r3, #0] 8005076: 2208 movs r2, #8 8005078: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 800507a: 68f8 ldr r0, [r7, #12] 800507c: f000 f838 bl 80050f0 huart->ErrorCode = HAL_UART_ERROR_ORE; 8005080: 68fb ldr r3, [r7, #12] 8005082: 2208 movs r2, #8 8005084: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); 8005088: 68fb ldr r3, [r7, #12] 800508a: 2200 movs r2, #0 800508c: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_ERROR; 8005090: 2301 movs r3, #1 8005092: e029 b.n 80050e8 } if (__HAL_UART_GET_FLAG(huart, UART_FLAG_RTOF) == SET) 8005094: 68fb ldr r3, [r7, #12] 8005096: 681b ldr r3, [r3, #0] 8005098: 69db ldr r3, [r3, #28] 800509a: f403 6300 and.w r3, r3, #2048 @ 0x800 800509e: f5b3 6f00 cmp.w r3, #2048 @ 0x800 80050a2: d111 bne.n 80050c8 { /* Clear Receiver Timeout flag*/ __HAL_UART_CLEAR_FLAG(huart, UART_CLEAR_RTOF); 80050a4: 68fb ldr r3, [r7, #12] 80050a6: 681b ldr r3, [r3, #0] 80050a8: f44f 6200 mov.w r2, #2048 @ 0x800 80050ac: 621a str r2, [r3, #32] /* Blocking error : transfer is aborted Set the UART state ready to be able to start again the process, Disable Rx Interrupts if ongoing */ UART_EndRxTransfer(huart); 80050ae: 68f8 ldr r0, [r7, #12] 80050b0: f000 f81e bl 80050f0 huart->ErrorCode = HAL_UART_ERROR_RTO; 80050b4: 68fb ldr r3, [r7, #12] 80050b6: 2220 movs r2, #32 80050b8: f8c3 2084 str.w r2, [r3, #132] @ 0x84 /* Process Unlocked */ __HAL_UNLOCK(huart); 80050bc: 68fb ldr r3, [r7, #12] 80050be: 2200 movs r2, #0 80050c0: f883 2078 strb.w r2, [r3, #120] @ 0x78 return HAL_TIMEOUT; 80050c4: 2303 movs r3, #3 80050c6: e00f b.n 80050e8 while ((__HAL_UART_GET_FLAG(huart, Flag) ? SET : RESET) == Status) 80050c8: 68fb ldr r3, [r7, #12] 80050ca: 681b ldr r3, [r3, #0] 80050cc: 69da ldr r2, [r3, #28] 80050ce: 68bb ldr r3, [r7, #8] 80050d0: 4013 ands r3, r2 80050d2: 68ba ldr r2, [r7, #8] 80050d4: 429a cmp r2, r3 80050d6: bf0c ite eq 80050d8: 2301 moveq r3, #1 80050da: 2300 movne r3, #0 80050dc: b2db uxtb r3, r3 80050de: 461a mov r2, r3 80050e0: 79fb ldrb r3, [r7, #7] 80050e2: 429a cmp r2, r3 80050e4: d0a0 beq.n 8005028 } } } } return HAL_OK; 80050e6: 2300 movs r3, #0 } 80050e8: 4618 mov r0, r3 80050ea: 3710 adds r7, #16 80050ec: 46bd mov sp, r7 80050ee: bd80 pop {r7, pc} 080050f0 : * @brief End ongoing Rx transfer on UART peripheral (following error detection or Reception completion). * @param huart UART handle. * @retval None */ static void UART_EndRxTransfer(UART_HandleTypeDef *huart) { 80050f0: b480 push {r7} 80050f2: b095 sub sp, #84 @ 0x54 80050f4: af00 add r7, sp, #0 80050f6: 6078 str r0, [r7, #4] /* Disable RXNE, PE and ERR (Frame error, noise error, overrun error) interrupts */ ATOMIC_CLEAR_BIT(huart->Instance->CR1, (USART_CR1_RXNEIE | USART_CR1_PEIE)); 80050f8: 687b ldr r3, [r7, #4] 80050fa: 681b ldr r3, [r3, #0] 80050fc: 637b str r3, [r7, #52] @ 0x34 __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 80050fe: 6b7b ldr r3, [r7, #52] @ 0x34 8005100: e853 3f00 ldrex r3, [r3] 8005104: 633b str r3, [r7, #48] @ 0x30 return(result); 8005106: 6b3b ldr r3, [r7, #48] @ 0x30 8005108: f423 7390 bic.w r3, r3, #288 @ 0x120 800510c: 64fb str r3, [r7, #76] @ 0x4c 800510e: 687b ldr r3, [r7, #4] 8005110: 681b ldr r3, [r3, #0] 8005112: 461a mov r2, r3 8005114: 6cfb ldr r3, [r7, #76] @ 0x4c 8005116: 643b str r3, [r7, #64] @ 0x40 8005118: 63fa str r2, [r7, #60] @ 0x3c __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800511a: 6bf9 ldr r1, [r7, #60] @ 0x3c 800511c: 6c3a ldr r2, [r7, #64] @ 0x40 800511e: e841 2300 strex r3, r2, [r1] 8005122: 63bb str r3, [r7, #56] @ 0x38 return(result); 8005124: 6bbb ldr r3, [r7, #56] @ 0x38 8005126: 2b00 cmp r3, #0 8005128: d1e6 bne.n 80050f8 ATOMIC_CLEAR_BIT(huart->Instance->CR3, USART_CR3_EIE); 800512a: 687b ldr r3, [r7, #4] 800512c: 681b ldr r3, [r3, #0] 800512e: 3308 adds r3, #8 8005130: 623b str r3, [r7, #32] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 8005132: 6a3b ldr r3, [r7, #32] 8005134: e853 3f00 ldrex r3, [r3] 8005138: 61fb str r3, [r7, #28] return(result); 800513a: 69fb ldr r3, [r7, #28] 800513c: f023 0301 bic.w r3, r3, #1 8005140: 64bb str r3, [r7, #72] @ 0x48 8005142: 687b ldr r3, [r7, #4] 8005144: 681b ldr r3, [r3, #0] 8005146: 3308 adds r3, #8 8005148: 6cba ldr r2, [r7, #72] @ 0x48 800514a: 62fa str r2, [r7, #44] @ 0x2c 800514c: 62bb str r3, [r7, #40] @ 0x28 __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 800514e: 6ab9 ldr r1, [r7, #40] @ 0x28 8005150: 6afa ldr r2, [r7, #44] @ 0x2c 8005152: e841 2300 strex r3, r2, [r1] 8005156: 627b str r3, [r7, #36] @ 0x24 return(result); 8005158: 6a7b ldr r3, [r7, #36] @ 0x24 800515a: 2b00 cmp r3, #0 800515c: d1e5 bne.n 800512a /* In case of reception waiting for IDLE event, disable also the IDLE IE interrupt source */ if (huart->ReceptionType == HAL_UART_RECEPTION_TOIDLE) 800515e: 687b ldr r3, [r7, #4] 8005160: 6e1b ldr r3, [r3, #96] @ 0x60 8005162: 2b01 cmp r3, #1 8005164: d118 bne.n 8005198 { ATOMIC_CLEAR_BIT(huart->Instance->CR1, USART_CR1_IDLEIE); 8005166: 687b ldr r3, [r7, #4] 8005168: 681b ldr r3, [r3, #0] 800516a: 60fb str r3, [r7, #12] __ASM volatile ("ldrex %0, %1" : "=r" (result) : "Q" (*addr) ); 800516c: 68fb ldr r3, [r7, #12] 800516e: e853 3f00 ldrex r3, [r3] 8005172: 60bb str r3, [r7, #8] return(result); 8005174: 68bb ldr r3, [r7, #8] 8005176: f023 0310 bic.w r3, r3, #16 800517a: 647b str r3, [r7, #68] @ 0x44 800517c: 687b ldr r3, [r7, #4] 800517e: 681b ldr r3, [r3, #0] 8005180: 461a mov r2, r3 8005182: 6c7b ldr r3, [r7, #68] @ 0x44 8005184: 61bb str r3, [r7, #24] 8005186: 617a str r2, [r7, #20] __ASM volatile ("strex %0, %2, %1" : "=&r" (result), "=Q" (*addr) : "r" (value) ); 8005188: 6979 ldr r1, [r7, #20] 800518a: 69ba ldr r2, [r7, #24] 800518c: e841 2300 strex r3, r2, [r1] 8005190: 613b str r3, [r7, #16] return(result); 8005192: 693b ldr r3, [r7, #16] 8005194: 2b00 cmp r3, #0 8005196: d1e6 bne.n 8005166 } /* At end of Rx process, restore huart->RxState to Ready */ huart->RxState = HAL_UART_STATE_READY; 8005198: 687b ldr r3, [r7, #4] 800519a: 2220 movs r2, #32 800519c: f8c3 2080 str.w r2, [r3, #128] @ 0x80 huart->ReceptionType = HAL_UART_RECEPTION_STANDARD; 80051a0: 687b ldr r3, [r7, #4] 80051a2: 2200 movs r2, #0 80051a4: 661a str r2, [r3, #96] @ 0x60 /* Reset RxIsr function pointer */ huart->RxISR = NULL; 80051a6: 687b ldr r3, [r7, #4] 80051a8: 2200 movs r2, #0 80051aa: 669a str r2, [r3, #104] @ 0x68 } 80051ac: bf00 nop 80051ae: 3754 adds r7, #84 @ 0x54 80051b0: 46bd mov sp, r7 80051b2: f85d 7b04 ldr.w r7, [sp], #4 80051b6: 4770 bx lr 080051b8 : * @param Init Pointer to NORSRAM Initialization structure * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Init(FMC_NORSRAM_TypeDef *Device, const FMC_NORSRAM_InitTypeDef *Init) { 80051b8: b480 push {r7} 80051ba: b087 sub sp, #28 80051bc: af00 add r7, sp, #0 80051be: 6078 str r0, [r7, #4] 80051c0: 6039 str r1, [r7, #0] assert_param(IS_FMC_CONTINOUS_CLOCK(Init->ContinuousClock)); assert_param(IS_FMC_WRITE_FIFO(Init->WriteFifo)); assert_param(IS_FMC_PAGESIZE(Init->PageSize)); /* Disable NORSRAM Device */ __FMC_NORSRAM_DISABLE(Device, Init->NSBank); 80051c2: 683b ldr r3, [r7, #0] 80051c4: 681a ldr r2, [r3, #0] 80051c6: 687b ldr r3, [r7, #4] 80051c8: f853 3022 ldr.w r3, [r3, r2, lsl #2] 80051cc: 683a ldr r2, [r7, #0] 80051ce: 6812 ldr r2, [r2, #0] 80051d0: f023 0101 bic.w r1, r3, #1 80051d4: 687b ldr r3, [r7, #4] 80051d6: f843 1022 str.w r1, [r3, r2, lsl #2] /* Set NORSRAM device control parameters */ if (Init->MemoryType == FMC_MEMORY_TYPE_NOR) 80051da: 683b ldr r3, [r7, #0] 80051dc: 689b ldr r3, [r3, #8] 80051de: 2b08 cmp r3, #8 80051e0: d102 bne.n 80051e8 { flashaccess = FMC_NORSRAM_FLASH_ACCESS_ENABLE; 80051e2: 2340 movs r3, #64 @ 0x40 80051e4: 617b str r3, [r7, #20] 80051e6: e001 b.n 80051ec } else { flashaccess = FMC_NORSRAM_FLASH_ACCESS_DISABLE; 80051e8: 2300 movs r3, #0 80051ea: 617b str r3, [r7, #20] } btcr_reg = (flashaccess | \ Init->DataAddressMux | \ 80051ec: 683b ldr r3, [r7, #0] 80051ee: 685a ldr r2, [r3, #4] btcr_reg = (flashaccess | \ 80051f0: 697b ldr r3, [r7, #20] 80051f2: 431a orrs r2, r3 Init->MemoryType | \ 80051f4: 683b ldr r3, [r7, #0] 80051f6: 689b ldr r3, [r3, #8] Init->DataAddressMux | \ 80051f8: 431a orrs r2, r3 Init->MemoryDataWidth | \ 80051fa: 683b ldr r3, [r7, #0] 80051fc: 68db ldr r3, [r3, #12] Init->MemoryType | \ 80051fe: 431a orrs r2, r3 Init->BurstAccessMode | \ 8005200: 683b ldr r3, [r7, #0] 8005202: 691b ldr r3, [r3, #16] Init->MemoryDataWidth | \ 8005204: 431a orrs r2, r3 Init->WaitSignalPolarity | \ 8005206: 683b ldr r3, [r7, #0] 8005208: 695b ldr r3, [r3, #20] Init->BurstAccessMode | \ 800520a: 431a orrs r2, r3 Init->WaitSignalActive | \ 800520c: 683b ldr r3, [r7, #0] 800520e: 699b ldr r3, [r3, #24] Init->WaitSignalPolarity | \ 8005210: 431a orrs r2, r3 Init->WriteOperation | \ 8005212: 683b ldr r3, [r7, #0] 8005214: 69db ldr r3, [r3, #28] Init->WaitSignalActive | \ 8005216: 431a orrs r2, r3 Init->WaitSignal | \ 8005218: 683b ldr r3, [r7, #0] 800521a: 6a1b ldr r3, [r3, #32] Init->WriteOperation | \ 800521c: 431a orrs r2, r3 Init->ExtendedMode | \ 800521e: 683b ldr r3, [r7, #0] 8005220: 6a5b ldr r3, [r3, #36] @ 0x24 Init->WaitSignal | \ 8005222: 431a orrs r2, r3 Init->AsynchronousWait | \ 8005224: 683b ldr r3, [r7, #0] 8005226: 6a9b ldr r3, [r3, #40] @ 0x28 Init->ExtendedMode | \ 8005228: 431a orrs r2, r3 Init->WriteBurst); 800522a: 683b ldr r3, [r7, #0] 800522c: 6adb ldr r3, [r3, #44] @ 0x2c btcr_reg = (flashaccess | \ 800522e: 4313 orrs r3, r2 8005230: 613b str r3, [r7, #16] btcr_reg |= Init->ContinuousClock; 8005232: 683b ldr r3, [r7, #0] 8005234: 6b1b ldr r3, [r3, #48] @ 0x30 8005236: 693a ldr r2, [r7, #16] 8005238: 4313 orrs r3, r2 800523a: 613b str r3, [r7, #16] btcr_reg |= Init->WriteFifo; 800523c: 683b ldr r3, [r7, #0] 800523e: 6b5b ldr r3, [r3, #52] @ 0x34 8005240: 693a ldr r2, [r7, #16] 8005242: 4313 orrs r3, r2 8005244: 613b str r3, [r7, #16] btcr_reg |= Init->PageSize; 8005246: 683b ldr r3, [r7, #0] 8005248: 6b9b ldr r3, [r3, #56] @ 0x38 800524a: 693a ldr r2, [r7, #16] 800524c: 4313 orrs r3, r2 800524e: 613b str r3, [r7, #16] mask = (FMC_BCR1_MBKEN | 8005250: 4b20 ldr r3, [pc, #128] @ (80052d4 ) 8005252: 60fb str r3, [r7, #12] FMC_BCR1_WAITEN | FMC_BCR1_EXTMOD | FMC_BCR1_ASYNCWAIT | FMC_BCR1_CBURSTRW); mask |= FMC_BCR1_CCLKEN; 8005254: 68fb ldr r3, [r7, #12] 8005256: f443 1380 orr.w r3, r3, #1048576 @ 0x100000 800525a: 60fb str r3, [r7, #12] mask |= FMC_BCR1_WFDIS; 800525c: 68fb ldr r3, [r7, #12] 800525e: f443 1300 orr.w r3, r3, #2097152 @ 0x200000 8005262: 60fb str r3, [r7, #12] mask |= FMC_BCR1_CPSIZE; 8005264: 68fb ldr r3, [r7, #12] 8005266: f443 23e0 orr.w r3, r3, #458752 @ 0x70000 800526a: 60fb str r3, [r7, #12] MODIFY_REG(Device->BTCR[Init->NSBank], mask, btcr_reg); 800526c: 683b ldr r3, [r7, #0] 800526e: 681a ldr r2, [r3, #0] 8005270: 687b ldr r3, [r7, #4] 8005272: f853 2022 ldr.w r2, [r3, r2, lsl #2] 8005276: 68fb ldr r3, [r7, #12] 8005278: 43db mvns r3, r3 800527a: ea02 0103 and.w r1, r2, r3 800527e: 683b ldr r3, [r7, #0] 8005280: 681a ldr r2, [r3, #0] 8005282: 693b ldr r3, [r7, #16] 8005284: 4319 orrs r1, r3 8005286: 687b ldr r3, [r7, #4] 8005288: f843 1022 str.w r1, [r3, r2, lsl #2] /* Configure synchronous mode when Continuous clock is enabled for bank2..4 */ if ((Init->ContinuousClock == FMC_CONTINUOUS_CLOCK_SYNC_ASYNC) && (Init->NSBank != FMC_NORSRAM_BANK1)) 800528c: 683b ldr r3, [r7, #0] 800528e: 6b1b ldr r3, [r3, #48] @ 0x30 8005290: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8005294: d10c bne.n 80052b0 8005296: 683b ldr r3, [r7, #0] 8005298: 681b ldr r3, [r3, #0] 800529a: 2b00 cmp r3, #0 800529c: d008 beq.n 80052b0 { MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCR1_CCLKEN, Init->ContinuousClock); 800529e: 687b ldr r3, [r7, #4] 80052a0: 681b ldr r3, [r3, #0] 80052a2: f423 1280 bic.w r2, r3, #1048576 @ 0x100000 80052a6: 683b ldr r3, [r7, #0] 80052a8: 6b1b ldr r3, [r3, #48] @ 0x30 80052aa: 431a orrs r2, r3 80052ac: 687b ldr r3, [r7, #4] 80052ae: 601a str r2, [r3, #0] } if (Init->NSBank != FMC_NORSRAM_BANK1) 80052b0: 683b ldr r3, [r7, #0] 80052b2: 681b ldr r3, [r3, #0] 80052b4: 2b00 cmp r3, #0 80052b6: d006 beq.n 80052c6 { /* Configure Write FIFO mode when Write Fifo is enabled for bank2..4 */ SET_BIT(Device->BTCR[FMC_NORSRAM_BANK1], (uint32_t)(Init->WriteFifo)); 80052b8: 687b ldr r3, [r7, #4] 80052ba: 681a ldr r2, [r3, #0] 80052bc: 683b ldr r3, [r7, #0] 80052be: 6b5b ldr r3, [r3, #52] @ 0x34 80052c0: 431a orrs r2, r3 80052c2: 687b ldr r3, [r7, #4] 80052c4: 601a str r2, [r3, #0] } return HAL_OK; 80052c6: 2300 movs r3, #0 } 80052c8: 4618 mov r0, r3 80052ca: 371c adds r7, #28 80052cc: 46bd mov sp, r7 80052ce: f85d 7b04 ldr.w r7, [sp], #4 80052d2: 4770 bx lr 80052d4: 0008fb7f .word 0x0008fb7f 080052d8 : * @param Bank NORSRAM bank number * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Timing_Init(FMC_NORSRAM_TypeDef *Device, const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank) { 80052d8: b480 push {r7} 80052da: b087 sub sp, #28 80052dc: af00 add r7, sp, #0 80052de: 60f8 str r0, [r7, #12] 80052e0: 60b9 str r1, [r7, #8] 80052e2: 607a str r2, [r7, #4] assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FMC_NORSRAM_BANK(Bank)); /* Set FMC_NORSRAM device timing parameters */ Device->BTCR[Bank + 1U] = (Timing->AddressSetupTime << FMC_BTR1_ADDSET_Pos) | 80052e4: 68bb ldr r3, [r7, #8] 80052e6: 681a ldr r2, [r3, #0] (Timing->AddressHoldTime << FMC_BTR1_ADDHLD_Pos) | 80052e8: 68bb ldr r3, [r7, #8] 80052ea: 685b ldr r3, [r3, #4] 80052ec: 011b lsls r3, r3, #4 (Timing->AddressSetupTime << FMC_BTR1_ADDSET_Pos) | 80052ee: 431a orrs r2, r3 (Timing->DataSetupTime << FMC_BTR1_DATAST_Pos) | 80052f0: 68bb ldr r3, [r7, #8] 80052f2: 689b ldr r3, [r3, #8] 80052f4: 021b lsls r3, r3, #8 (Timing->AddressHoldTime << FMC_BTR1_ADDHLD_Pos) | 80052f6: 431a orrs r2, r3 (Timing->BusTurnAroundDuration << FMC_BTR1_BUSTURN_Pos) | 80052f8: 68bb ldr r3, [r7, #8] 80052fa: 68db ldr r3, [r3, #12] 80052fc: 041b lsls r3, r3, #16 (Timing->DataSetupTime << FMC_BTR1_DATAST_Pos) | 80052fe: 431a orrs r2, r3 ((Timing->CLKDivision - 1U) << FMC_BTR1_CLKDIV_Pos) | 8005300: 68bb ldr r3, [r7, #8] 8005302: 691b ldr r3, [r3, #16] 8005304: 3b01 subs r3, #1 8005306: 051b lsls r3, r3, #20 (Timing->BusTurnAroundDuration << FMC_BTR1_BUSTURN_Pos) | 8005308: 431a orrs r2, r3 ((Timing->DataLatency - 2U) << FMC_BTR1_DATLAT_Pos) | 800530a: 68bb ldr r3, [r7, #8] 800530c: 695b ldr r3, [r3, #20] 800530e: 3b02 subs r3, #2 8005310: 061b lsls r3, r3, #24 ((Timing->CLKDivision - 1U) << FMC_BTR1_CLKDIV_Pos) | 8005312: ea42 0103 orr.w r1, r2, r3 Timing->AccessMode; 8005316: 68bb ldr r3, [r7, #8] 8005318: 699b ldr r3, [r3, #24] Device->BTCR[Bank + 1U] = 800531a: 687a ldr r2, [r7, #4] 800531c: 3201 adds r2, #1 ((Timing->DataLatency - 2U) << FMC_BTR1_DATLAT_Pos) | 800531e: 4319 orrs r1, r3 Device->BTCR[Bank + 1U] = 8005320: 68fb ldr r3, [r7, #12] 8005322: f843 1022 str.w r1, [r3, r2, lsl #2] /* Configure Clock division value (in NORSRAM bank 1) when continuous clock is enabled */ if (HAL_IS_BIT_SET(Device->BTCR[FMC_NORSRAM_BANK1], FMC_BCR1_CCLKEN)) 8005326: 68fb ldr r3, [r7, #12] 8005328: 681b ldr r3, [r3, #0] 800532a: f403 1380 and.w r3, r3, #1048576 @ 0x100000 800532e: f5b3 1f80 cmp.w r3, #1048576 @ 0x100000 8005332: d113 bne.n 800535c { tmpr = (uint32_t)(Device->BTCR[FMC_NORSRAM_BANK1 + 1U] & ~((0x0FU) << FMC_BTR1_CLKDIV_Pos)); 8005334: 68fb ldr r3, [r7, #12] 8005336: 685b ldr r3, [r3, #4] 8005338: f423 0370 bic.w r3, r3, #15728640 @ 0xf00000 800533c: 617b str r3, [r7, #20] tmpr |= (uint32_t)(((Timing->CLKDivision) - 1U) << FMC_BTR1_CLKDIV_Pos); 800533e: 68bb ldr r3, [r7, #8] 8005340: 691b ldr r3, [r3, #16] 8005342: 3b01 subs r3, #1 8005344: 051b lsls r3, r3, #20 8005346: 697a ldr r2, [r7, #20] 8005348: 4313 orrs r3, r2 800534a: 617b str r3, [r7, #20] MODIFY_REG(Device->BTCR[FMC_NORSRAM_BANK1 + 1U], FMC_BTR1_CLKDIV, tmpr); 800534c: 68fb ldr r3, [r7, #12] 800534e: 685b ldr r3, [r3, #4] 8005350: f423 0270 bic.w r2, r3, #15728640 @ 0xf00000 8005354: 697b ldr r3, [r7, #20] 8005356: 431a orrs r2, r3 8005358: 68fb ldr r3, [r7, #12] 800535a: 605a str r2, [r3, #4] } return HAL_OK; 800535c: 2300 movs r3, #0 } 800535e: 4618 mov r0, r3 8005360: 371c adds r7, #28 8005362: 46bd mov sp, r7 8005364: f85d 7b04 ldr.w r7, [sp], #4 8005368: 4770 bx lr ... 0800536c : * @retval HAL status */ HAL_StatusTypeDef FMC_NORSRAM_Extended_Timing_Init(FMC_NORSRAM_EXTENDED_TypeDef *Device, const FMC_NORSRAM_TimingTypeDef *Timing, uint32_t Bank, uint32_t ExtendedMode) { 800536c: b480 push {r7} 800536e: b085 sub sp, #20 8005370: af00 add r7, sp, #0 8005372: 60f8 str r0, [r7, #12] 8005374: 60b9 str r1, [r7, #8] 8005376: 607a str r2, [r7, #4] 8005378: 603b str r3, [r7, #0] /* Check the parameters */ assert_param(IS_FMC_EXTENDED_MODE(ExtendedMode)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ if (ExtendedMode == FMC_EXTENDED_MODE_ENABLE) 800537a: 683b ldr r3, [r7, #0] 800537c: f5b3 4f80 cmp.w r3, #16384 @ 0x4000 8005380: d11d bne.n 80053be assert_param(IS_FMC_TURNAROUND_TIME(Timing->BusTurnAroundDuration)); assert_param(IS_FMC_ACCESS_MODE(Timing->AccessMode)); assert_param(IS_FMC_NORSRAM_BANK(Bank)); /* Set NORSRAM device timing register for write configuration, if extended mode is used */ MODIFY_REG(Device->BWTR[Bank], BWTR_CLEAR_MASK, (Timing->AddressSetupTime | 8005382: 68fb ldr r3, [r7, #12] 8005384: 687a ldr r2, [r7, #4] 8005386: f853 2022 ldr.w r2, [r3, r2, lsl #2] 800538a: 4b13 ldr r3, [pc, #76] @ (80053d8 ) 800538c: 4013 ands r3, r2 800538e: 68ba ldr r2, [r7, #8] 8005390: 6811 ldr r1, [r2, #0] 8005392: 68ba ldr r2, [r7, #8] 8005394: 6852 ldr r2, [r2, #4] 8005396: 0112 lsls r2, r2, #4 8005398: 4311 orrs r1, r2 800539a: 68ba ldr r2, [r7, #8] 800539c: 6892 ldr r2, [r2, #8] 800539e: 0212 lsls r2, r2, #8 80053a0: 4311 orrs r1, r2 80053a2: 68ba ldr r2, [r7, #8] 80053a4: 6992 ldr r2, [r2, #24] 80053a6: 4311 orrs r1, r2 80053a8: 68ba ldr r2, [r7, #8] 80053aa: 68d2 ldr r2, [r2, #12] 80053ac: 0412 lsls r2, r2, #16 80053ae: 430a orrs r2, r1 80053b0: ea43 0102 orr.w r1, r3, r2 80053b4: 68fb ldr r3, [r7, #12] 80053b6: 687a ldr r2, [r7, #4] 80053b8: f843 1022 str.w r1, [r3, r2, lsl #2] 80053bc: e005 b.n 80053ca Timing->AccessMode | ((Timing->BusTurnAroundDuration) << FMC_BWTR1_BUSTURN_Pos))); } else { Device->BWTR[Bank] = 0x0FFFFFFFU; 80053be: 68fb ldr r3, [r7, #12] 80053c0: 687a ldr r2, [r7, #4] 80053c2: f06f 4170 mvn.w r1, #4026531840 @ 0xf0000000 80053c6: f843 1022 str.w r1, [r3, r2, lsl #2] } return HAL_OK; 80053ca: 2300 movs r3, #0 } 80053cc: 4618 mov r0, r3 80053ce: 3714 adds r7, #20 80053d0: 46bd mov sp, r7 80053d2: f85d 7b04 ldr.w r7, [sp], #4 80053d6: 4770 bx lr 80053d8: cff00000 .word 0xcff00000 080053dc : extern void xPortSysTickHandler(void); /* Convert from CMSIS type osPriority to FreeRTOS priority number */ static unsigned portBASE_TYPE makeFreeRtosPriority (osPriority priority) { 80053dc: b480 push {r7} 80053de: b085 sub sp, #20 80053e0: af00 add r7, sp, #0 80053e2: 4603 mov r3, r0 80053e4: 80fb strh r3, [r7, #6] unsigned portBASE_TYPE fpriority = tskIDLE_PRIORITY; 80053e6: 2300 movs r3, #0 80053e8: 60fb str r3, [r7, #12] if (priority != osPriorityError) { 80053ea: f9b7 3006 ldrsh.w r3, [r7, #6] 80053ee: 2b84 cmp r3, #132 @ 0x84 80053f0: d005 beq.n 80053fe fpriority += (priority - osPriorityIdle); 80053f2: f9b7 2006 ldrsh.w r2, [r7, #6] 80053f6: 68fb ldr r3, [r7, #12] 80053f8: 4413 add r3, r2 80053fa: 3303 adds r3, #3 80053fc: 60fb str r3, [r7, #12] } return fpriority; 80053fe: 68fb ldr r3, [r7, #12] } 8005400: 4618 mov r0, r3 8005402: 3714 adds r7, #20 8005404: 46bd mov sp, r7 8005406: f85d 7b04 ldr.w r7, [sp], #4 800540a: 4770 bx lr 0800540c : * @param argument pointer that is passed to the thread function as start argument. * @retval status code that indicates the execution status of the function * @note MUST REMAIN UNCHANGED: \b osKernelStart shall be consistent in every CMSIS-RTOS. */ osStatus osKernelStart (void) { 800540c: b580 push {r7, lr} 800540e: af00 add r7, sp, #0 vTaskStartScheduler(); 8005410: f000 fb14 bl 8005a3c return osOK; 8005414: 2300 movs r3, #0 } 8005416: 4618 mov r0, r3 8005418: bd80 pop {r7, pc} 0800541a : * @param argument pointer that is passed to the thread function as start argument. * @retval thread ID for reference by other functions or NULL in case of error. * @note MUST REMAIN UNCHANGED: \b osThreadCreate shall be consistent in every CMSIS-RTOS. */ osThreadId osThreadCreate (const osThreadDef_t *thread_def, void *argument) { 800541a: b5f0 push {r4, r5, r6, r7, lr} 800541c: b089 sub sp, #36 @ 0x24 800541e: af04 add r7, sp, #16 8005420: 6078 str r0, [r7, #4] 8005422: 6039 str r1, [r7, #0] TaskHandle_t handle; #if( configSUPPORT_STATIC_ALLOCATION == 1 ) && ( configSUPPORT_DYNAMIC_ALLOCATION == 1 ) if((thread_def->buffer != NULL) && (thread_def->controlblock != NULL)) { 8005424: 687b ldr r3, [r7, #4] 8005426: 695b ldr r3, [r3, #20] 8005428: 2b00 cmp r3, #0 800542a: d020 beq.n 800546e 800542c: 687b ldr r3, [r7, #4] 800542e: 699b ldr r3, [r3, #24] 8005430: 2b00 cmp r3, #0 8005432: d01c beq.n 800546e handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 8005434: 687b ldr r3, [r7, #4] 8005436: 685c ldr r4, [r3, #4] 8005438: 687b ldr r3, [r7, #4] 800543a: 681d ldr r5, [r3, #0] thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority), 800543c: 687b ldr r3, [r7, #4] 800543e: 691e ldr r6, [r3, #16] 8005440: 687b ldr r3, [r7, #4] 8005442: f9b3 3008 ldrsh.w r3, [r3, #8] handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 8005446: 4618 mov r0, r3 8005448: f7ff ffc8 bl 80053dc 800544c: 4601 mov r1, r0 thread_def->buffer, thread_def->controlblock); 800544e: 687b ldr r3, [r7, #4] 8005450: 695b ldr r3, [r3, #20] 8005452: 687a ldr r2, [r7, #4] 8005454: 6992 ldr r2, [r2, #24] handle = xTaskCreateStatic((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 8005456: 9202 str r2, [sp, #8] 8005458: 9301 str r3, [sp, #4] 800545a: 9100 str r1, [sp, #0] 800545c: 683b ldr r3, [r7, #0] 800545e: 4632 mov r2, r6 8005460: 4629 mov r1, r5 8005462: 4620 mov r0, r4 8005464: f000 f8ed bl 8005642 8005468: 4603 mov r3, r0 800546a: 60fb str r3, [r7, #12] 800546c: e01c b.n 80054a8 } else { if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 800546e: 687b ldr r3, [r7, #4] 8005470: 685c ldr r4, [r3, #4] 8005472: 687b ldr r3, [r7, #4] 8005474: 681d ldr r5, [r3, #0] thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority), 8005476: 687b ldr r3, [r7, #4] 8005478: 691b ldr r3, [r3, #16] if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 800547a: b29e uxth r6, r3 thread_def->stacksize, argument, makeFreeRtosPriority(thread_def->tpriority), 800547c: 687b ldr r3, [r7, #4] 800547e: f9b3 3008 ldrsh.w r3, [r3, #8] if (xTaskCreate((TaskFunction_t)thread_def->pthread,(const portCHAR *)thread_def->name, 8005482: 4618 mov r0, r3 8005484: f7ff ffaa bl 80053dc 8005488: 4602 mov r2, r0 800548a: f107 030c add.w r3, r7, #12 800548e: 9301 str r3, [sp, #4] 8005490: 9200 str r2, [sp, #0] 8005492: 683b ldr r3, [r7, #0] 8005494: 4632 mov r2, r6 8005496: 4629 mov r1, r5 8005498: 4620 mov r0, r4 800549a: f000 f938 bl 800570e 800549e: 4603 mov r3, r0 80054a0: 2b01 cmp r3, #1 80054a2: d001 beq.n 80054a8 &handle) != pdPASS) { return NULL; 80054a4: 2300 movs r3, #0 80054a6: e000 b.n 80054aa &handle) != pdPASS) { return NULL; } #endif return handle; 80054a8: 68fb ldr r3, [r7, #12] } 80054aa: 4618 mov r0, r3 80054ac: 3714 adds r7, #20 80054ae: 46bd mov sp, r7 80054b0: bdf0 pop {r4, r5, r6, r7, pc} 080054b2 : * @brief Wait for Timeout (Time Delay) * @param millisec time delay value * @retval status code that indicates the execution status of the function. */ osStatus osDelay (uint32_t millisec) { 80054b2: b580 push {r7, lr} 80054b4: b084 sub sp, #16 80054b6: af00 add r7, sp, #0 80054b8: 6078 str r0, [r7, #4] #if INCLUDE_vTaskDelay TickType_t ticks = millisec / portTICK_PERIOD_MS; 80054ba: 687b ldr r3, [r7, #4] 80054bc: 60fb str r3, [r7, #12] vTaskDelay(ticks ? ticks : 1); /* Minimum delay = 1 tick */ 80054be: 68fb ldr r3, [r7, #12] 80054c0: 2b00 cmp r3, #0 80054c2: d001 beq.n 80054c8 80054c4: 68fb ldr r3, [r7, #12] 80054c6: e000 b.n 80054ca 80054c8: 2301 movs r3, #1 80054ca: 4618 mov r0, r3 80054cc: f000 fa7e bl 80059cc return osOK; 80054d0: 2300 movs r3, #0 #else (void) millisec; return osErrorResource; #endif } 80054d2: 4618 mov r0, r3 80054d4: 3710 adds r7, #16 80054d6: 46bd mov sp, r7 80054d8: bd80 pop {r7, pc} 080054da : /*----------------------------------------------------------- * PUBLIC LIST API documented in list.h *----------------------------------------------------------*/ void vListInitialise( List_t * const pxList ) { 80054da: b480 push {r7} 80054dc: b083 sub sp, #12 80054de: af00 add r7, sp, #0 80054e0: 6078 str r0, [r7, #4] /* The list structure contains a list item which is used to mark the end of the list. To initialise the list the list end is inserted as the only list entry. */ pxList->pxIndex = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 80054e2: 687b ldr r3, [r7, #4] 80054e4: f103 0208 add.w r2, r3, #8 80054e8: 687b ldr r3, [r7, #4] 80054ea: 605a str r2, [r3, #4] /* The list end value is the highest possible value in the list to ensure it remains at the end of the list. */ pxList->xListEnd.xItemValue = portMAX_DELAY; 80054ec: 687b ldr r3, [r7, #4] 80054ee: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80054f2: 609a str r2, [r3, #8] /* The list end next and previous pointers point to itself so we know when the list is empty. */ pxList->xListEnd.pxNext = ( ListItem_t * ) &( pxList->xListEnd ); /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 80054f4: 687b ldr r3, [r7, #4] 80054f6: f103 0208 add.w r2, r3, #8 80054fa: 687b ldr r3, [r7, #4] 80054fc: 60da str r2, [r3, #12] pxList->xListEnd.pxPrevious = ( ListItem_t * ) &( pxList->xListEnd );/*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. */ 80054fe: 687b ldr r3, [r7, #4] 8005500: f103 0208 add.w r2, r3, #8 8005504: 687b ldr r3, [r7, #4] 8005506: 611a str r2, [r3, #16] pxList->uxNumberOfItems = ( UBaseType_t ) 0U; 8005508: 687b ldr r3, [r7, #4] 800550a: 2200 movs r2, #0 800550c: 601a str r2, [r3, #0] /* Write known values into the list if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_LIST_INTEGRITY_CHECK_1_VALUE( pxList ); listSET_LIST_INTEGRITY_CHECK_2_VALUE( pxList ); } 800550e: bf00 nop 8005510: 370c adds r7, #12 8005512: 46bd mov sp, r7 8005514: f85d 7b04 ldr.w r7, [sp], #4 8005518: 4770 bx lr 0800551a : /*-----------------------------------------------------------*/ void vListInitialiseItem( ListItem_t * const pxItem ) { 800551a: b480 push {r7} 800551c: b083 sub sp, #12 800551e: af00 add r7, sp, #0 8005520: 6078 str r0, [r7, #4] /* Make sure the list item is not recorded as being on a list. */ pxItem->pxContainer = NULL; 8005522: 687b ldr r3, [r7, #4] 8005524: 2200 movs r2, #0 8005526: 611a str r2, [r3, #16] /* Write known values into the list item if configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES is set to 1. */ listSET_FIRST_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); listSET_SECOND_LIST_ITEM_INTEGRITY_CHECK_VALUE( pxItem ); } 8005528: bf00 nop 800552a: 370c adds r7, #12 800552c: 46bd mov sp, r7 800552e: f85d 7b04 ldr.w r7, [sp], #4 8005532: 4770 bx lr 08005534 : /*-----------------------------------------------------------*/ void vListInsertEnd( List_t * const pxList, ListItem_t * const pxNewListItem ) { 8005534: b480 push {r7} 8005536: b085 sub sp, #20 8005538: af00 add r7, sp, #0 800553a: 6078 str r0, [r7, #4] 800553c: 6039 str r1, [r7, #0] ListItem_t * const pxIndex = pxList->pxIndex; 800553e: 687b ldr r3, [r7, #4] 8005540: 685b ldr r3, [r3, #4] 8005542: 60fb str r3, [r7, #12] listTEST_LIST_ITEM_INTEGRITY( pxNewListItem ); /* Insert a new list item into pxList, but rather than sort the list, makes the new list item the last item to be removed by a call to listGET_OWNER_OF_NEXT_ENTRY(). */ pxNewListItem->pxNext = pxIndex; 8005544: 683b ldr r3, [r7, #0] 8005546: 68fa ldr r2, [r7, #12] 8005548: 605a str r2, [r3, #4] pxNewListItem->pxPrevious = pxIndex->pxPrevious; 800554a: 68fb ldr r3, [r7, #12] 800554c: 689a ldr r2, [r3, #8] 800554e: 683b ldr r3, [r7, #0] 8005550: 609a str r2, [r3, #8] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); pxIndex->pxPrevious->pxNext = pxNewListItem; 8005552: 68fb ldr r3, [r7, #12] 8005554: 689b ldr r3, [r3, #8] 8005556: 683a ldr r2, [r7, #0] 8005558: 605a str r2, [r3, #4] pxIndex->pxPrevious = pxNewListItem; 800555a: 68fb ldr r3, [r7, #12] 800555c: 683a ldr r2, [r7, #0] 800555e: 609a str r2, [r3, #8] /* Remember which list the item is in. */ pxNewListItem->pxContainer = pxList; 8005560: 683b ldr r3, [r7, #0] 8005562: 687a ldr r2, [r7, #4] 8005564: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; 8005566: 687b ldr r3, [r7, #4] 8005568: 681b ldr r3, [r3, #0] 800556a: 1c5a adds r2, r3, #1 800556c: 687b ldr r3, [r7, #4] 800556e: 601a str r2, [r3, #0] } 8005570: bf00 nop 8005572: 3714 adds r7, #20 8005574: 46bd mov sp, r7 8005576: f85d 7b04 ldr.w r7, [sp], #4 800557a: 4770 bx lr 0800557c : /*-----------------------------------------------------------*/ void vListInsert( List_t * const pxList, ListItem_t * const pxNewListItem ) { 800557c: b480 push {r7} 800557e: b085 sub sp, #20 8005580: af00 add r7, sp, #0 8005582: 6078 str r0, [r7, #4] 8005584: 6039 str r1, [r7, #0] ListItem_t *pxIterator; const TickType_t xValueOfInsertion = pxNewListItem->xItemValue; 8005586: 683b ldr r3, [r7, #0] 8005588: 681b ldr r3, [r3, #0] 800558a: 60bb str r3, [r7, #8] new list item should be placed after it. This ensures that TCBs which are stored in ready lists (all of which have the same xItemValue value) get a share of the CPU. However, if the xItemValue is the same as the back marker the iteration loop below will not end. Therefore the value is checked first, and the algorithm slightly modified if necessary. */ if( xValueOfInsertion == portMAX_DELAY ) 800558c: 68bb ldr r3, [r7, #8] 800558e: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005592: d103 bne.n 800559c { pxIterator = pxList->xListEnd.pxPrevious; 8005594: 687b ldr r3, [r7, #4] 8005596: 691b ldr r3, [r3, #16] 8005598: 60fb str r3, [r7, #12] 800559a: e00c b.n 80055b6 4) Using a queue or semaphore before it has been initialised or before the scheduler has been started (are interrupts firing before vTaskStartScheduler() has been called?). **********************************************************************/ for( pxIterator = ( ListItem_t * ) &( pxList->xListEnd ); pxIterator->pxNext->xItemValue <= xValueOfInsertion; pxIterator = pxIterator->pxNext ) /*lint !e826 !e740 !e9087 The mini list structure is used as the list end to save RAM. This is checked and valid. *//*lint !e440 The iterator moves to a different value, not xValueOfInsertion. */ 800559c: 687b ldr r3, [r7, #4] 800559e: 3308 adds r3, #8 80055a0: 60fb str r3, [r7, #12] 80055a2: e002 b.n 80055aa 80055a4: 68fb ldr r3, [r7, #12] 80055a6: 685b ldr r3, [r3, #4] 80055a8: 60fb str r3, [r7, #12] 80055aa: 68fb ldr r3, [r7, #12] 80055ac: 685b ldr r3, [r3, #4] 80055ae: 681b ldr r3, [r3, #0] 80055b0: 68ba ldr r2, [r7, #8] 80055b2: 429a cmp r2, r3 80055b4: d2f6 bcs.n 80055a4 /* There is nothing to do here, just iterating to the wanted insertion position. */ } } pxNewListItem->pxNext = pxIterator->pxNext; 80055b6: 68fb ldr r3, [r7, #12] 80055b8: 685a ldr r2, [r3, #4] 80055ba: 683b ldr r3, [r7, #0] 80055bc: 605a str r2, [r3, #4] pxNewListItem->pxNext->pxPrevious = pxNewListItem; 80055be: 683b ldr r3, [r7, #0] 80055c0: 685b ldr r3, [r3, #4] 80055c2: 683a ldr r2, [r7, #0] 80055c4: 609a str r2, [r3, #8] pxNewListItem->pxPrevious = pxIterator; 80055c6: 683b ldr r3, [r7, #0] 80055c8: 68fa ldr r2, [r7, #12] 80055ca: 609a str r2, [r3, #8] pxIterator->pxNext = pxNewListItem; 80055cc: 68fb ldr r3, [r7, #12] 80055ce: 683a ldr r2, [r7, #0] 80055d0: 605a str r2, [r3, #4] /* Remember which list the item is in. This allows fast removal of the item later. */ pxNewListItem->pxContainer = pxList; 80055d2: 683b ldr r3, [r7, #0] 80055d4: 687a ldr r2, [r7, #4] 80055d6: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )++; 80055d8: 687b ldr r3, [r7, #4] 80055da: 681b ldr r3, [r3, #0] 80055dc: 1c5a adds r2, r3, #1 80055de: 687b ldr r3, [r7, #4] 80055e0: 601a str r2, [r3, #0] } 80055e2: bf00 nop 80055e4: 3714 adds r7, #20 80055e6: 46bd mov sp, r7 80055e8: f85d 7b04 ldr.w r7, [sp], #4 80055ec: 4770 bx lr 080055ee : /*-----------------------------------------------------------*/ UBaseType_t uxListRemove( ListItem_t * const pxItemToRemove ) { 80055ee: b480 push {r7} 80055f0: b085 sub sp, #20 80055f2: af00 add r7, sp, #0 80055f4: 6078 str r0, [r7, #4] /* The list item knows which list it is in. Obtain the list from the list item. */ List_t * const pxList = pxItemToRemove->pxContainer; 80055f6: 687b ldr r3, [r7, #4] 80055f8: 691b ldr r3, [r3, #16] 80055fa: 60fb str r3, [r7, #12] pxItemToRemove->pxNext->pxPrevious = pxItemToRemove->pxPrevious; 80055fc: 687b ldr r3, [r7, #4] 80055fe: 685b ldr r3, [r3, #4] 8005600: 687a ldr r2, [r7, #4] 8005602: 6892 ldr r2, [r2, #8] 8005604: 609a str r2, [r3, #8] pxItemToRemove->pxPrevious->pxNext = pxItemToRemove->pxNext; 8005606: 687b ldr r3, [r7, #4] 8005608: 689b ldr r3, [r3, #8] 800560a: 687a ldr r2, [r7, #4] 800560c: 6852 ldr r2, [r2, #4] 800560e: 605a str r2, [r3, #4] /* Only used during decision coverage testing. */ mtCOVERAGE_TEST_DELAY(); /* Make sure the index is left pointing to a valid item. */ if( pxList->pxIndex == pxItemToRemove ) 8005610: 68fb ldr r3, [r7, #12] 8005612: 685b ldr r3, [r3, #4] 8005614: 687a ldr r2, [r7, #4] 8005616: 429a cmp r2, r3 8005618: d103 bne.n 8005622 { pxList->pxIndex = pxItemToRemove->pxPrevious; 800561a: 687b ldr r3, [r7, #4] 800561c: 689a ldr r2, [r3, #8] 800561e: 68fb ldr r3, [r7, #12] 8005620: 605a str r2, [r3, #4] else { mtCOVERAGE_TEST_MARKER(); } pxItemToRemove->pxContainer = NULL; 8005622: 687b ldr r3, [r7, #4] 8005624: 2200 movs r2, #0 8005626: 611a str r2, [r3, #16] ( pxList->uxNumberOfItems )--; 8005628: 68fb ldr r3, [r7, #12] 800562a: 681b ldr r3, [r3, #0] 800562c: 1e5a subs r2, r3, #1 800562e: 68fb ldr r3, [r7, #12] 8005630: 601a str r2, [r3, #0] return pxList->uxNumberOfItems; 8005632: 68fb ldr r3, [r7, #12] 8005634: 681b ldr r3, [r3, #0] } 8005636: 4618 mov r0, r3 8005638: 3714 adds r7, #20 800563a: 46bd mov sp, r7 800563c: f85d 7b04 ldr.w r7, [sp], #4 8005640: 4770 bx lr 08005642 : const uint32_t ulStackDepth, void * const pvParameters, UBaseType_t uxPriority, StackType_t * const puxStackBuffer, StaticTask_t * const pxTaskBuffer ) { 8005642: b580 push {r7, lr} 8005644: b08e sub sp, #56 @ 0x38 8005646: af04 add r7, sp, #16 8005648: 60f8 str r0, [r7, #12] 800564a: 60b9 str r1, [r7, #8] 800564c: 607a str r2, [r7, #4] 800564e: 603b str r3, [r7, #0] TCB_t *pxNewTCB; TaskHandle_t xReturn; configASSERT( puxStackBuffer != NULL ); 8005650: 6b7b ldr r3, [r7, #52] @ 0x34 8005652: 2b00 cmp r3, #0 8005654: d10d bne.n 8005672 portFORCE_INLINE static void vPortRaiseBASEPRI( void ) { uint32_t ulNewBASEPRI; __asm volatile 8005656: f04f 0350 mov.w r3, #80 @ 0x50 800565a: b672 cpsid i 800565c: f383 8811 msr BASEPRI, r3 8005660: f3bf 8f6f isb sy 8005664: f3bf 8f4f dsb sy 8005668: b662 cpsie i 800566a: 623b str r3, [r7, #32] " isb \n" \ " dsb \n" \ " cpsie i \n" \ :"=r" (ulNewBASEPRI) : "i" ( configMAX_SYSCALL_INTERRUPT_PRIORITY ) : "memory" ); } 800566c: bf00 nop 800566e: bf00 nop 8005670: e7fd b.n 800566e configASSERT( pxTaskBuffer != NULL ); 8005672: 6bbb ldr r3, [r7, #56] @ 0x38 8005674: 2b00 cmp r3, #0 8005676: d10d bne.n 8005694 __asm volatile 8005678: f04f 0350 mov.w r3, #80 @ 0x50 800567c: b672 cpsid i 800567e: f383 8811 msr BASEPRI, r3 8005682: f3bf 8f6f isb sy 8005686: f3bf 8f4f dsb sy 800568a: b662 cpsie i 800568c: 61fb str r3, [r7, #28] } 800568e: bf00 nop 8005690: bf00 nop 8005692: e7fd b.n 8005690 #if( configASSERT_DEFINED == 1 ) { /* Sanity check that the size of the structure used to declare a variable of type StaticTask_t equals the size of the real task structure. */ volatile size_t xSize = sizeof( StaticTask_t ); 8005694: 23ac movs r3, #172 @ 0xac 8005696: 613b str r3, [r7, #16] configASSERT( xSize == sizeof( TCB_t ) ); 8005698: 693b ldr r3, [r7, #16] 800569a: 2bac cmp r3, #172 @ 0xac 800569c: d00d beq.n 80056ba __asm volatile 800569e: f04f 0350 mov.w r3, #80 @ 0x50 80056a2: b672 cpsid i 80056a4: f383 8811 msr BASEPRI, r3 80056a8: f3bf 8f6f isb sy 80056ac: f3bf 8f4f dsb sy 80056b0: b662 cpsie i 80056b2: 61bb str r3, [r7, #24] } 80056b4: bf00 nop 80056b6: bf00 nop 80056b8: e7fd b.n 80056b6 ( void ) xSize; /* Prevent lint warning when configASSERT() is not used. */ 80056ba: 693b ldr r3, [r7, #16] } #endif /* configASSERT_DEFINED */ if( ( pxTaskBuffer != NULL ) && ( puxStackBuffer != NULL ) ) 80056bc: 6bbb ldr r3, [r7, #56] @ 0x38 80056be: 2b00 cmp r3, #0 80056c0: d01e beq.n 8005700 80056c2: 6b7b ldr r3, [r7, #52] @ 0x34 80056c4: 2b00 cmp r3, #0 80056c6: d01b beq.n 8005700 { /* The memory used for the task's TCB and stack are passed into this function - use them. */ pxNewTCB = ( TCB_t * ) pxTaskBuffer; /*lint !e740 !e9087 Unusual cast is ok as the structures are designed to have the same alignment, and the size is checked by an assert. */ 80056c8: 6bbb ldr r3, [r7, #56] @ 0x38 80056ca: 627b str r3, [r7, #36] @ 0x24 pxNewTCB->pxStack = ( StackType_t * ) puxStackBuffer; 80056cc: 6a7b ldr r3, [r7, #36] @ 0x24 80056ce: 6b7a ldr r2, [r7, #52] @ 0x34 80056d0: 631a str r2, [r3, #48] @ 0x30 #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created statically in case the task is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskSTATICALLY_ALLOCATED_STACK_AND_TCB; 80056d2: 6a7b ldr r3, [r7, #36] @ 0x24 80056d4: 2202 movs r2, #2 80056d6: f883 20a9 strb.w r2, [r3, #169] @ 0xa9 } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ulStackDepth, pvParameters, uxPriority, &xReturn, pxNewTCB, NULL ); 80056da: 2300 movs r3, #0 80056dc: 9303 str r3, [sp, #12] 80056de: 6a7b ldr r3, [r7, #36] @ 0x24 80056e0: 9302 str r3, [sp, #8] 80056e2: f107 0314 add.w r3, r7, #20 80056e6: 9301 str r3, [sp, #4] 80056e8: 6b3b ldr r3, [r7, #48] @ 0x30 80056ea: 9300 str r3, [sp, #0] 80056ec: 683b ldr r3, [r7, #0] 80056ee: 687a ldr r2, [r7, #4] 80056f0: 68b9 ldr r1, [r7, #8] 80056f2: 68f8 ldr r0, [r7, #12] 80056f4: f000 f850 bl 8005798 prvAddNewTaskToReadyList( pxNewTCB ); 80056f8: 6a78 ldr r0, [r7, #36] @ 0x24 80056fa: f000 f8f9 bl 80058f0 80056fe: e001 b.n 8005704 } else { xReturn = NULL; 8005700: 2300 movs r3, #0 8005702: 617b str r3, [r7, #20] } return xReturn; 8005704: 697b ldr r3, [r7, #20] } 8005706: 4618 mov r0, r3 8005708: 3728 adds r7, #40 @ 0x28 800570a: 46bd mov sp, r7 800570c: bd80 pop {r7, pc} 0800570e : const char * const pcName, /*lint !e971 Unqualified char types are allowed for strings and single characters only. */ const configSTACK_DEPTH_TYPE usStackDepth, void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask ) { 800570e: b580 push {r7, lr} 8005710: b08c sub sp, #48 @ 0x30 8005712: af04 add r7, sp, #16 8005714: 60f8 str r0, [r7, #12] 8005716: 60b9 str r1, [r7, #8] 8005718: 603b str r3, [r7, #0] 800571a: 4613 mov r3, r2 800571c: 80fb strh r3, [r7, #6] #else /* portSTACK_GROWTH */ { StackType_t *pxStack; /* Allocate space for the stack used by the task being created. */ pxStack = pvPortMalloc( ( ( ( size_t ) usStackDepth ) * sizeof( StackType_t ) ) ); /*lint !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack and this allocation is the stack. */ 800571e: 88fb ldrh r3, [r7, #6] 8005720: 009b lsls r3, r3, #2 8005722: 4618 mov r0, r3 8005724: f000 ff22 bl 800656c 8005728: 6178 str r0, [r7, #20] if( pxStack != NULL ) 800572a: 697b ldr r3, [r7, #20] 800572c: 2b00 cmp r3, #0 800572e: d00e beq.n 800574e { /* Allocate space for the TCB. */ pxNewTCB = ( TCB_t * ) pvPortMalloc( sizeof( TCB_t ) ); /*lint !e9087 !e9079 All values returned by pvPortMalloc() have at least the alignment required by the MCU's stack, and the first member of TCB_t is always a pointer to the task's stack. */ 8005730: 20ac movs r0, #172 @ 0xac 8005732: f000 ff1b bl 800656c 8005736: 61f8 str r0, [r7, #28] if( pxNewTCB != NULL ) 8005738: 69fb ldr r3, [r7, #28] 800573a: 2b00 cmp r3, #0 800573c: d003 beq.n 8005746 { /* Store the stack location in the TCB. */ pxNewTCB->pxStack = pxStack; 800573e: 69fb ldr r3, [r7, #28] 8005740: 697a ldr r2, [r7, #20] 8005742: 631a str r2, [r3, #48] @ 0x30 8005744: e005 b.n 8005752 } else { /* The stack cannot be used as the TCB was not created. Free it again. */ vPortFree( pxStack ); 8005746: 6978 ldr r0, [r7, #20] 8005748: f000 ffde bl 8006708 800574c: e001 b.n 8005752 } } else { pxNewTCB = NULL; 800574e: 2300 movs r3, #0 8005750: 61fb str r3, [r7, #28] } } #endif /* portSTACK_GROWTH */ if( pxNewTCB != NULL ) 8005752: 69fb ldr r3, [r7, #28] 8005754: 2b00 cmp r3, #0 8005756: d017 beq.n 8005788 { #if( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e9029 !e731 Macro has been consolidated for readability reasons. */ { /* Tasks can be created statically or dynamically, so note this task was created dynamically in case it is later deleted. */ pxNewTCB->ucStaticallyAllocated = tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB; 8005758: 69fb ldr r3, [r7, #28] 800575a: 2200 movs r2, #0 800575c: f883 20a9 strb.w r2, [r3, #169] @ 0xa9 } #endif /* tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE */ prvInitialiseNewTask( pxTaskCode, pcName, ( uint32_t ) usStackDepth, pvParameters, uxPriority, pxCreatedTask, pxNewTCB, NULL ); 8005760: 88fa ldrh r2, [r7, #6] 8005762: 2300 movs r3, #0 8005764: 9303 str r3, [sp, #12] 8005766: 69fb ldr r3, [r7, #28] 8005768: 9302 str r3, [sp, #8] 800576a: 6afb ldr r3, [r7, #44] @ 0x2c 800576c: 9301 str r3, [sp, #4] 800576e: 6abb ldr r3, [r7, #40] @ 0x28 8005770: 9300 str r3, [sp, #0] 8005772: 683b ldr r3, [r7, #0] 8005774: 68b9 ldr r1, [r7, #8] 8005776: 68f8 ldr r0, [r7, #12] 8005778: f000 f80e bl 8005798 prvAddNewTaskToReadyList( pxNewTCB ); 800577c: 69f8 ldr r0, [r7, #28] 800577e: f000 f8b7 bl 80058f0 xReturn = pdPASS; 8005782: 2301 movs r3, #1 8005784: 61bb str r3, [r7, #24] 8005786: e002 b.n 800578e } else { xReturn = errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY; 8005788: f04f 33ff mov.w r3, #4294967295 @ 0xffffffff 800578c: 61bb str r3, [r7, #24] } return xReturn; 800578e: 69bb ldr r3, [r7, #24] } 8005790: 4618 mov r0, r3 8005792: 3720 adds r7, #32 8005794: 46bd mov sp, r7 8005796: bd80 pop {r7, pc} 08005798 : void * const pvParameters, UBaseType_t uxPriority, TaskHandle_t * const pxCreatedTask, TCB_t *pxNewTCB, const MemoryRegion_t * const xRegions ) { 8005798: b580 push {r7, lr} 800579a: b088 sub sp, #32 800579c: af00 add r7, sp, #0 800579e: 60f8 str r0, [r7, #12] 80057a0: 60b9 str r1, [r7, #8] 80057a2: 607a str r2, [r7, #4] 80057a4: 603b str r3, [r7, #0] /* Avoid dependency on memset() if it is not required. */ #if( tskSET_NEW_STACKS_TO_KNOWN_VALUE == 1 ) { /* Fill the stack with a known value to assist debugging. */ ( void ) memset( pxNewTCB->pxStack, ( int ) tskSTACK_FILL_BYTE, ( size_t ) ulStackDepth * sizeof( StackType_t ) ); 80057a6: 6b3b ldr r3, [r7, #48] @ 0x30 80057a8: 6b18 ldr r0, [r3, #48] @ 0x30 80057aa: 687b ldr r3, [r7, #4] 80057ac: 009b lsls r3, r3, #2 80057ae: 461a mov r2, r3 80057b0: 21a5 movs r1, #165 @ 0xa5 80057b2: f001 faf9 bl 8006da8 grows from high memory to low (as per the 80x86) or vice versa. portSTACK_GROWTH is used to make the result positive or negative as required by the port. */ #if( portSTACK_GROWTH < 0 ) { pxTopOfStack = &( pxNewTCB->pxStack[ ulStackDepth - ( uint32_t ) 1 ] ); 80057b6: 6b3b ldr r3, [r7, #48] @ 0x30 80057b8: 6b1a ldr r2, [r3, #48] @ 0x30 80057ba: 6879 ldr r1, [r7, #4] 80057bc: f06f 4340 mvn.w r3, #3221225472 @ 0xc0000000 80057c0: 440b add r3, r1 80057c2: 009b lsls r3, r3, #2 80057c4: 4413 add r3, r2 80057c6: 61bb str r3, [r7, #24] pxTopOfStack = ( StackType_t * ) ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack ) & ( ~( ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) ) ); /*lint !e923 !e9033 !e9078 MISRA exception. Avoiding casts between pointers and integers is not practical. Size differences accounted for using portPOINTER_SIZE_TYPE type. Checked by assert(). */ 80057c8: 69bb ldr r3, [r7, #24] 80057ca: f023 0307 bic.w r3, r3, #7 80057ce: 61bb str r3, [r7, #24] /* Check the alignment of the calculated top of stack is correct. */ configASSERT( ( ( ( portPOINTER_SIZE_TYPE ) pxTopOfStack & ( portPOINTER_SIZE_TYPE ) portBYTE_ALIGNMENT_MASK ) == 0UL ) ); 80057d0: 69bb ldr r3, [r7, #24] 80057d2: f003 0307 and.w r3, r3, #7 80057d6: 2b00 cmp r3, #0 80057d8: d00d beq.n 80057f6 __asm volatile 80057da: f04f 0350 mov.w r3, #80 @ 0x50 80057de: b672 cpsid i 80057e0: f383 8811 msr BASEPRI, r3 80057e4: f3bf 8f6f isb sy 80057e8: f3bf 8f4f dsb sy 80057ec: b662 cpsie i 80057ee: 617b str r3, [r7, #20] } 80057f0: bf00 nop 80057f2: bf00 nop 80057f4: e7fd b.n 80057f2 pxNewTCB->pxEndOfStack = pxNewTCB->pxStack + ( ulStackDepth - ( uint32_t ) 1 ); } #endif /* portSTACK_GROWTH */ /* Store the task name in the TCB. */ if( pcName != NULL ) 80057f6: 68bb ldr r3, [r7, #8] 80057f8: 2b00 cmp r3, #0 80057fa: d01f beq.n 800583c { for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) 80057fc: 2300 movs r3, #0 80057fe: 61fb str r3, [r7, #28] 8005800: e012 b.n 8005828 { pxNewTCB->pcTaskName[ x ] = pcName[ x ]; 8005802: 68ba ldr r2, [r7, #8] 8005804: 69fb ldr r3, [r7, #28] 8005806: 4413 add r3, r2 8005808: 7819 ldrb r1, [r3, #0] 800580a: 6b3a ldr r2, [r7, #48] @ 0x30 800580c: 69fb ldr r3, [r7, #28] 800580e: 4413 add r3, r2 8005810: 3334 adds r3, #52 @ 0x34 8005812: 460a mov r2, r1 8005814: 701a strb r2, [r3, #0] /* Don't copy all configMAX_TASK_NAME_LEN if the string is shorter than configMAX_TASK_NAME_LEN characters just in case the memory after the string is not accessible (extremely unlikely). */ if( pcName[ x ] == ( char ) 0x00 ) 8005816: 68ba ldr r2, [r7, #8] 8005818: 69fb ldr r3, [r7, #28] 800581a: 4413 add r3, r2 800581c: 781b ldrb r3, [r3, #0] 800581e: 2b00 cmp r3, #0 8005820: d006 beq.n 8005830 for( x = ( UBaseType_t ) 0; x < ( UBaseType_t ) configMAX_TASK_NAME_LEN; x++ ) 8005822: 69fb ldr r3, [r7, #28] 8005824: 3301 adds r3, #1 8005826: 61fb str r3, [r7, #28] 8005828: 69fb ldr r3, [r7, #28] 800582a: 2b0f cmp r3, #15 800582c: d9e9 bls.n 8005802 800582e: e000 b.n 8005832 { break; 8005830: bf00 nop } } /* Ensure the name string is terminated in the case that the string length was greater or equal to configMAX_TASK_NAME_LEN. */ pxNewTCB->pcTaskName[ configMAX_TASK_NAME_LEN - 1 ] = '\0'; 8005832: 6b3b ldr r3, [r7, #48] @ 0x30 8005834: 2200 movs r2, #0 8005836: f883 2043 strb.w r2, [r3, #67] @ 0x43 800583a: e003 b.n 8005844 } else { /* The task has not been given a name, so just ensure there is a NULL terminator when it is read out. */ pxNewTCB->pcTaskName[ 0 ] = 0x00; 800583c: 6b3b ldr r3, [r7, #48] @ 0x30 800583e: 2200 movs r2, #0 8005840: f883 2034 strb.w r2, [r3, #52] @ 0x34 } /* This is used as an array index so must ensure it's not too large. First remove the privilege bit if one is present. */ if( uxPriority >= ( UBaseType_t ) configMAX_PRIORITIES ) 8005844: 6abb ldr r3, [r7, #40] @ 0x28 8005846: 2b06 cmp r3, #6 8005848: d901 bls.n 800584e { uxPriority = ( UBaseType_t ) configMAX_PRIORITIES - ( UBaseType_t ) 1U; 800584a: 2306 movs r3, #6 800584c: 62bb str r3, [r7, #40] @ 0x28 else { mtCOVERAGE_TEST_MARKER(); } pxNewTCB->uxPriority = uxPriority; 800584e: 6b3b ldr r3, [r7, #48] @ 0x30 8005850: 6aba ldr r2, [r7, #40] @ 0x28 8005852: 62da str r2, [r3, #44] @ 0x2c #if ( configUSE_MUTEXES == 1 ) { pxNewTCB->uxBasePriority = uxPriority; 8005854: 6b3b ldr r3, [r7, #48] @ 0x30 8005856: 6aba ldr r2, [r7, #40] @ 0x28 8005858: 64da str r2, [r3, #76] @ 0x4c pxNewTCB->uxMutexesHeld = 0; 800585a: 6b3b ldr r3, [r7, #48] @ 0x30 800585c: 2200 movs r2, #0 800585e: 651a str r2, [r3, #80] @ 0x50 } #endif /* configUSE_MUTEXES */ vListInitialiseItem( &( pxNewTCB->xStateListItem ) ); 8005860: 6b3b ldr r3, [r7, #48] @ 0x30 8005862: 3304 adds r3, #4 8005864: 4618 mov r0, r3 8005866: f7ff fe58 bl 800551a vListInitialiseItem( &( pxNewTCB->xEventListItem ) ); 800586a: 6b3b ldr r3, [r7, #48] @ 0x30 800586c: 3318 adds r3, #24 800586e: 4618 mov r0, r3 8005870: f7ff fe53 bl 800551a /* Set the pxNewTCB as a link back from the ListItem_t. This is so we can get back to the containing TCB from a generic item in a list. */ listSET_LIST_ITEM_OWNER( &( pxNewTCB->xStateListItem ), pxNewTCB ); 8005874: 6b3b ldr r3, [r7, #48] @ 0x30 8005876: 6b3a ldr r2, [r7, #48] @ 0x30 8005878: 611a str r2, [r3, #16] /* Event lists are always in priority order. */ listSET_LIST_ITEM_VALUE( &( pxNewTCB->xEventListItem ), ( TickType_t ) configMAX_PRIORITIES - ( TickType_t ) uxPriority ); /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 800587a: 6abb ldr r3, [r7, #40] @ 0x28 800587c: f1c3 0207 rsb r2, r3, #7 8005880: 6b3b ldr r3, [r7, #48] @ 0x30 8005882: 619a str r2, [r3, #24] listSET_LIST_ITEM_OWNER( &( pxNewTCB->xEventListItem ), pxNewTCB ); 8005884: 6b3b ldr r3, [r7, #48] @ 0x30 8005886: 6b3a ldr r2, [r7, #48] @ 0x30 8005888: 625a str r2, [r3, #36] @ 0x24 } #endif /* configUSE_APPLICATION_TASK_TAG */ #if ( configGENERATE_RUN_TIME_STATS == 1 ) { pxNewTCB->ulRunTimeCounter = 0UL; 800588a: 6b3b ldr r3, [r7, #48] @ 0x30 800588c: 2200 movs r2, #0 800588e: 655a str r2, [r3, #84] @ 0x54 } #endif #if ( configUSE_TASK_NOTIFICATIONS == 1 ) { pxNewTCB->ulNotifiedValue = 0; 8005890: 6b3b ldr r3, [r7, #48] @ 0x30 8005892: 2200 movs r2, #0 8005894: f8c3 20a4 str.w r2, [r3, #164] @ 0xa4 pxNewTCB->ucNotifyState = taskNOT_WAITING_NOTIFICATION; 8005898: 6b3b ldr r3, [r7, #48] @ 0x30 800589a: 2200 movs r2, #0 800589c: f883 20a8 strb.w r2, [r3, #168] @ 0xa8 #endif #if ( configUSE_NEWLIB_REENTRANT == 1 ) { /* Initialise this task's Newlib reent structure. */ _REENT_INIT_PTR( ( &( pxNewTCB->xNewLib_reent ) ) ); 80058a0: 6b3b ldr r3, [r7, #48] @ 0x30 80058a2: 3358 adds r3, #88 @ 0x58 80058a4: 224c movs r2, #76 @ 0x4c 80058a6: 2100 movs r1, #0 80058a8: 4618 mov r0, r3 80058aa: f001 fa7d bl 8006da8 80058ae: 6b3b ldr r3, [r7, #48] @ 0x30 80058b0: 4a0c ldr r2, [pc, #48] @ (80058e4 ) 80058b2: 65da str r2, [r3, #92] @ 0x5c 80058b4: 6b3b ldr r3, [r7, #48] @ 0x30 80058b6: 4a0c ldr r2, [pc, #48] @ (80058e8 ) 80058b8: 661a str r2, [r3, #96] @ 0x60 80058ba: 6b3b ldr r3, [r7, #48] @ 0x30 80058bc: 4a0b ldr r2, [pc, #44] @ (80058ec ) 80058be: 665a str r2, [r3, #100] @ 0x64 } #endif /* portSTACK_GROWTH */ } #else /* portHAS_STACK_OVERFLOW_CHECKING */ { pxNewTCB->pxTopOfStack = pxPortInitialiseStack( pxTopOfStack, pxTaskCode, pvParameters ); 80058c0: 683a ldr r2, [r7, #0] 80058c2: 68f9 ldr r1, [r7, #12] 80058c4: 69b8 ldr r0, [r7, #24] 80058c6: f000 fc57 bl 8006178 80058ca: 4602 mov r2, r0 80058cc: 6b3b ldr r3, [r7, #48] @ 0x30 80058ce: 601a str r2, [r3, #0] } #endif /* portHAS_STACK_OVERFLOW_CHECKING */ } #endif /* portUSING_MPU_WRAPPERS */ if( pxCreatedTask != NULL ) 80058d0: 6afb ldr r3, [r7, #44] @ 0x2c 80058d2: 2b00 cmp r3, #0 80058d4: d002 beq.n 80058dc { /* Pass the handle out in an anonymous way. The handle can be used to change the created task's priority, delete the created task, etc.*/ *pxCreatedTask = ( TaskHandle_t ) pxNewTCB; 80058d6: 6afb ldr r3, [r7, #44] @ 0x2c 80058d8: 6b3a ldr r2, [r7, #48] @ 0x30 80058da: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } 80058dc: bf00 nop 80058de: 3720 adds r7, #32 80058e0: 46bd mov sp, r7 80058e2: bd80 pop {r7, pc} 80058e4: 20008854 .word 0x20008854 80058e8: 200088bc .word 0x200088bc 80058ec: 20008924 .word 0x20008924 080058f0 : /*-----------------------------------------------------------*/ static void prvAddNewTaskToReadyList( TCB_t *pxNewTCB ) { 80058f0: b580 push {r7, lr} 80058f2: b082 sub sp, #8 80058f4: af00 add r7, sp, #0 80058f6: 6078 str r0, [r7, #4] /* Ensure interrupts don't access the task lists while the lists are being updated. */ taskENTER_CRITICAL(); 80058f8: f000 fd50 bl 800639c { uxCurrentNumberOfTasks++; 80058fc: 4b2c ldr r3, [pc, #176] @ (80059b0 ) 80058fe: 681b ldr r3, [r3, #0] 8005900: 3301 adds r3, #1 8005902: 4a2b ldr r2, [pc, #172] @ (80059b0 ) 8005904: 6013 str r3, [r2, #0] if( pxCurrentTCB == NULL ) 8005906: 4b2b ldr r3, [pc, #172] @ (80059b4 ) 8005908: 681b ldr r3, [r3, #0] 800590a: 2b00 cmp r3, #0 800590c: d109 bne.n 8005922 { /* There are no other tasks, or all the other tasks are in the suspended state - make this the current task. */ pxCurrentTCB = pxNewTCB; 800590e: 4a29 ldr r2, [pc, #164] @ (80059b4 ) 8005910: 687b ldr r3, [r7, #4] 8005912: 6013 str r3, [r2, #0] if( uxCurrentNumberOfTasks == ( UBaseType_t ) 1 ) 8005914: 4b26 ldr r3, [pc, #152] @ (80059b0 ) 8005916: 681b ldr r3, [r3, #0] 8005918: 2b01 cmp r3, #1 800591a: d110 bne.n 800593e { /* This is the first task to be created so do the preliminary initialisation required. We will not recover if this call fails, but we will report the failure. */ prvInitialiseTaskLists(); 800591c: f000 fb00 bl 8005f20 8005920: e00d b.n 800593e else { /* If the scheduler is not already running, make this task the current task if it is the highest priority task to be created so far. */ if( xSchedulerRunning == pdFALSE ) 8005922: 4b25 ldr r3, [pc, #148] @ (80059b8 ) 8005924: 681b ldr r3, [r3, #0] 8005926: 2b00 cmp r3, #0 8005928: d109 bne.n 800593e { if( pxCurrentTCB->uxPriority <= pxNewTCB->uxPriority ) 800592a: 4b22 ldr r3, [pc, #136] @ (80059b4 ) 800592c: 681b ldr r3, [r3, #0] 800592e: 6ada ldr r2, [r3, #44] @ 0x2c 8005930: 687b ldr r3, [r7, #4] 8005932: 6adb ldr r3, [r3, #44] @ 0x2c 8005934: 429a cmp r2, r3 8005936: d802 bhi.n 800593e { pxCurrentTCB = pxNewTCB; 8005938: 4a1e ldr r2, [pc, #120] @ (80059b4 ) 800593a: 687b ldr r3, [r7, #4] 800593c: 6013 str r3, [r2, #0] { mtCOVERAGE_TEST_MARKER(); } } uxTaskNumber++; 800593e: 4b1f ldr r3, [pc, #124] @ (80059bc ) 8005940: 681b ldr r3, [r3, #0] 8005942: 3301 adds r3, #1 8005944: 4a1d ldr r2, [pc, #116] @ (80059bc ) 8005946: 6013 str r3, [r2, #0] #if ( configUSE_TRACE_FACILITY == 1 ) { /* Add a counter into the TCB for tracing only. */ pxNewTCB->uxTCBNumber = uxTaskNumber; 8005948: 4b1c ldr r3, [pc, #112] @ (80059bc ) 800594a: 681a ldr r2, [r3, #0] 800594c: 687b ldr r3, [r7, #4] 800594e: 645a str r2, [r3, #68] @ 0x44 } #endif /* configUSE_TRACE_FACILITY */ traceTASK_CREATE( pxNewTCB ); prvAddTaskToReadyList( pxNewTCB ); 8005950: 687b ldr r3, [r7, #4] 8005952: 6adb ldr r3, [r3, #44] @ 0x2c 8005954: 2201 movs r2, #1 8005956: 409a lsls r2, r3 8005958: 4b19 ldr r3, [pc, #100] @ (80059c0 ) 800595a: 681b ldr r3, [r3, #0] 800595c: 4313 orrs r3, r2 800595e: 4a18 ldr r2, [pc, #96] @ (80059c0 ) 8005960: 6013 str r3, [r2, #0] 8005962: 687b ldr r3, [r7, #4] 8005964: 6ada ldr r2, [r3, #44] @ 0x2c 8005966: 4613 mov r3, r2 8005968: 009b lsls r3, r3, #2 800596a: 4413 add r3, r2 800596c: 009b lsls r3, r3, #2 800596e: 4a15 ldr r2, [pc, #84] @ (80059c4 ) 8005970: 441a add r2, r3 8005972: 687b ldr r3, [r7, #4] 8005974: 3304 adds r3, #4 8005976: 4619 mov r1, r3 8005978: 4610 mov r0, r2 800597a: f7ff fddb bl 8005534 portSETUP_TCB( pxNewTCB ); } taskEXIT_CRITICAL(); 800597e: f000 fd43 bl 8006408 if( xSchedulerRunning != pdFALSE ) 8005982: 4b0d ldr r3, [pc, #52] @ (80059b8 ) 8005984: 681b ldr r3, [r3, #0] 8005986: 2b00 cmp r3, #0 8005988: d00e beq.n 80059a8 { /* If the created task is of a higher priority than the current task then it should run now. */ if( pxCurrentTCB->uxPriority < pxNewTCB->uxPriority ) 800598a: 4b0a ldr r3, [pc, #40] @ (80059b4 ) 800598c: 681b ldr r3, [r3, #0] 800598e: 6ada ldr r2, [r3, #44] @ 0x2c 8005990: 687b ldr r3, [r7, #4] 8005992: 6adb ldr r3, [r3, #44] @ 0x2c 8005994: 429a cmp r2, r3 8005996: d207 bcs.n 80059a8 { taskYIELD_IF_USING_PREEMPTION(); 8005998: 4b0b ldr r3, [pc, #44] @ (80059c8 ) 800599a: f04f 5280 mov.w r2, #268435456 @ 0x10000000 800599e: 601a str r2, [r3, #0] 80059a0: f3bf 8f4f dsb sy 80059a4: f3bf 8f6f isb sy } else { mtCOVERAGE_TEST_MARKER(); } } 80059a8: bf00 nop 80059aa: 3708 adds r7, #8 80059ac: 46bd mov sp, r7 80059ae: bd80 pop {r7, pc} 80059b0: 20000800 .word 0x20000800 80059b4: 20000700 .word 0x20000700 80059b8: 2000080c .word 0x2000080c 80059bc: 2000081c .word 0x2000081c 80059c0: 20000808 .word 0x20000808 80059c4: 20000704 .word 0x20000704 80059c8: e000ed04 .word 0xe000ed04 080059cc : /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelay == 1 ) void vTaskDelay( const TickType_t xTicksToDelay ) { 80059cc: b580 push {r7, lr} 80059ce: b084 sub sp, #16 80059d0: af00 add r7, sp, #0 80059d2: 6078 str r0, [r7, #4] BaseType_t xAlreadyYielded = pdFALSE; 80059d4: 2300 movs r3, #0 80059d6: 60fb str r3, [r7, #12] /* A delay time of zero just forces a reschedule. */ if( xTicksToDelay > ( TickType_t ) 0U ) 80059d8: 687b ldr r3, [r7, #4] 80059da: 2b00 cmp r3, #0 80059dc: d01a beq.n 8005a14 { configASSERT( uxSchedulerSuspended == 0 ); 80059de: 4b15 ldr r3, [pc, #84] @ (8005a34 ) 80059e0: 681b ldr r3, [r3, #0] 80059e2: 2b00 cmp r3, #0 80059e4: d00d beq.n 8005a02 __asm volatile 80059e6: f04f 0350 mov.w r3, #80 @ 0x50 80059ea: b672 cpsid i 80059ec: f383 8811 msr BASEPRI, r3 80059f0: f3bf 8f6f isb sy 80059f4: f3bf 8f4f dsb sy 80059f8: b662 cpsie i 80059fa: 60bb str r3, [r7, #8] } 80059fc: bf00 nop 80059fe: bf00 nop 8005a00: e7fd b.n 80059fe vTaskSuspendAll(); 8005a02: f000 f88b bl 8005b1c list or removed from the blocked list until the scheduler is resumed. This task cannot be in an event list as it is the currently executing task. */ prvAddCurrentTaskToDelayedList( xTicksToDelay, pdFALSE ); 8005a06: 2100 movs r1, #0 8005a08: 6878 ldr r0, [r7, #4] 8005a0a: f000 fb4f bl 80060ac } xAlreadyYielded = xTaskResumeAll(); 8005a0e: f000 f893 bl 8005b38 8005a12: 60f8 str r0, [r7, #12] mtCOVERAGE_TEST_MARKER(); } /* Force a reschedule if xTaskResumeAll has not already done so, we may have put ourselves to sleep. */ if( xAlreadyYielded == pdFALSE ) 8005a14: 68fb ldr r3, [r7, #12] 8005a16: 2b00 cmp r3, #0 8005a18: d107 bne.n 8005a2a { portYIELD_WITHIN_API(); 8005a1a: 4b07 ldr r3, [pc, #28] @ (8005a38 ) 8005a1c: f04f 5280 mov.w r2, #268435456 @ 0x10000000 8005a20: 601a str r2, [r3, #0] 8005a22: f3bf 8f4f dsb sy 8005a26: f3bf 8f6f isb sy } else { mtCOVERAGE_TEST_MARKER(); } } 8005a2a: bf00 nop 8005a2c: 3710 adds r7, #16 8005a2e: 46bd mov sp, r7 8005a30: bd80 pop {r7, pc} 8005a32: bf00 nop 8005a34: 20000828 .word 0x20000828 8005a38: e000ed04 .word 0xe000ed04 08005a3c : #endif /* ( ( INCLUDE_xTaskResumeFromISR == 1 ) && ( INCLUDE_vTaskSuspend == 1 ) ) */ /*-----------------------------------------------------------*/ void vTaskStartScheduler( void ) { 8005a3c: b580 push {r7, lr} 8005a3e: b08a sub sp, #40 @ 0x28 8005a40: af04 add r7, sp, #16 BaseType_t xReturn; /* Add the idle task at the lowest priority. */ #if( configSUPPORT_STATIC_ALLOCATION == 1 ) { StaticTask_t *pxIdleTaskTCBBuffer = NULL; 8005a42: 2300 movs r3, #0 8005a44: 60bb str r3, [r7, #8] StackType_t *pxIdleTaskStackBuffer = NULL; 8005a46: 2300 movs r3, #0 8005a48: 607b str r3, [r7, #4] uint32_t ulIdleTaskStackSize; /* The Idle task is created using user provided RAM - obtain the address of the RAM then create the idle task. */ vApplicationGetIdleTaskMemory( &pxIdleTaskTCBBuffer, &pxIdleTaskStackBuffer, &ulIdleTaskStackSize ); 8005a4a: 463a mov r2, r7 8005a4c: 1d39 adds r1, r7, #4 8005a4e: f107 0308 add.w r3, r7, #8 8005a52: 4618 mov r0, r3 8005a54: f7fb f9fc bl 8000e50 xIdleTaskHandle = xTaskCreateStatic( prvIdleTask, 8005a58: 6839 ldr r1, [r7, #0] 8005a5a: 687b ldr r3, [r7, #4] 8005a5c: 68ba ldr r2, [r7, #8] 8005a5e: 9202 str r2, [sp, #8] 8005a60: 9301 str r3, [sp, #4] 8005a62: 2300 movs r3, #0 8005a64: 9300 str r3, [sp, #0] 8005a66: 2300 movs r3, #0 8005a68: 460a mov r2, r1 8005a6a: 4924 ldr r1, [pc, #144] @ (8005afc ) 8005a6c: 4824 ldr r0, [pc, #144] @ (8005b00 ) 8005a6e: f7ff fde8 bl 8005642 8005a72: 4603 mov r3, r0 8005a74: 4a23 ldr r2, [pc, #140] @ (8005b04 ) 8005a76: 6013 str r3, [r2, #0] ( void * ) NULL, /*lint !e961. The cast is not redundant for all compilers. */ portPRIVILEGE_BIT, /* In effect ( tskIDLE_PRIORITY | portPRIVILEGE_BIT ), but tskIDLE_PRIORITY is zero. */ pxIdleTaskStackBuffer, pxIdleTaskTCBBuffer ); /*lint !e961 MISRA exception, justified as it is not a redundant explicit cast to all supported compilers. */ if( xIdleTaskHandle != NULL ) 8005a78: 4b22 ldr r3, [pc, #136] @ (8005b04 ) 8005a7a: 681b ldr r3, [r3, #0] 8005a7c: 2b00 cmp r3, #0 8005a7e: d002 beq.n 8005a86 { xReturn = pdPASS; 8005a80: 2301 movs r3, #1 8005a82: 617b str r3, [r7, #20] 8005a84: e001 b.n 8005a8a } else { xReturn = pdFAIL; 8005a86: 2300 movs r3, #0 8005a88: 617b str r3, [r7, #20] mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_TIMERS */ if( xReturn == pdPASS ) 8005a8a: 697b ldr r3, [r7, #20] 8005a8c: 2b01 cmp r3, #1 8005a8e: d11f bne.n 8005ad0 __asm volatile 8005a90: f04f 0350 mov.w r3, #80 @ 0x50 8005a94: b672 cpsid i 8005a96: f383 8811 msr BASEPRI, r3 8005a9a: f3bf 8f6f isb sy 8005a9e: f3bf 8f4f dsb sy 8005aa2: b662 cpsie i 8005aa4: 613b str r3, [r7, #16] } 8005aa6: bf00 nop #if ( configUSE_NEWLIB_REENTRANT == 1 ) { /* Switch Newlib's _impure_ptr variable to point to the _reent structure specific to the task that will run first. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); 8005aa8: 4b17 ldr r3, [pc, #92] @ (8005b08 ) 8005aaa: 681b ldr r3, [r3, #0] 8005aac: 3358 adds r3, #88 @ 0x58 8005aae: 4a17 ldr r2, [pc, #92] @ (8005b0c ) 8005ab0: 6013 str r3, [r2, #0] } #endif /* configUSE_NEWLIB_REENTRANT */ xNextTaskUnblockTime = portMAX_DELAY; 8005ab2: 4b17 ldr r3, [pc, #92] @ (8005b10 ) 8005ab4: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8005ab8: 601a str r2, [r3, #0] xSchedulerRunning = pdTRUE; 8005aba: 4b16 ldr r3, [pc, #88] @ (8005b14 ) 8005abc: 2201 movs r2, #1 8005abe: 601a str r2, [r3, #0] xTickCount = ( TickType_t ) configINITIAL_TICK_COUNT; 8005ac0: 4b15 ldr r3, [pc, #84] @ (8005b18 ) 8005ac2: 2200 movs r2, #0 8005ac4: 601a str r2, [r3, #0] macro must be defined to configure the timer/counter used to generate the run time counter time base. NOTE: If configGENERATE_RUN_TIME_STATS is set to 0 and the following line fails to build then ensure you do not have portCONFIGURE_TIMER_FOR_RUN_TIME_STATS() defined in your FreeRTOSConfig.h file. */ portCONFIGURE_TIMER_FOR_RUN_TIME_STATS(); 8005ac6: f7fb f9b3 bl 8000e30 traceTASK_SWITCHED_IN(); /* Setting up the timer tick is hardware specific and thus in the portable interface. */ if( xPortStartScheduler() != pdFALSE ) 8005aca: f000 fbe9 bl 80062a0 } /* Prevent compiler warnings if INCLUDE_xTaskGetIdleTaskHandle is set to 0, meaning xIdleTaskHandle is not used anywhere else. */ ( void ) xIdleTaskHandle; } 8005ace: e011 b.n 8005af4 configASSERT( xReturn != errCOULD_NOT_ALLOCATE_REQUIRED_MEMORY ); 8005ad0: 697b ldr r3, [r7, #20] 8005ad2: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 8005ad6: d10d bne.n 8005af4 __asm volatile 8005ad8: f04f 0350 mov.w r3, #80 @ 0x50 8005adc: b672 cpsid i 8005ade: f383 8811 msr BASEPRI, r3 8005ae2: f3bf 8f6f isb sy 8005ae6: f3bf 8f4f dsb sy 8005aea: b662 cpsie i 8005aec: 60fb str r3, [r7, #12] } 8005aee: bf00 nop 8005af0: bf00 nop 8005af2: e7fd b.n 8005af0 } 8005af4: bf00 nop 8005af6: 3718 adds r7, #24 8005af8: 46bd mov sp, r7 8005afa: bd80 pop {r7, pc} 8005afc: 08007ab0 .word 0x08007ab0 8005b00: 08005ef1 .word 0x08005ef1 8005b04: 20000824 .word 0x20000824 8005b08: 20000700 .word 0x20000700 8005b0c: 20000024 .word 0x20000024 8005b10: 20000820 .word 0x20000820 8005b14: 2000080c .word 0x2000080c 8005b18: 20000804 .word 0x20000804 08005b1c : vPortEndScheduler(); } /*----------------------------------------------------------*/ void vTaskSuspendAll( void ) { 8005b1c: b480 push {r7} 8005b1e: af00 add r7, sp, #0 /* A critical section is not required as the variable is of type BaseType_t. Please read Richard Barry's reply in the following link to a post in the FreeRTOS support forum before reporting this as a bug! - http://goo.gl/wu4acr */ ++uxSchedulerSuspended; 8005b20: 4b04 ldr r3, [pc, #16] @ (8005b34 ) 8005b22: 681b ldr r3, [r3, #0] 8005b24: 3301 adds r3, #1 8005b26: 4a03 ldr r2, [pc, #12] @ (8005b34 ) 8005b28: 6013 str r3, [r2, #0] portMEMORY_BARRIER(); } 8005b2a: bf00 nop 8005b2c: 46bd mov sp, r7 8005b2e: f85d 7b04 ldr.w r7, [sp], #4 8005b32: 4770 bx lr 8005b34: 20000828 .word 0x20000828 08005b38 : #endif /* configUSE_TICKLESS_IDLE */ /*----------------------------------------------------------*/ BaseType_t xTaskResumeAll( void ) { 8005b38: b580 push {r7, lr} 8005b3a: b084 sub sp, #16 8005b3c: af00 add r7, sp, #0 TCB_t *pxTCB = NULL; 8005b3e: 2300 movs r3, #0 8005b40: 60fb str r3, [r7, #12] BaseType_t xAlreadyYielded = pdFALSE; 8005b42: 2300 movs r3, #0 8005b44: 60bb str r3, [r7, #8] /* If uxSchedulerSuspended is zero then this function does not match a previous call to vTaskSuspendAll(). */ configASSERT( uxSchedulerSuspended ); 8005b46: 4b43 ldr r3, [pc, #268] @ (8005c54 ) 8005b48: 681b ldr r3, [r3, #0] 8005b4a: 2b00 cmp r3, #0 8005b4c: d10d bne.n 8005b6a __asm volatile 8005b4e: f04f 0350 mov.w r3, #80 @ 0x50 8005b52: b672 cpsid i 8005b54: f383 8811 msr BASEPRI, r3 8005b58: f3bf 8f6f isb sy 8005b5c: f3bf 8f4f dsb sy 8005b60: b662 cpsie i 8005b62: 603b str r3, [r7, #0] } 8005b64: bf00 nop 8005b66: bf00 nop 8005b68: e7fd b.n 8005b66 /* It is possible that an ISR caused a task to be removed from an event list while the scheduler was suspended. If this was the case then the removed task will have been added to the xPendingReadyList. Once the scheduler has been resumed it is safe to move all the pending ready tasks from this list into their appropriate ready list. */ taskENTER_CRITICAL(); 8005b6a: f000 fc17 bl 800639c { --uxSchedulerSuspended; 8005b6e: 4b39 ldr r3, [pc, #228] @ (8005c54 ) 8005b70: 681b ldr r3, [r3, #0] 8005b72: 3b01 subs r3, #1 8005b74: 4a37 ldr r2, [pc, #220] @ (8005c54 ) 8005b76: 6013 str r3, [r2, #0] if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 8005b78: 4b36 ldr r3, [pc, #216] @ (8005c54 ) 8005b7a: 681b ldr r3, [r3, #0] 8005b7c: 2b00 cmp r3, #0 8005b7e: d161 bne.n 8005c44 { if( uxCurrentNumberOfTasks > ( UBaseType_t ) 0U ) 8005b80: 4b35 ldr r3, [pc, #212] @ (8005c58 ) 8005b82: 681b ldr r3, [r3, #0] 8005b84: 2b00 cmp r3, #0 8005b86: d05d beq.n 8005c44 { /* Move any readied tasks from the pending list into the appropriate ready list. */ while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) 8005b88: e02e b.n 8005be8 { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xPendingReadyList ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 8005b8a: 4b34 ldr r3, [pc, #208] @ (8005c5c ) 8005b8c: 68db ldr r3, [r3, #12] 8005b8e: 68db ldr r3, [r3, #12] 8005b90: 60fb str r3, [r7, #12] ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); 8005b92: 68fb ldr r3, [r7, #12] 8005b94: 3318 adds r3, #24 8005b96: 4618 mov r0, r3 8005b98: f7ff fd29 bl 80055ee ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 8005b9c: 68fb ldr r3, [r7, #12] 8005b9e: 3304 adds r3, #4 8005ba0: 4618 mov r0, r3 8005ba2: f7ff fd24 bl 80055ee prvAddTaskToReadyList( pxTCB ); 8005ba6: 68fb ldr r3, [r7, #12] 8005ba8: 6adb ldr r3, [r3, #44] @ 0x2c 8005baa: 2201 movs r2, #1 8005bac: 409a lsls r2, r3 8005bae: 4b2c ldr r3, [pc, #176] @ (8005c60 ) 8005bb0: 681b ldr r3, [r3, #0] 8005bb2: 4313 orrs r3, r2 8005bb4: 4a2a ldr r2, [pc, #168] @ (8005c60 ) 8005bb6: 6013 str r3, [r2, #0] 8005bb8: 68fb ldr r3, [r7, #12] 8005bba: 6ada ldr r2, [r3, #44] @ 0x2c 8005bbc: 4613 mov r3, r2 8005bbe: 009b lsls r3, r3, #2 8005bc0: 4413 add r3, r2 8005bc2: 009b lsls r3, r3, #2 8005bc4: 4a27 ldr r2, [pc, #156] @ (8005c64 ) 8005bc6: 441a add r2, r3 8005bc8: 68fb ldr r3, [r7, #12] 8005bca: 3304 adds r3, #4 8005bcc: 4619 mov r1, r3 8005bce: 4610 mov r0, r2 8005bd0: f7ff fcb0 bl 8005534 /* If the moved task has a priority higher than the current task then a yield must be performed. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) 8005bd4: 68fb ldr r3, [r7, #12] 8005bd6: 6ada ldr r2, [r3, #44] @ 0x2c 8005bd8: 4b23 ldr r3, [pc, #140] @ (8005c68 ) 8005bda: 681b ldr r3, [r3, #0] 8005bdc: 6adb ldr r3, [r3, #44] @ 0x2c 8005bde: 429a cmp r2, r3 8005be0: d302 bcc.n 8005be8 { xYieldPending = pdTRUE; 8005be2: 4b22 ldr r3, [pc, #136] @ (8005c6c ) 8005be4: 2201 movs r2, #1 8005be6: 601a str r2, [r3, #0] while( listLIST_IS_EMPTY( &xPendingReadyList ) == pdFALSE ) 8005be8: 4b1c ldr r3, [pc, #112] @ (8005c5c ) 8005bea: 681b ldr r3, [r3, #0] 8005bec: 2b00 cmp r3, #0 8005bee: d1cc bne.n 8005b8a { mtCOVERAGE_TEST_MARKER(); } } if( pxTCB != NULL ) 8005bf0: 68fb ldr r3, [r7, #12] 8005bf2: 2b00 cmp r3, #0 8005bf4: d001 beq.n 8005bfa which may have prevented the next unblock time from being re-calculated, in which case re-calculate it now. Mainly important for low power tickless implementations, where this can prevent an unnecessary exit from low power state. */ prvResetNextTaskUnblockTime(); 8005bf6: f000 fa39 bl 800606c /* If any ticks occurred while the scheduler was suspended then they should be processed now. This ensures the tick count does not slip, and that any delayed tasks are resumed at the correct time. */ { UBaseType_t uxPendedCounts = uxPendedTicks; /* Non-volatile copy. */ 8005bfa: 4b1d ldr r3, [pc, #116] @ (8005c70 ) 8005bfc: 681b ldr r3, [r3, #0] 8005bfe: 607b str r3, [r7, #4] if( uxPendedCounts > ( UBaseType_t ) 0U ) 8005c00: 687b ldr r3, [r7, #4] 8005c02: 2b00 cmp r3, #0 8005c04: d010 beq.n 8005c28 { do { if( xTaskIncrementTick() != pdFALSE ) 8005c06: f000 f837 bl 8005c78 8005c0a: 4603 mov r3, r0 8005c0c: 2b00 cmp r3, #0 8005c0e: d002 beq.n 8005c16 { xYieldPending = pdTRUE; 8005c10: 4b16 ldr r3, [pc, #88] @ (8005c6c ) 8005c12: 2201 movs r2, #1 8005c14: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } --uxPendedCounts; 8005c16: 687b ldr r3, [r7, #4] 8005c18: 3b01 subs r3, #1 8005c1a: 607b str r3, [r7, #4] } while( uxPendedCounts > ( UBaseType_t ) 0U ); 8005c1c: 687b ldr r3, [r7, #4] 8005c1e: 2b00 cmp r3, #0 8005c20: d1f1 bne.n 8005c06 uxPendedTicks = 0; 8005c22: 4b13 ldr r3, [pc, #76] @ (8005c70 ) 8005c24: 2200 movs r2, #0 8005c26: 601a str r2, [r3, #0] { mtCOVERAGE_TEST_MARKER(); } } if( xYieldPending != pdFALSE ) 8005c28: 4b10 ldr r3, [pc, #64] @ (8005c6c ) 8005c2a: 681b ldr r3, [r3, #0] 8005c2c: 2b00 cmp r3, #0 8005c2e: d009 beq.n 8005c44 { #if( configUSE_PREEMPTION != 0 ) { xAlreadyYielded = pdTRUE; 8005c30: 2301 movs r3, #1 8005c32: 60bb str r3, [r7, #8] } #endif taskYIELD_IF_USING_PREEMPTION(); 8005c34: 4b0f ldr r3, [pc, #60] @ (8005c74 ) 8005c36: f04f 5280 mov.w r2, #268435456 @ 0x10000000 8005c3a: 601a str r2, [r3, #0] 8005c3c: f3bf 8f4f dsb sy 8005c40: f3bf 8f6f isb sy else { mtCOVERAGE_TEST_MARKER(); } } taskEXIT_CRITICAL(); 8005c44: f000 fbe0 bl 8006408 return xAlreadyYielded; 8005c48: 68bb ldr r3, [r7, #8] } 8005c4a: 4618 mov r0, r3 8005c4c: 3710 adds r7, #16 8005c4e: 46bd mov sp, r7 8005c50: bd80 pop {r7, pc} 8005c52: bf00 nop 8005c54: 20000828 .word 0x20000828 8005c58: 20000800 .word 0x20000800 8005c5c: 200007c0 .word 0x200007c0 8005c60: 20000808 .word 0x20000808 8005c64: 20000704 .word 0x20000704 8005c68: 20000700 .word 0x20000700 8005c6c: 20000814 .word 0x20000814 8005c70: 20000810 .word 0x20000810 8005c74: e000ed04 .word 0xe000ed04 08005c78 : #endif /* INCLUDE_xTaskAbortDelay */ /*----------------------------------------------------------*/ BaseType_t xTaskIncrementTick( void ) { 8005c78: b580 push {r7, lr} 8005c7a: b086 sub sp, #24 8005c7c: af00 add r7, sp, #0 TCB_t * pxTCB; TickType_t xItemValue; BaseType_t xSwitchRequired = pdFALSE; 8005c7e: 2300 movs r3, #0 8005c80: 617b str r3, [r7, #20] /* Called by the portable layer each time a tick interrupt occurs. Increments the tick then checks to see if the new tick value will cause any tasks to be unblocked. */ traceTASK_INCREMENT_TICK( xTickCount ); if( uxSchedulerSuspended == ( UBaseType_t ) pdFALSE ) 8005c82: 4b50 ldr r3, [pc, #320] @ (8005dc4 ) 8005c84: 681b ldr r3, [r3, #0] 8005c86: 2b00 cmp r3, #0 8005c88: f040 808b bne.w 8005da2 { /* Minor optimisation. The tick count cannot change in this block. */ const TickType_t xConstTickCount = xTickCount + ( TickType_t ) 1; 8005c8c: 4b4e ldr r3, [pc, #312] @ (8005dc8 ) 8005c8e: 681b ldr r3, [r3, #0] 8005c90: 3301 adds r3, #1 8005c92: 613b str r3, [r7, #16] /* Increment the RTOS tick, switching the delayed and overflowed delayed lists if it wraps to 0. */ xTickCount = xConstTickCount; 8005c94: 4a4c ldr r2, [pc, #304] @ (8005dc8 ) 8005c96: 693b ldr r3, [r7, #16] 8005c98: 6013 str r3, [r2, #0] if( xConstTickCount == ( TickType_t ) 0U ) /*lint !e774 'if' does not always evaluate to false as it is looking for an overflow. */ 8005c9a: 693b ldr r3, [r7, #16] 8005c9c: 2b00 cmp r3, #0 8005c9e: d123 bne.n 8005ce8 { taskSWITCH_DELAYED_LISTS(); 8005ca0: 4b4a ldr r3, [pc, #296] @ (8005dcc ) 8005ca2: 681b ldr r3, [r3, #0] 8005ca4: 681b ldr r3, [r3, #0] 8005ca6: 2b00 cmp r3, #0 8005ca8: d00d beq.n 8005cc6 __asm volatile 8005caa: f04f 0350 mov.w r3, #80 @ 0x50 8005cae: b672 cpsid i 8005cb0: f383 8811 msr BASEPRI, r3 8005cb4: f3bf 8f6f isb sy 8005cb8: f3bf 8f4f dsb sy 8005cbc: b662 cpsie i 8005cbe: 603b str r3, [r7, #0] } 8005cc0: bf00 nop 8005cc2: bf00 nop 8005cc4: e7fd b.n 8005cc2 8005cc6: 4b41 ldr r3, [pc, #260] @ (8005dcc ) 8005cc8: 681b ldr r3, [r3, #0] 8005cca: 60fb str r3, [r7, #12] 8005ccc: 4b40 ldr r3, [pc, #256] @ (8005dd0 ) 8005cce: 681b ldr r3, [r3, #0] 8005cd0: 4a3e ldr r2, [pc, #248] @ (8005dcc ) 8005cd2: 6013 str r3, [r2, #0] 8005cd4: 4a3e ldr r2, [pc, #248] @ (8005dd0 ) 8005cd6: 68fb ldr r3, [r7, #12] 8005cd8: 6013 str r3, [r2, #0] 8005cda: 4b3e ldr r3, [pc, #248] @ (8005dd4 ) 8005cdc: 681b ldr r3, [r3, #0] 8005cde: 3301 adds r3, #1 8005ce0: 4a3c ldr r2, [pc, #240] @ (8005dd4 ) 8005ce2: 6013 str r3, [r2, #0] 8005ce4: f000 f9c2 bl 800606c /* See if this tick has made a timeout expire. Tasks are stored in the queue in the order of their wake time - meaning once one task has been found whose block time has not expired there is no need to look any further down the list. */ if( xConstTickCount >= xNextTaskUnblockTime ) 8005ce8: 4b3b ldr r3, [pc, #236] @ (8005dd8 ) 8005cea: 681b ldr r3, [r3, #0] 8005cec: 693a ldr r2, [r7, #16] 8005cee: 429a cmp r2, r3 8005cf0: d348 bcc.n 8005d84 { for( ;; ) { if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 8005cf2: 4b36 ldr r3, [pc, #216] @ (8005dcc ) 8005cf4: 681b ldr r3, [r3, #0] 8005cf6: 681b ldr r3, [r3, #0] 8005cf8: 2b00 cmp r3, #0 8005cfa: d104 bne.n 8005d06 /* The delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass next time through. */ xNextTaskUnblockTime = portMAX_DELAY; /*lint !e961 MISRA exception as the casts are only redundant for some ports. */ 8005cfc: 4b36 ldr r3, [pc, #216] @ (8005dd8 ) 8005cfe: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8005d02: 601a str r2, [r3, #0] break; 8005d04: e03e b.n 8005d84 { /* The delayed list is not empty, get the value of the item at the head of the delayed list. This is the time at which the task at the head of the delayed list must be removed from the Blocked state. */ pxTCB = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 8005d06: 4b31 ldr r3, [pc, #196] @ (8005dcc ) 8005d08: 681b ldr r3, [r3, #0] 8005d0a: 68db ldr r3, [r3, #12] 8005d0c: 68db ldr r3, [r3, #12] 8005d0e: 60bb str r3, [r7, #8] xItemValue = listGET_LIST_ITEM_VALUE( &( pxTCB->xStateListItem ) ); 8005d10: 68bb ldr r3, [r7, #8] 8005d12: 685b ldr r3, [r3, #4] 8005d14: 607b str r3, [r7, #4] if( xConstTickCount < xItemValue ) 8005d16: 693a ldr r2, [r7, #16] 8005d18: 687b ldr r3, [r7, #4] 8005d1a: 429a cmp r2, r3 8005d1c: d203 bcs.n 8005d26 /* It is not time to unblock this item yet, but the item value is the time at which the task at the head of the blocked list must be removed from the Blocked state - so record the item value in xNextTaskUnblockTime. */ xNextTaskUnblockTime = xItemValue; 8005d1e: 4a2e ldr r2, [pc, #184] @ (8005dd8 ) 8005d20: 687b ldr r3, [r7, #4] 8005d22: 6013 str r3, [r2, #0] break; /*lint !e9011 Code structure here is deedmed easier to understand with multiple breaks. */ 8005d24: e02e b.n 8005d84 { mtCOVERAGE_TEST_MARKER(); } /* It is time to remove the item from the Blocked state. */ ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 8005d26: 68bb ldr r3, [r7, #8] 8005d28: 3304 adds r3, #4 8005d2a: 4618 mov r0, r3 8005d2c: f7ff fc5f bl 80055ee /* Is the task waiting on an event also? If so remove it from the event list. */ if( listLIST_ITEM_CONTAINER( &( pxTCB->xEventListItem ) ) != NULL ) 8005d30: 68bb ldr r3, [r7, #8] 8005d32: 6a9b ldr r3, [r3, #40] @ 0x28 8005d34: 2b00 cmp r3, #0 8005d36: d004 beq.n 8005d42 { ( void ) uxListRemove( &( pxTCB->xEventListItem ) ); 8005d38: 68bb ldr r3, [r7, #8] 8005d3a: 3318 adds r3, #24 8005d3c: 4618 mov r0, r3 8005d3e: f7ff fc56 bl 80055ee mtCOVERAGE_TEST_MARKER(); } /* Place the unblocked task into the appropriate ready list. */ prvAddTaskToReadyList( pxTCB ); 8005d42: 68bb ldr r3, [r7, #8] 8005d44: 6adb ldr r3, [r3, #44] @ 0x2c 8005d46: 2201 movs r2, #1 8005d48: 409a lsls r2, r3 8005d4a: 4b24 ldr r3, [pc, #144] @ (8005ddc ) 8005d4c: 681b ldr r3, [r3, #0] 8005d4e: 4313 orrs r3, r2 8005d50: 4a22 ldr r2, [pc, #136] @ (8005ddc ) 8005d52: 6013 str r3, [r2, #0] 8005d54: 68bb ldr r3, [r7, #8] 8005d56: 6ada ldr r2, [r3, #44] @ 0x2c 8005d58: 4613 mov r3, r2 8005d5a: 009b lsls r3, r3, #2 8005d5c: 4413 add r3, r2 8005d5e: 009b lsls r3, r3, #2 8005d60: 4a1f ldr r2, [pc, #124] @ (8005de0 ) 8005d62: 441a add r2, r3 8005d64: 68bb ldr r3, [r7, #8] 8005d66: 3304 adds r3, #4 8005d68: 4619 mov r1, r3 8005d6a: 4610 mov r0, r2 8005d6c: f7ff fbe2 bl 8005534 { /* Preemption is on, but a context switch should only be performed if the unblocked task has a priority that is equal to or higher than the currently executing task. */ if( pxTCB->uxPriority >= pxCurrentTCB->uxPriority ) 8005d70: 68bb ldr r3, [r7, #8] 8005d72: 6ada ldr r2, [r3, #44] @ 0x2c 8005d74: 4b1b ldr r3, [pc, #108] @ (8005de4 ) 8005d76: 681b ldr r3, [r3, #0] 8005d78: 6adb ldr r3, [r3, #44] @ 0x2c 8005d7a: 429a cmp r2, r3 8005d7c: d3b9 bcc.n 8005cf2 { xSwitchRequired = pdTRUE; 8005d7e: 2301 movs r3, #1 8005d80: 617b str r3, [r7, #20] if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 8005d82: e7b6 b.n 8005cf2 /* Tasks of equal priority to the currently running task will share processing time (time slice) if preemption is on, and the application writer has not explicitly turned time slicing off. */ #if ( ( configUSE_PREEMPTION == 1 ) && ( configUSE_TIME_SLICING == 1 ) ) { if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ pxCurrentTCB->uxPriority ] ) ) > ( UBaseType_t ) 1 ) 8005d84: 4b17 ldr r3, [pc, #92] @ (8005de4 ) 8005d86: 681b ldr r3, [r3, #0] 8005d88: 6ada ldr r2, [r3, #44] @ 0x2c 8005d8a: 4915 ldr r1, [pc, #84] @ (8005de0 ) 8005d8c: 4613 mov r3, r2 8005d8e: 009b lsls r3, r3, #2 8005d90: 4413 add r3, r2 8005d92: 009b lsls r3, r3, #2 8005d94: 440b add r3, r1 8005d96: 681b ldr r3, [r3, #0] 8005d98: 2b01 cmp r3, #1 8005d9a: d907 bls.n 8005dac { xSwitchRequired = pdTRUE; 8005d9c: 2301 movs r3, #1 8005d9e: 617b str r3, [r7, #20] 8005da0: e004 b.n 8005dac } #endif /* configUSE_TICK_HOOK */ } else { ++uxPendedTicks; 8005da2: 4b11 ldr r3, [pc, #68] @ (8005de8 ) 8005da4: 681b ldr r3, [r3, #0] 8005da6: 3301 adds r3, #1 8005da8: 4a0f ldr r2, [pc, #60] @ (8005de8 ) 8005daa: 6013 str r3, [r2, #0] #endif } #if ( configUSE_PREEMPTION == 1 ) { if( xYieldPending != pdFALSE ) 8005dac: 4b0f ldr r3, [pc, #60] @ (8005dec ) 8005dae: 681b ldr r3, [r3, #0] 8005db0: 2b00 cmp r3, #0 8005db2: d001 beq.n 8005db8 { xSwitchRequired = pdTRUE; 8005db4: 2301 movs r3, #1 8005db6: 617b str r3, [r7, #20] mtCOVERAGE_TEST_MARKER(); } } #endif /* configUSE_PREEMPTION */ return xSwitchRequired; 8005db8: 697b ldr r3, [r7, #20] } 8005dba: 4618 mov r0, r3 8005dbc: 3718 adds r7, #24 8005dbe: 46bd mov sp, r7 8005dc0: bd80 pop {r7, pc} 8005dc2: bf00 nop 8005dc4: 20000828 .word 0x20000828 8005dc8: 20000804 .word 0x20000804 8005dcc: 200007b8 .word 0x200007b8 8005dd0: 200007bc .word 0x200007bc 8005dd4: 20000818 .word 0x20000818 8005dd8: 20000820 .word 0x20000820 8005ddc: 20000808 .word 0x20000808 8005de0: 20000704 .word 0x20000704 8005de4: 20000700 .word 0x20000700 8005de8: 20000810 .word 0x20000810 8005dec: 20000814 .word 0x20000814 08005df0 : #endif /* configUSE_APPLICATION_TASK_TAG */ /*-----------------------------------------------------------*/ void vTaskSwitchContext( void ) { 8005df0: b580 push {r7, lr} 8005df2: b086 sub sp, #24 8005df4: af00 add r7, sp, #0 if( uxSchedulerSuspended != ( UBaseType_t ) pdFALSE ) 8005df6: 4b36 ldr r3, [pc, #216] @ (8005ed0 ) 8005df8: 681b ldr r3, [r3, #0] 8005dfa: 2b00 cmp r3, #0 8005dfc: d003 beq.n 8005e06 { /* The scheduler is currently suspended - do not allow a context switch. */ xYieldPending = pdTRUE; 8005dfe: 4b35 ldr r3, [pc, #212] @ (8005ed4 ) 8005e00: 2201 movs r2, #1 8005e02: 601a str r2, [r3, #0] structure specific to this task. */ _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); } #endif /* configUSE_NEWLIB_REENTRANT */ } } 8005e04: e060 b.n 8005ec8 xYieldPending = pdFALSE; 8005e06: 4b33 ldr r3, [pc, #204] @ (8005ed4 ) 8005e08: 2200 movs r2, #0 8005e0a: 601a str r2, [r3, #0] ulTotalRunTime = portGET_RUN_TIME_COUNTER_VALUE(); 8005e0c: f7fb f817 bl 8000e3e 8005e10: 4603 mov r3, r0 8005e12: 4a31 ldr r2, [pc, #196] @ (8005ed8 ) 8005e14: 6013 str r3, [r2, #0] if( ulTotalRunTime > ulTaskSwitchedInTime ) 8005e16: 4b30 ldr r3, [pc, #192] @ (8005ed8 ) 8005e18: 681a ldr r2, [r3, #0] 8005e1a: 4b30 ldr r3, [pc, #192] @ (8005edc ) 8005e1c: 681b ldr r3, [r3, #0] 8005e1e: 429a cmp r2, r3 8005e20: d909 bls.n 8005e36 pxCurrentTCB->ulRunTimeCounter += ( ulTotalRunTime - ulTaskSwitchedInTime ); 8005e22: 4b2f ldr r3, [pc, #188] @ (8005ee0 ) 8005e24: 681b ldr r3, [r3, #0] 8005e26: 6d59 ldr r1, [r3, #84] @ 0x54 8005e28: 4a2b ldr r2, [pc, #172] @ (8005ed8 ) 8005e2a: 6810 ldr r0, [r2, #0] 8005e2c: 4a2b ldr r2, [pc, #172] @ (8005edc ) 8005e2e: 6812 ldr r2, [r2, #0] 8005e30: 1a82 subs r2, r0, r2 8005e32: 440a add r2, r1 8005e34: 655a str r2, [r3, #84] @ 0x54 ulTaskSwitchedInTime = ulTotalRunTime; 8005e36: 4b28 ldr r3, [pc, #160] @ (8005ed8 ) 8005e38: 681b ldr r3, [r3, #0] 8005e3a: 4a28 ldr r2, [pc, #160] @ (8005edc ) 8005e3c: 6013 str r3, [r2, #0] taskSELECT_HIGHEST_PRIORITY_TASK(); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 8005e3e: 4b29 ldr r3, [pc, #164] @ (8005ee4 ) 8005e40: 681b ldr r3, [r3, #0] 8005e42: 60fb str r3, [r7, #12] __asm volatile ( "clz %0, %1" : "=r" ( ucReturn ) : "r" ( ulBitmap ) : "memory" ); 8005e44: 68fb ldr r3, [r7, #12] 8005e46: fab3 f383 clz r3, r3 8005e4a: 72fb strb r3, [r7, #11] return ucReturn; 8005e4c: 7afb ldrb r3, [r7, #11] 8005e4e: f1c3 031f rsb r3, r3, #31 8005e52: 617b str r3, [r7, #20] 8005e54: 4924 ldr r1, [pc, #144] @ (8005ee8 ) 8005e56: 697a ldr r2, [r7, #20] 8005e58: 4613 mov r3, r2 8005e5a: 009b lsls r3, r3, #2 8005e5c: 4413 add r3, r2 8005e5e: 009b lsls r3, r3, #2 8005e60: 440b add r3, r1 8005e62: 681b ldr r3, [r3, #0] 8005e64: 2b00 cmp r3, #0 8005e66: d10d bne.n 8005e84 __asm volatile 8005e68: f04f 0350 mov.w r3, #80 @ 0x50 8005e6c: b672 cpsid i 8005e6e: f383 8811 msr BASEPRI, r3 8005e72: f3bf 8f6f isb sy 8005e76: f3bf 8f4f dsb sy 8005e7a: b662 cpsie i 8005e7c: 607b str r3, [r7, #4] } 8005e7e: bf00 nop 8005e80: bf00 nop 8005e82: e7fd b.n 8005e80 8005e84: 697a ldr r2, [r7, #20] 8005e86: 4613 mov r3, r2 8005e88: 009b lsls r3, r3, #2 8005e8a: 4413 add r3, r2 8005e8c: 009b lsls r3, r3, #2 8005e8e: 4a16 ldr r2, [pc, #88] @ (8005ee8 ) 8005e90: 4413 add r3, r2 8005e92: 613b str r3, [r7, #16] 8005e94: 693b ldr r3, [r7, #16] 8005e96: 685b ldr r3, [r3, #4] 8005e98: 685a ldr r2, [r3, #4] 8005e9a: 693b ldr r3, [r7, #16] 8005e9c: 605a str r2, [r3, #4] 8005e9e: 693b ldr r3, [r7, #16] 8005ea0: 685a ldr r2, [r3, #4] 8005ea2: 693b ldr r3, [r7, #16] 8005ea4: 3308 adds r3, #8 8005ea6: 429a cmp r2, r3 8005ea8: d104 bne.n 8005eb4 8005eaa: 693b ldr r3, [r7, #16] 8005eac: 685b ldr r3, [r3, #4] 8005eae: 685a ldr r2, [r3, #4] 8005eb0: 693b ldr r3, [r7, #16] 8005eb2: 605a str r2, [r3, #4] 8005eb4: 693b ldr r3, [r7, #16] 8005eb6: 685b ldr r3, [r3, #4] 8005eb8: 68db ldr r3, [r3, #12] 8005eba: 4a09 ldr r2, [pc, #36] @ (8005ee0 ) 8005ebc: 6013 str r3, [r2, #0] _impure_ptr = &( pxCurrentTCB->xNewLib_reent ); 8005ebe: 4b08 ldr r3, [pc, #32] @ (8005ee0 ) 8005ec0: 681b ldr r3, [r3, #0] 8005ec2: 3358 adds r3, #88 @ 0x58 8005ec4: 4a09 ldr r2, [pc, #36] @ (8005eec ) 8005ec6: 6013 str r3, [r2, #0] } 8005ec8: bf00 nop 8005eca: 3718 adds r7, #24 8005ecc: 46bd mov sp, r7 8005ece: bd80 pop {r7, pc} 8005ed0: 20000828 .word 0x20000828 8005ed4: 20000814 .word 0x20000814 8005ed8: 20000830 .word 0x20000830 8005edc: 2000082c .word 0x2000082c 8005ee0: 20000700 .word 0x20000700 8005ee4: 20000808 .word 0x20000808 8005ee8: 20000704 .word 0x20000704 8005eec: 20000024 .word 0x20000024 08005ef0 : * * void prvIdleTask( void *pvParameters ); * */ static portTASK_FUNCTION( prvIdleTask, pvParameters ) { 8005ef0: b580 push {r7, lr} 8005ef2: b082 sub sp, #8 8005ef4: af00 add r7, sp, #0 8005ef6: 6078 str r0, [r7, #4] for( ;; ) { /* See if any tasks have deleted themselves - if so then the idle task is responsible for freeing the deleted task's TCB and stack. */ prvCheckTasksWaitingTermination(); 8005ef8: f000 f852 bl 8005fa0 A critical region is not required here as we are just reading from the list, and an occasional incorrect value will not matter. If the ready list at the idle priority contains more than one task then a task other than the idle task is ready to execute. */ if( listCURRENT_LIST_LENGTH( &( pxReadyTasksLists[ tskIDLE_PRIORITY ] ) ) > ( UBaseType_t ) 1 ) 8005efc: 4b06 ldr r3, [pc, #24] @ (8005f18 ) 8005efe: 681b ldr r3, [r3, #0] 8005f00: 2b01 cmp r3, #1 8005f02: d9f9 bls.n 8005ef8 { taskYIELD(); 8005f04: 4b05 ldr r3, [pc, #20] @ (8005f1c ) 8005f06: f04f 5280 mov.w r2, #268435456 @ 0x10000000 8005f0a: 601a str r2, [r3, #0] 8005f0c: f3bf 8f4f dsb sy 8005f10: f3bf 8f6f isb sy prvCheckTasksWaitingTermination(); 8005f14: e7f0 b.n 8005ef8 8005f16: bf00 nop 8005f18: 20000704 .word 0x20000704 8005f1c: e000ed04 .word 0xe000ed04 08005f20 : #endif /* portUSING_MPU_WRAPPERS */ /*-----------------------------------------------------------*/ static void prvInitialiseTaskLists( void ) { 8005f20: b580 push {r7, lr} 8005f22: b082 sub sp, #8 8005f24: af00 add r7, sp, #0 UBaseType_t uxPriority; for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) 8005f26: 2300 movs r3, #0 8005f28: 607b str r3, [r7, #4] 8005f2a: e00c b.n 8005f46 { vListInitialise( &( pxReadyTasksLists[ uxPriority ] ) ); 8005f2c: 687a ldr r2, [r7, #4] 8005f2e: 4613 mov r3, r2 8005f30: 009b lsls r3, r3, #2 8005f32: 4413 add r3, r2 8005f34: 009b lsls r3, r3, #2 8005f36: 4a12 ldr r2, [pc, #72] @ (8005f80 ) 8005f38: 4413 add r3, r2 8005f3a: 4618 mov r0, r3 8005f3c: f7ff facd bl 80054da for( uxPriority = ( UBaseType_t ) 0U; uxPriority < ( UBaseType_t ) configMAX_PRIORITIES; uxPriority++ ) 8005f40: 687b ldr r3, [r7, #4] 8005f42: 3301 adds r3, #1 8005f44: 607b str r3, [r7, #4] 8005f46: 687b ldr r3, [r7, #4] 8005f48: 2b06 cmp r3, #6 8005f4a: d9ef bls.n 8005f2c } vListInitialise( &xDelayedTaskList1 ); 8005f4c: 480d ldr r0, [pc, #52] @ (8005f84 ) 8005f4e: f7ff fac4 bl 80054da vListInitialise( &xDelayedTaskList2 ); 8005f52: 480d ldr r0, [pc, #52] @ (8005f88 ) 8005f54: f7ff fac1 bl 80054da vListInitialise( &xPendingReadyList ); 8005f58: 480c ldr r0, [pc, #48] @ (8005f8c ) 8005f5a: f7ff fabe bl 80054da #if ( INCLUDE_vTaskDelete == 1 ) { vListInitialise( &xTasksWaitingTermination ); 8005f5e: 480c ldr r0, [pc, #48] @ (8005f90 ) 8005f60: f7ff fabb bl 80054da } #endif /* INCLUDE_vTaskDelete */ #if ( INCLUDE_vTaskSuspend == 1 ) { vListInitialise( &xSuspendedTaskList ); 8005f64: 480b ldr r0, [pc, #44] @ (8005f94 ) 8005f66: f7ff fab8 bl 80054da } #endif /* INCLUDE_vTaskSuspend */ /* Start with pxDelayedTaskList using list1 and the pxOverflowDelayedTaskList using list2. */ pxDelayedTaskList = &xDelayedTaskList1; 8005f6a: 4b0b ldr r3, [pc, #44] @ (8005f98 ) 8005f6c: 4a05 ldr r2, [pc, #20] @ (8005f84 ) 8005f6e: 601a str r2, [r3, #0] pxOverflowDelayedTaskList = &xDelayedTaskList2; 8005f70: 4b0a ldr r3, [pc, #40] @ (8005f9c ) 8005f72: 4a05 ldr r2, [pc, #20] @ (8005f88 ) 8005f74: 601a str r2, [r3, #0] } 8005f76: bf00 nop 8005f78: 3708 adds r7, #8 8005f7a: 46bd mov sp, r7 8005f7c: bd80 pop {r7, pc} 8005f7e: bf00 nop 8005f80: 20000704 .word 0x20000704 8005f84: 20000790 .word 0x20000790 8005f88: 200007a4 .word 0x200007a4 8005f8c: 200007c0 .word 0x200007c0 8005f90: 200007d4 .word 0x200007d4 8005f94: 200007ec .word 0x200007ec 8005f98: 200007b8 .word 0x200007b8 8005f9c: 200007bc .word 0x200007bc 08005fa0 : /*-----------------------------------------------------------*/ static void prvCheckTasksWaitingTermination( void ) { 8005fa0: b580 push {r7, lr} 8005fa2: b082 sub sp, #8 8005fa4: af00 add r7, sp, #0 { TCB_t *pxTCB; /* uxDeletedTasksWaitingCleanUp is used to prevent taskENTER_CRITICAL() being called too often in the idle task. */ while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) 8005fa6: e019 b.n 8005fdc { taskENTER_CRITICAL(); 8005fa8: f000 f9f8 bl 800639c { pxTCB = listGET_OWNER_OF_HEAD_ENTRY( ( &xTasksWaitingTermination ) ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 8005fac: 4b10 ldr r3, [pc, #64] @ (8005ff0 ) 8005fae: 68db ldr r3, [r3, #12] 8005fb0: 68db ldr r3, [r3, #12] 8005fb2: 607b str r3, [r7, #4] ( void ) uxListRemove( &( pxTCB->xStateListItem ) ); 8005fb4: 687b ldr r3, [r7, #4] 8005fb6: 3304 adds r3, #4 8005fb8: 4618 mov r0, r3 8005fba: f7ff fb18 bl 80055ee --uxCurrentNumberOfTasks; 8005fbe: 4b0d ldr r3, [pc, #52] @ (8005ff4 ) 8005fc0: 681b ldr r3, [r3, #0] 8005fc2: 3b01 subs r3, #1 8005fc4: 4a0b ldr r2, [pc, #44] @ (8005ff4 ) 8005fc6: 6013 str r3, [r2, #0] --uxDeletedTasksWaitingCleanUp; 8005fc8: 4b0b ldr r3, [pc, #44] @ (8005ff8 ) 8005fca: 681b ldr r3, [r3, #0] 8005fcc: 3b01 subs r3, #1 8005fce: 4a0a ldr r2, [pc, #40] @ (8005ff8 ) 8005fd0: 6013 str r3, [r2, #0] } taskEXIT_CRITICAL(); 8005fd2: f000 fa19 bl 8006408 prvDeleteTCB( pxTCB ); 8005fd6: 6878 ldr r0, [r7, #4] 8005fd8: f000 f810 bl 8005ffc while( uxDeletedTasksWaitingCleanUp > ( UBaseType_t ) 0U ) 8005fdc: 4b06 ldr r3, [pc, #24] @ (8005ff8 ) 8005fde: 681b ldr r3, [r3, #0] 8005fe0: 2b00 cmp r3, #0 8005fe2: d1e1 bne.n 8005fa8 } } #endif /* INCLUDE_vTaskDelete */ } 8005fe4: bf00 nop 8005fe6: bf00 nop 8005fe8: 3708 adds r7, #8 8005fea: 46bd mov sp, r7 8005fec: bd80 pop {r7, pc} 8005fee: bf00 nop 8005ff0: 200007d4 .word 0x200007d4 8005ff4: 20000800 .word 0x20000800 8005ff8: 200007e8 .word 0x200007e8 08005ffc : /*-----------------------------------------------------------*/ #if ( INCLUDE_vTaskDelete == 1 ) static void prvDeleteTCB( TCB_t *pxTCB ) { 8005ffc: b580 push {r7, lr} 8005ffe: b084 sub sp, #16 8006000: af00 add r7, sp, #0 8006002: 6078 str r0, [r7, #4] /* Free up the memory allocated by the scheduler for the task. It is up to the task to free any memory allocated at the application level. */ #if ( configUSE_NEWLIB_REENTRANT == 1 ) { _reclaim_reent( &( pxTCB->xNewLib_reent ) ); 8006004: 687b ldr r3, [r7, #4] 8006006: 3358 adds r3, #88 @ 0x58 8006008: 4618 mov r0, r3 800600a: f000 fee5 bl 8006dd8 <_reclaim_reent> #elif( tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE != 0 ) /*lint !e731 !e9029 Macro has been consolidated for readability reasons. */ { /* The task could have been allocated statically or dynamically, so check what was statically allocated before trying to free the memory. */ if( pxTCB->ucStaticallyAllocated == tskDYNAMICALLY_ALLOCATED_STACK_AND_TCB ) 800600e: 687b ldr r3, [r7, #4] 8006010: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9 8006014: 2b00 cmp r3, #0 8006016: d108 bne.n 800602a { /* Both the stack and TCB were allocated dynamically, so both must be freed. */ vPortFree( pxTCB->pxStack ); 8006018: 687b ldr r3, [r7, #4] 800601a: 6b1b ldr r3, [r3, #48] @ 0x30 800601c: 4618 mov r0, r3 800601e: f000 fb73 bl 8006708 vPortFree( pxTCB ); 8006022: 6878 ldr r0, [r7, #4] 8006024: f000 fb70 bl 8006708 configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); mtCOVERAGE_TEST_MARKER(); } } #endif /* configSUPPORT_DYNAMIC_ALLOCATION */ } 8006028: e01b b.n 8006062 else if( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_ONLY ) 800602a: 687b ldr r3, [r7, #4] 800602c: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9 8006030: 2b01 cmp r3, #1 8006032: d103 bne.n 800603c vPortFree( pxTCB ); 8006034: 6878 ldr r0, [r7, #4] 8006036: f000 fb67 bl 8006708 } 800603a: e012 b.n 8006062 configASSERT( pxTCB->ucStaticallyAllocated == tskSTATICALLY_ALLOCATED_STACK_AND_TCB ); 800603c: 687b ldr r3, [r7, #4] 800603e: f893 30a9 ldrb.w r3, [r3, #169] @ 0xa9 8006042: 2b02 cmp r3, #2 8006044: d00d beq.n 8006062 __asm volatile 8006046: f04f 0350 mov.w r3, #80 @ 0x50 800604a: b672 cpsid i 800604c: f383 8811 msr BASEPRI, r3 8006050: f3bf 8f6f isb sy 8006054: f3bf 8f4f dsb sy 8006058: b662 cpsie i 800605a: 60fb str r3, [r7, #12] } 800605c: bf00 nop 800605e: bf00 nop 8006060: e7fd b.n 800605e } 8006062: bf00 nop 8006064: 3710 adds r7, #16 8006066: 46bd mov sp, r7 8006068: bd80 pop {r7, pc} ... 0800606c : #endif /* INCLUDE_vTaskDelete */ /*-----------------------------------------------------------*/ static void prvResetNextTaskUnblockTime( void ) { 800606c: b480 push {r7} 800606e: b083 sub sp, #12 8006070: af00 add r7, sp, #0 TCB_t *pxTCB; if( listLIST_IS_EMPTY( pxDelayedTaskList ) != pdFALSE ) 8006072: 4b0c ldr r3, [pc, #48] @ (80060a4 ) 8006074: 681b ldr r3, [r3, #0] 8006076: 681b ldr r3, [r3, #0] 8006078: 2b00 cmp r3, #0 800607a: d104 bne.n 8006086 { /* The new current delayed list is empty. Set xNextTaskUnblockTime to the maximum possible value so it is extremely unlikely that the if( xTickCount >= xNextTaskUnblockTime ) test will pass until there is an item in the delayed list. */ xNextTaskUnblockTime = portMAX_DELAY; 800607c: 4b0a ldr r3, [pc, #40] @ (80060a8 ) 800607e: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 8006082: 601a str r2, [r3, #0] which the task at the head of the delayed list should be removed from the Blocked state. */ ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); } } 8006084: e008 b.n 8006098 ( pxTCB ) = listGET_OWNER_OF_HEAD_ENTRY( pxDelayedTaskList ); /*lint !e9079 void * is used as this macro is used with timers and co-routines too. Alignment is known to be fine as the type of the pointer stored and retrieved is the same. */ 8006086: 4b07 ldr r3, [pc, #28] @ (80060a4 ) 8006088: 681b ldr r3, [r3, #0] 800608a: 68db ldr r3, [r3, #12] 800608c: 68db ldr r3, [r3, #12] 800608e: 607b str r3, [r7, #4] xNextTaskUnblockTime = listGET_LIST_ITEM_VALUE( &( ( pxTCB )->xStateListItem ) ); 8006090: 687b ldr r3, [r7, #4] 8006092: 685b ldr r3, [r3, #4] 8006094: 4a04 ldr r2, [pc, #16] @ (80060a8 ) 8006096: 6013 str r3, [r2, #0] } 8006098: bf00 nop 800609a: 370c adds r7, #12 800609c: 46bd mov sp, r7 800609e: f85d 7b04 ldr.w r7, [sp], #4 80060a2: 4770 bx lr 80060a4: 200007b8 .word 0x200007b8 80060a8: 20000820 .word 0x20000820 080060ac : } #endif /*-----------------------------------------------------------*/ static void prvAddCurrentTaskToDelayedList( TickType_t xTicksToWait, const BaseType_t xCanBlockIndefinitely ) { 80060ac: b580 push {r7, lr} 80060ae: b084 sub sp, #16 80060b0: af00 add r7, sp, #0 80060b2: 6078 str r0, [r7, #4] 80060b4: 6039 str r1, [r7, #0] TickType_t xTimeToWake; const TickType_t xConstTickCount = xTickCount; 80060b6: 4b29 ldr r3, [pc, #164] @ (800615c ) 80060b8: 681b ldr r3, [r3, #0] 80060ba: 60fb str r3, [r7, #12] } #endif /* Remove the task from the ready list before adding it to the blocked list as the same list item is used for both lists. */ if( uxListRemove( &( pxCurrentTCB->xStateListItem ) ) == ( UBaseType_t ) 0 ) 80060bc: 4b28 ldr r3, [pc, #160] @ (8006160 ) 80060be: 681b ldr r3, [r3, #0] 80060c0: 3304 adds r3, #4 80060c2: 4618 mov r0, r3 80060c4: f7ff fa93 bl 80055ee 80060c8: 4603 mov r3, r0 80060ca: 2b00 cmp r3, #0 80060cc: d10b bne.n 80060e6 { /* The current task must be in a ready list, so there is no need to check, and the port reset macro can be called directly. */ portRESET_READY_PRIORITY( pxCurrentTCB->uxPriority, uxTopReadyPriority ); /*lint !e931 pxCurrentTCB cannot change as it is the calling task. pxCurrentTCB->uxPriority and uxTopReadyPriority cannot change as called with scheduler suspended or in a critical section. */ 80060ce: 4b24 ldr r3, [pc, #144] @ (8006160 ) 80060d0: 681b ldr r3, [r3, #0] 80060d2: 6adb ldr r3, [r3, #44] @ 0x2c 80060d4: 2201 movs r2, #1 80060d6: fa02 f303 lsl.w r3, r2, r3 80060da: 43da mvns r2, r3 80060dc: 4b21 ldr r3, [pc, #132] @ (8006164 ) 80060de: 681b ldr r3, [r3, #0] 80060e0: 4013 ands r3, r2 80060e2: 4a20 ldr r2, [pc, #128] @ (8006164 ) 80060e4: 6013 str r3, [r2, #0] mtCOVERAGE_TEST_MARKER(); } #if ( INCLUDE_vTaskSuspend == 1 ) { if( ( xTicksToWait == portMAX_DELAY ) && ( xCanBlockIndefinitely != pdFALSE ) ) 80060e6: 687b ldr r3, [r7, #4] 80060e8: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80060ec: d10a bne.n 8006104 80060ee: 683b ldr r3, [r7, #0] 80060f0: 2b00 cmp r3, #0 80060f2: d007 beq.n 8006104 { /* Add the task to the suspended task list instead of a delayed task list to ensure it is not woken by a timing event. It will block indefinitely. */ vListInsertEnd( &xSuspendedTaskList, &( pxCurrentTCB->xStateListItem ) ); 80060f4: 4b1a ldr r3, [pc, #104] @ (8006160 ) 80060f6: 681b ldr r3, [r3, #0] 80060f8: 3304 adds r3, #4 80060fa: 4619 mov r1, r3 80060fc: 481a ldr r0, [pc, #104] @ (8006168 ) 80060fe: f7ff fa19 bl 8005534 /* Avoid compiler warning when INCLUDE_vTaskSuspend is not 1. */ ( void ) xCanBlockIndefinitely; } #endif /* INCLUDE_vTaskSuspend */ } 8006102: e026 b.n 8006152 xTimeToWake = xConstTickCount + xTicksToWait; 8006104: 68fa ldr r2, [r7, #12] 8006106: 687b ldr r3, [r7, #4] 8006108: 4413 add r3, r2 800610a: 60bb str r3, [r7, #8] listSET_LIST_ITEM_VALUE( &( pxCurrentTCB->xStateListItem ), xTimeToWake ); 800610c: 4b14 ldr r3, [pc, #80] @ (8006160 ) 800610e: 681b ldr r3, [r3, #0] 8006110: 68ba ldr r2, [r7, #8] 8006112: 605a str r2, [r3, #4] if( xTimeToWake < xConstTickCount ) 8006114: 68ba ldr r2, [r7, #8] 8006116: 68fb ldr r3, [r7, #12] 8006118: 429a cmp r2, r3 800611a: d209 bcs.n 8006130 vListInsert( pxOverflowDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); 800611c: 4b13 ldr r3, [pc, #76] @ (800616c ) 800611e: 681a ldr r2, [r3, #0] 8006120: 4b0f ldr r3, [pc, #60] @ (8006160 ) 8006122: 681b ldr r3, [r3, #0] 8006124: 3304 adds r3, #4 8006126: 4619 mov r1, r3 8006128: 4610 mov r0, r2 800612a: f7ff fa27 bl 800557c } 800612e: e010 b.n 8006152 vListInsert( pxDelayedTaskList, &( pxCurrentTCB->xStateListItem ) ); 8006130: 4b0f ldr r3, [pc, #60] @ (8006170 ) 8006132: 681a ldr r2, [r3, #0] 8006134: 4b0a ldr r3, [pc, #40] @ (8006160 ) 8006136: 681b ldr r3, [r3, #0] 8006138: 3304 adds r3, #4 800613a: 4619 mov r1, r3 800613c: 4610 mov r0, r2 800613e: f7ff fa1d bl 800557c if( xTimeToWake < xNextTaskUnblockTime ) 8006142: 4b0c ldr r3, [pc, #48] @ (8006174 ) 8006144: 681b ldr r3, [r3, #0] 8006146: 68ba ldr r2, [r7, #8] 8006148: 429a cmp r2, r3 800614a: d202 bcs.n 8006152 xNextTaskUnblockTime = xTimeToWake; 800614c: 4a09 ldr r2, [pc, #36] @ (8006174 ) 800614e: 68bb ldr r3, [r7, #8] 8006150: 6013 str r3, [r2, #0] } 8006152: bf00 nop 8006154: 3710 adds r7, #16 8006156: 46bd mov sp, r7 8006158: bd80 pop {r7, pc} 800615a: bf00 nop 800615c: 20000804 .word 0x20000804 8006160: 20000700 .word 0x20000700 8006164: 20000808 .word 0x20000808 8006168: 200007ec .word 0x200007ec 800616c: 200007bc .word 0x200007bc 8006170: 200007b8 .word 0x200007b8 8006174: 20000820 .word 0x20000820 08006178 : /* * See header file for description. */ StackType_t *pxPortInitialiseStack( StackType_t *pxTopOfStack, TaskFunction_t pxCode, void *pvParameters ) { 8006178: b480 push {r7} 800617a: b085 sub sp, #20 800617c: af00 add r7, sp, #0 800617e: 60f8 str r0, [r7, #12] 8006180: 60b9 str r1, [r7, #8] 8006182: 607a str r2, [r7, #4] /* Simulate the stack frame as it would be created by a context switch interrupt. */ /* Offset added to account for the way the MCU uses the stack on entry/exit of interrupts, and to ensure alignment. */ pxTopOfStack--; 8006184: 68fb ldr r3, [r7, #12] 8006186: 3b04 subs r3, #4 8006188: 60fb str r3, [r7, #12] *pxTopOfStack = portINITIAL_XPSR; /* xPSR */ 800618a: 68fb ldr r3, [r7, #12] 800618c: f04f 7280 mov.w r2, #16777216 @ 0x1000000 8006190: 601a str r2, [r3, #0] pxTopOfStack--; 8006192: 68fb ldr r3, [r7, #12] 8006194: 3b04 subs r3, #4 8006196: 60fb str r3, [r7, #12] *pxTopOfStack = ( ( StackType_t ) pxCode ) & portSTART_ADDRESS_MASK; /* PC */ 8006198: 68bb ldr r3, [r7, #8] 800619a: f023 0201 bic.w r2, r3, #1 800619e: 68fb ldr r3, [r7, #12] 80061a0: 601a str r2, [r3, #0] pxTopOfStack--; 80061a2: 68fb ldr r3, [r7, #12] 80061a4: 3b04 subs r3, #4 80061a6: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) portTASK_RETURN_ADDRESS; /* LR */ 80061a8: 4a0c ldr r2, [pc, #48] @ (80061dc ) 80061aa: 68fb ldr r3, [r7, #12] 80061ac: 601a str r2, [r3, #0] /* Save code space by skipping register initialisation. */ pxTopOfStack -= 5; /* R12, R3, R2 and R1. */ 80061ae: 68fb ldr r3, [r7, #12] 80061b0: 3b14 subs r3, #20 80061b2: 60fb str r3, [r7, #12] *pxTopOfStack = ( StackType_t ) pvParameters; /* R0 */ 80061b4: 687a ldr r2, [r7, #4] 80061b6: 68fb ldr r3, [r7, #12] 80061b8: 601a str r2, [r3, #0] /* A save method is being used that requires each task to maintain its own exec return value. */ pxTopOfStack--; 80061ba: 68fb ldr r3, [r7, #12] 80061bc: 3b04 subs r3, #4 80061be: 60fb str r3, [r7, #12] *pxTopOfStack = portINITIAL_EXC_RETURN; 80061c0: 68fb ldr r3, [r7, #12] 80061c2: f06f 0202 mvn.w r2, #2 80061c6: 601a str r2, [r3, #0] pxTopOfStack -= 8; /* R11, R10, R9, R8, R7, R6, R5 and R4. */ 80061c8: 68fb ldr r3, [r7, #12] 80061ca: 3b20 subs r3, #32 80061cc: 60fb str r3, [r7, #12] return pxTopOfStack; 80061ce: 68fb ldr r3, [r7, #12] } 80061d0: 4618 mov r0, r3 80061d2: 3714 adds r7, #20 80061d4: 46bd mov sp, r7 80061d6: f85d 7b04 ldr.w r7, [sp], #4 80061da: 4770 bx lr 80061dc: 080061e1 .word 0x080061e1 080061e0 : /*-----------------------------------------------------------*/ static void prvTaskExitError( void ) { 80061e0: b480 push {r7} 80061e2: b085 sub sp, #20 80061e4: af00 add r7, sp, #0 volatile uint32_t ulDummy = 0; 80061e6: 2300 movs r3, #0 80061e8: 607b str r3, [r7, #4] its caller as there is nothing to return to. If a task wants to exit it should instead call vTaskDelete( NULL ). Artificially force an assert() to be triggered if configASSERT() is defined, then stop here so application writers can catch the error. */ configASSERT( uxCriticalNesting == ~0UL ); 80061ea: 4b15 ldr r3, [pc, #84] @ (8006240 ) 80061ec: 681b ldr r3, [r3, #0] 80061ee: f1b3 3fff cmp.w r3, #4294967295 @ 0xffffffff 80061f2: d00d beq.n 8006210 __asm volatile 80061f4: f04f 0350 mov.w r3, #80 @ 0x50 80061f8: b672 cpsid i 80061fa: f383 8811 msr BASEPRI, r3 80061fe: f3bf 8f6f isb sy 8006202: f3bf 8f4f dsb sy 8006206: b662 cpsie i 8006208: 60fb str r3, [r7, #12] } 800620a: bf00 nop 800620c: bf00 nop 800620e: e7fd b.n 800620c __asm volatile 8006210: f04f 0350 mov.w r3, #80 @ 0x50 8006214: b672 cpsid i 8006216: f383 8811 msr BASEPRI, r3 800621a: f3bf 8f6f isb sy 800621e: f3bf 8f4f dsb sy 8006222: b662 cpsie i 8006224: 60bb str r3, [r7, #8] } 8006226: bf00 nop portDISABLE_INTERRUPTS(); while( ulDummy == 0 ) 8006228: bf00 nop 800622a: 687b ldr r3, [r7, #4] 800622c: 2b00 cmp r3, #0 800622e: d0fc beq.n 800622a about code appearing after this function is called - making ulDummy volatile makes the compiler think the function could return and therefore not output an 'unreachable code' warning for code that appears after it. */ } } 8006230: bf00 nop 8006232: bf00 nop 8006234: 3714 adds r7, #20 8006236: 46bd mov sp, r7 8006238: f85d 7b04 ldr.w r7, [sp], #4 800623c: 4770 bx lr 800623e: bf00 nop 8006240: 20000014 .word 0x20000014 ... 08006250 : /*-----------------------------------------------------------*/ void vPortSVCHandler( void ) { __asm volatile ( 8006250: 4b07 ldr r3, [pc, #28] @ (8006270 ) 8006252: 6819 ldr r1, [r3, #0] 8006254: 6808 ldr r0, [r1, #0] 8006256: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800625a: f380 8809 msr PSP, r0 800625e: f3bf 8f6f isb sy 8006262: f04f 0000 mov.w r0, #0 8006266: f380 8811 msr BASEPRI, r0 800626a: 4770 bx lr 800626c: f3af 8000 nop.w 08006270 : 8006270: 20000700 .word 0x20000700 " bx r14 \n" " \n" " .align 4 \n" "pxCurrentTCBConst2: .word pxCurrentTCB \n" ); } 8006274: bf00 nop 8006276: bf00 nop 08006278 : { /* Start the first task. This also clears the bit that indicates the FPU is in use in case the FPU was used before the scheduler was started - which would otherwise result in the unnecessary leaving of space in the SVC stack for lazy saving of FPU registers. */ __asm volatile( 8006278: 4808 ldr r0, [pc, #32] @ (800629c ) 800627a: 6800 ldr r0, [r0, #0] 800627c: 6800 ldr r0, [r0, #0] 800627e: f380 8808 msr MSP, r0 8006282: f04f 0000 mov.w r0, #0 8006286: f380 8814 msr CONTROL, r0 800628a: b662 cpsie i 800628c: b661 cpsie f 800628e: f3bf 8f4f dsb sy 8006292: f3bf 8f6f isb sy 8006296: df00 svc 0 8006298: bf00 nop " dsb \n" " isb \n" " svc 0 \n" /* System call to start first task. */ " nop \n" ); } 800629a: bf00 nop 800629c: e000ed08 .word 0xe000ed08 080062a0 : /* * See header file for description. */ BaseType_t xPortStartScheduler( void ) { 80062a0: b580 push {r7, lr} 80062a2: b084 sub sp, #16 80062a4: af00 add r7, sp, #0 configASSERT( configMAX_SYSCALL_INTERRUPT_PRIORITY ); #if( configASSERT_DEFINED == 1 ) { volatile uint32_t ulOriginalPriority; volatile uint8_t * const pucFirstUserPriorityRegister = ( volatile uint8_t * const ) ( portNVIC_IP_REGISTERS_OFFSET_16 + portFIRST_USER_INTERRUPT_NUMBER ); 80062a6: 4b37 ldr r3, [pc, #220] @ (8006384 ) 80062a8: 60fb str r3, [r7, #12] functions can be called. ISR safe functions are those that end in "FromISR". FreeRTOS maintains separate thread and ISR API functions to ensure interrupt entry is as fast and simple as possible. Save the interrupt priority value that is about to be clobbered. */ ulOriginalPriority = *pucFirstUserPriorityRegister; 80062aa: 68fb ldr r3, [r7, #12] 80062ac: 781b ldrb r3, [r3, #0] 80062ae: b2db uxtb r3, r3 80062b0: 607b str r3, [r7, #4] /* Determine the number of priority bits available. First write to all possible bits. */ *pucFirstUserPriorityRegister = portMAX_8_BIT_VALUE; 80062b2: 68fb ldr r3, [r7, #12] 80062b4: 22ff movs r2, #255 @ 0xff 80062b6: 701a strb r2, [r3, #0] /* Read the value back to see how many bits stuck. */ ucMaxPriorityValue = *pucFirstUserPriorityRegister; 80062b8: 68fb ldr r3, [r7, #12] 80062ba: 781b ldrb r3, [r3, #0] 80062bc: b2db uxtb r3, r3 80062be: 70fb strb r3, [r7, #3] /* Use the same mask on the maximum system call priority. */ ucMaxSysCallPriority = configMAX_SYSCALL_INTERRUPT_PRIORITY & ucMaxPriorityValue; 80062c0: 78fb ldrb r3, [r7, #3] 80062c2: b2db uxtb r3, r3 80062c4: f003 0350 and.w r3, r3, #80 @ 0x50 80062c8: b2da uxtb r2, r3 80062ca: 4b2f ldr r3, [pc, #188] @ (8006388 ) 80062cc: 701a strb r2, [r3, #0] /* Calculate the maximum acceptable priority group value for the number of bits read back. */ ulMaxPRIGROUPValue = portMAX_PRIGROUP_BITS; 80062ce: 4b2f ldr r3, [pc, #188] @ (800638c ) 80062d0: 2207 movs r2, #7 80062d2: 601a str r2, [r3, #0] while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) 80062d4: e009 b.n 80062ea { ulMaxPRIGROUPValue--; 80062d6: 4b2d ldr r3, [pc, #180] @ (800638c ) 80062d8: 681b ldr r3, [r3, #0] 80062da: 3b01 subs r3, #1 80062dc: 4a2b ldr r2, [pc, #172] @ (800638c ) 80062de: 6013 str r3, [r2, #0] ucMaxPriorityValue <<= ( uint8_t ) 0x01; 80062e0: 78fb ldrb r3, [r7, #3] 80062e2: b2db uxtb r3, r3 80062e4: 005b lsls r3, r3, #1 80062e6: b2db uxtb r3, r3 80062e8: 70fb strb r3, [r7, #3] while( ( ucMaxPriorityValue & portTOP_BIT_OF_BYTE ) == portTOP_BIT_OF_BYTE ) 80062ea: 78fb ldrb r3, [r7, #3] 80062ec: b2db uxtb r3, r3 80062ee: f003 0380 and.w r3, r3, #128 @ 0x80 80062f2: 2b80 cmp r3, #128 @ 0x80 80062f4: d0ef beq.n 80062d6 #ifdef configPRIO_BITS { /* Check the FreeRTOS configuration that defines the number of priority bits matches the number of priority bits actually queried from the hardware. */ configASSERT( ( portMAX_PRIGROUP_BITS - ulMaxPRIGROUPValue ) == configPRIO_BITS ); 80062f6: 4b25 ldr r3, [pc, #148] @ (800638c ) 80062f8: 681b ldr r3, [r3, #0] 80062fa: f1c3 0307 rsb r3, r3, #7 80062fe: 2b04 cmp r3, #4 8006300: d00d beq.n 800631e __asm volatile 8006302: f04f 0350 mov.w r3, #80 @ 0x50 8006306: b672 cpsid i 8006308: f383 8811 msr BASEPRI, r3 800630c: f3bf 8f6f isb sy 8006310: f3bf 8f4f dsb sy 8006314: b662 cpsie i 8006316: 60bb str r3, [r7, #8] } 8006318: bf00 nop 800631a: bf00 nop 800631c: e7fd b.n 800631a } #endif /* Shift the priority group value back to its position within the AIRCR register. */ ulMaxPRIGROUPValue <<= portPRIGROUP_SHIFT; 800631e: 4b1b ldr r3, [pc, #108] @ (800638c ) 8006320: 681b ldr r3, [r3, #0] 8006322: 021b lsls r3, r3, #8 8006324: 4a19 ldr r2, [pc, #100] @ (800638c ) 8006326: 6013 str r3, [r2, #0] ulMaxPRIGROUPValue &= portPRIORITY_GROUP_MASK; 8006328: 4b18 ldr r3, [pc, #96] @ (800638c ) 800632a: 681b ldr r3, [r3, #0] 800632c: f403 63e0 and.w r3, r3, #1792 @ 0x700 8006330: 4a16 ldr r2, [pc, #88] @ (800638c ) 8006332: 6013 str r3, [r2, #0] /* Restore the clobbered interrupt priority register to its original value. */ *pucFirstUserPriorityRegister = ulOriginalPriority; 8006334: 687b ldr r3, [r7, #4] 8006336: b2da uxtb r2, r3 8006338: 68fb ldr r3, [r7, #12] 800633a: 701a strb r2, [r3, #0] } #endif /* conifgASSERT_DEFINED */ /* Make PendSV and SysTick the lowest priority interrupts. */ portNVIC_SYSPRI2_REG |= portNVIC_PENDSV_PRI; 800633c: 4b14 ldr r3, [pc, #80] @ (8006390 ) 800633e: 681b ldr r3, [r3, #0] 8006340: 4a13 ldr r2, [pc, #76] @ (8006390 ) 8006342: f443 0370 orr.w r3, r3, #15728640 @ 0xf00000 8006346: 6013 str r3, [r2, #0] portNVIC_SYSPRI2_REG |= portNVIC_SYSTICK_PRI; 8006348: 4b11 ldr r3, [pc, #68] @ (8006390 ) 800634a: 681b ldr r3, [r3, #0] 800634c: 4a10 ldr r2, [pc, #64] @ (8006390 ) 800634e: f043 4370 orr.w r3, r3, #4026531840 @ 0xf0000000 8006352: 6013 str r3, [r2, #0] /* Start the timer that generates the tick ISR. Interrupts are disabled here already. */ vPortSetupTimerInterrupt(); 8006354: f000 f8dc bl 8006510 /* Initialise the critical nesting count ready for the first task. */ uxCriticalNesting = 0; 8006358: 4b0e ldr r3, [pc, #56] @ (8006394 ) 800635a: 2200 movs r2, #0 800635c: 601a str r2, [r3, #0] /* Ensure the VFP is enabled - it should be anyway. */ vPortEnableVFP(); 800635e: f000 f8fb bl 8006558 /* Lazy save always. */ *( portFPCCR ) |= portASPEN_AND_LSPEN_BITS; 8006362: 4b0d ldr r3, [pc, #52] @ (8006398 ) 8006364: 681b ldr r3, [r3, #0] 8006366: 4a0c ldr r2, [pc, #48] @ (8006398 ) 8006368: f043 4340 orr.w r3, r3, #3221225472 @ 0xc0000000 800636c: 6013 str r3, [r2, #0] /* Start the first task. */ prvPortStartFirstTask(); 800636e: f7ff ff83 bl 8006278 exit error function to prevent compiler warnings about a static function not being called in the case that the application writer overrides this functionality by defining configTASK_RETURN_ADDRESS. Call vTaskSwitchContext() so link time optimisation does not remove the symbol. */ vTaskSwitchContext(); 8006372: f7ff fd3d bl 8005df0 prvTaskExitError(); 8006376: f7ff ff33 bl 80061e0 /* Should not get here! */ return 0; 800637a: 2300 movs r3, #0 } 800637c: 4618 mov r0, r3 800637e: 3710 adds r7, #16 8006380: 46bd mov sp, r7 8006382: bd80 pop {r7, pc} 8006384: e000e400 .word 0xe000e400 8006388: 20000834 .word 0x20000834 800638c: 20000838 .word 0x20000838 8006390: e000ed20 .word 0xe000ed20 8006394: 20000014 .word 0x20000014 8006398: e000ef34 .word 0xe000ef34 0800639c : configASSERT( uxCriticalNesting == 1000UL ); } /*-----------------------------------------------------------*/ void vPortEnterCritical( void ) { 800639c: b480 push {r7} 800639e: b083 sub sp, #12 80063a0: af00 add r7, sp, #0 __asm volatile 80063a2: f04f 0350 mov.w r3, #80 @ 0x50 80063a6: b672 cpsid i 80063a8: f383 8811 msr BASEPRI, r3 80063ac: f3bf 8f6f isb sy 80063b0: f3bf 8f4f dsb sy 80063b4: b662 cpsie i 80063b6: 607b str r3, [r7, #4] } 80063b8: bf00 nop portDISABLE_INTERRUPTS(); uxCriticalNesting++; 80063ba: 4b11 ldr r3, [pc, #68] @ (8006400 ) 80063bc: 681b ldr r3, [r3, #0] 80063be: 3301 adds r3, #1 80063c0: 4a0f ldr r2, [pc, #60] @ (8006400 ) 80063c2: 6013 str r3, [r2, #0] /* This is not the interrupt safe version of the enter critical function so assert() if it is being called from an interrupt context. Only API functions that end in "FromISR" can be used in an interrupt. Only assert if the critical nesting count is 1 to protect against recursive calls if the assert function also uses a critical section. */ if( uxCriticalNesting == 1 ) 80063c4: 4b0e ldr r3, [pc, #56] @ (8006400 ) 80063c6: 681b ldr r3, [r3, #0] 80063c8: 2b01 cmp r3, #1 80063ca: d112 bne.n 80063f2 { configASSERT( ( portNVIC_INT_CTRL_REG & portVECTACTIVE_MASK ) == 0 ); 80063cc: 4b0d ldr r3, [pc, #52] @ (8006404 ) 80063ce: 681b ldr r3, [r3, #0] 80063d0: b2db uxtb r3, r3 80063d2: 2b00 cmp r3, #0 80063d4: d00d beq.n 80063f2 __asm volatile 80063d6: f04f 0350 mov.w r3, #80 @ 0x50 80063da: b672 cpsid i 80063dc: f383 8811 msr BASEPRI, r3 80063e0: f3bf 8f6f isb sy 80063e4: f3bf 8f4f dsb sy 80063e8: b662 cpsie i 80063ea: 603b str r3, [r7, #0] } 80063ec: bf00 nop 80063ee: bf00 nop 80063f0: e7fd b.n 80063ee } } 80063f2: bf00 nop 80063f4: 370c adds r7, #12 80063f6: 46bd mov sp, r7 80063f8: f85d 7b04 ldr.w r7, [sp], #4 80063fc: 4770 bx lr 80063fe: bf00 nop 8006400: 20000014 .word 0x20000014 8006404: e000ed04 .word 0xe000ed04 08006408 : /*-----------------------------------------------------------*/ void vPortExitCritical( void ) { 8006408: b480 push {r7} 800640a: b083 sub sp, #12 800640c: af00 add r7, sp, #0 configASSERT( uxCriticalNesting ); 800640e: 4b13 ldr r3, [pc, #76] @ (800645c ) 8006410: 681b ldr r3, [r3, #0] 8006412: 2b00 cmp r3, #0 8006414: d10d bne.n 8006432 __asm volatile 8006416: f04f 0350 mov.w r3, #80 @ 0x50 800641a: b672 cpsid i 800641c: f383 8811 msr BASEPRI, r3 8006420: f3bf 8f6f isb sy 8006424: f3bf 8f4f dsb sy 8006428: b662 cpsie i 800642a: 607b str r3, [r7, #4] } 800642c: bf00 nop 800642e: bf00 nop 8006430: e7fd b.n 800642e uxCriticalNesting--; 8006432: 4b0a ldr r3, [pc, #40] @ (800645c ) 8006434: 681b ldr r3, [r3, #0] 8006436: 3b01 subs r3, #1 8006438: 4a08 ldr r2, [pc, #32] @ (800645c ) 800643a: 6013 str r3, [r2, #0] if( uxCriticalNesting == 0 ) 800643c: 4b07 ldr r3, [pc, #28] @ (800645c ) 800643e: 681b ldr r3, [r3, #0] 8006440: 2b00 cmp r3, #0 8006442: d105 bne.n 8006450 8006444: 2300 movs r3, #0 8006446: 603b str r3, [r7, #0] } /*-----------------------------------------------------------*/ portFORCE_INLINE static void vPortSetBASEPRI( uint32_t ulNewMaskValue ) { __asm volatile 8006448: 683b ldr r3, [r7, #0] 800644a: f383 8811 msr BASEPRI, r3 ( " msr basepri, %0 " :: "r" ( ulNewMaskValue ) : "memory" ); } 800644e: bf00 nop { portENABLE_INTERRUPTS(); } } 8006450: bf00 nop 8006452: 370c adds r7, #12 8006454: 46bd mov sp, r7 8006456: f85d 7b04 ldr.w r7, [sp], #4 800645a: 4770 bx lr 800645c: 20000014 .word 0x20000014 08006460 : void xPortPendSVHandler( void ) { /* This is a naked function. */ __asm volatile 8006460: f3ef 8009 mrs r0, PSP 8006464: f3bf 8f6f isb sy 8006468: 4b15 ldr r3, [pc, #84] @ (80064c0 ) 800646a: 681a ldr r2, [r3, #0] 800646c: f01e 0f10 tst.w lr, #16 8006470: bf08 it eq 8006472: ed20 8a10 vstmdbeq r0!, {s16-s31} 8006476: e920 4ff0 stmdb r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 800647a: 6010 str r0, [r2, #0] 800647c: e92d 0009 stmdb sp!, {r0, r3} 8006480: f04f 0050 mov.w r0, #80 @ 0x50 8006484: b672 cpsid i 8006486: f380 8811 msr BASEPRI, r0 800648a: f3bf 8f4f dsb sy 800648e: f3bf 8f6f isb sy 8006492: b662 cpsie i 8006494: f7ff fcac bl 8005df0 8006498: f04f 0000 mov.w r0, #0 800649c: f380 8811 msr BASEPRI, r0 80064a0: bc09 pop {r0, r3} 80064a2: 6819 ldr r1, [r3, #0] 80064a4: 6808 ldr r0, [r1, #0] 80064a6: e8b0 4ff0 ldmia.w r0!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 80064aa: f01e 0f10 tst.w lr, #16 80064ae: bf08 it eq 80064b0: ecb0 8a10 vldmiaeq r0!, {s16-s31} 80064b4: f380 8809 msr PSP, r0 80064b8: f3bf 8f6f isb sy 80064bc: 4770 bx lr 80064be: bf00 nop 080064c0 : 80064c0: 20000700 .word 0x20000700 " \n" " .align 4 \n" "pxCurrentTCBConst: .word pxCurrentTCB \n" ::"i"(configMAX_SYSCALL_INTERRUPT_PRIORITY) ); } 80064c4: bf00 nop 80064c6: bf00 nop 080064c8 : /*-----------------------------------------------------------*/ void xPortSysTickHandler( void ) { 80064c8: b580 push {r7, lr} 80064ca: b082 sub sp, #8 80064cc: af00 add r7, sp, #0 __asm volatile 80064ce: f04f 0350 mov.w r3, #80 @ 0x50 80064d2: b672 cpsid i 80064d4: f383 8811 msr BASEPRI, r3 80064d8: f3bf 8f6f isb sy 80064dc: f3bf 8f4f dsb sy 80064e0: b662 cpsie i 80064e2: 607b str r3, [r7, #4] } 80064e4: bf00 nop save and then restore the interrupt mask value as its value is already known. */ portDISABLE_INTERRUPTS(); { /* Increment the RTOS tick. */ if( xTaskIncrementTick() != pdFALSE ) 80064e6: f7ff fbc7 bl 8005c78 80064ea: 4603 mov r3, r0 80064ec: 2b00 cmp r3, #0 80064ee: d003 beq.n 80064f8 { /* A context switch is required. Context switching is performed in the PendSV interrupt. Pend the PendSV interrupt. */ portNVIC_INT_CTRL_REG = portNVIC_PENDSVSET_BIT; 80064f0: 4b06 ldr r3, [pc, #24] @ (800650c ) 80064f2: f04f 5280 mov.w r2, #268435456 @ 0x10000000 80064f6: 601a str r2, [r3, #0] 80064f8: 2300 movs r3, #0 80064fa: 603b str r3, [r7, #0] __asm volatile 80064fc: 683b ldr r3, [r7, #0] 80064fe: f383 8811 msr BASEPRI, r3 } 8006502: bf00 nop } } portENABLE_INTERRUPTS(); } 8006504: bf00 nop 8006506: 3708 adds r7, #8 8006508: 46bd mov sp, r7 800650a: bd80 pop {r7, pc} 800650c: e000ed04 .word 0xe000ed04 08006510 : /* * Setup the systick timer to generate the tick interrupts at the required * frequency. */ __attribute__(( weak )) void vPortSetupTimerInterrupt( void ) { 8006510: b480 push {r7} 8006512: af00 add r7, sp, #0 ulStoppedTimerCompensation = portMISSED_COUNTS_FACTOR / ( configCPU_CLOCK_HZ / configSYSTICK_CLOCK_HZ ); } #endif /* configUSE_TICKLESS_IDLE */ /* Stop and clear the SysTick. */ portNVIC_SYSTICK_CTRL_REG = 0UL; 8006514: 4b0b ldr r3, [pc, #44] @ (8006544 ) 8006516: 2200 movs r2, #0 8006518: 601a str r2, [r3, #0] portNVIC_SYSTICK_CURRENT_VALUE_REG = 0UL; 800651a: 4b0b ldr r3, [pc, #44] @ (8006548 ) 800651c: 2200 movs r2, #0 800651e: 601a str r2, [r3, #0] /* Configure SysTick to interrupt at the requested rate. */ portNVIC_SYSTICK_LOAD_REG = ( configSYSTICK_CLOCK_HZ / configTICK_RATE_HZ ) - 1UL; 8006520: 4b0a ldr r3, [pc, #40] @ (800654c ) 8006522: 681b ldr r3, [r3, #0] 8006524: 4a0a ldr r2, [pc, #40] @ (8006550 ) 8006526: fba2 2303 umull r2, r3, r2, r3 800652a: 099b lsrs r3, r3, #6 800652c: 4a09 ldr r2, [pc, #36] @ (8006554 ) 800652e: 3b01 subs r3, #1 8006530: 6013 str r3, [r2, #0] portNVIC_SYSTICK_CTRL_REG = ( portNVIC_SYSTICK_CLK_BIT | portNVIC_SYSTICK_INT_BIT | portNVIC_SYSTICK_ENABLE_BIT ); 8006532: 4b04 ldr r3, [pc, #16] @ (8006544 ) 8006534: 2207 movs r2, #7 8006536: 601a str r2, [r3, #0] } 8006538: bf00 nop 800653a: 46bd mov sp, r7 800653c: f85d 7b04 ldr.w r7, [sp], #4 8006540: 4770 bx lr 8006542: bf00 nop 8006544: e000e010 .word 0xe000e010 8006548: e000e018 .word 0xe000e018 800654c: 20000008 .word 0x20000008 8006550: 10624dd3 .word 0x10624dd3 8006554: e000e014 .word 0xe000e014 08006558 : /*-----------------------------------------------------------*/ /* This is a naked function. */ static void vPortEnableVFP( void ) { __asm volatile 8006558: f8df 000c ldr.w r0, [pc, #12] @ 8006568 800655c: 6801 ldr r1, [r0, #0] 800655e: f441 0170 orr.w r1, r1, #15728640 @ 0xf00000 8006562: 6001 str r1, [r0, #0] 8006564: 4770 bx lr " \n" " orr r1, r1, #( 0xf << 20 ) \n" /* Enable CP10 and CP11 coprocessors, then save back. */ " str r1, [r0] \n" " bx r14 " ); } 8006566: bf00 nop 8006568: e000ed88 .word 0xe000ed88 0800656c : static size_t xBlockAllocatedBit = 0; /*-----------------------------------------------------------*/ void *pvPortMalloc( size_t xWantedSize ) { 800656c: b580 push {r7, lr} 800656e: b08a sub sp, #40 @ 0x28 8006570: af00 add r7, sp, #0 8006572: 6078 str r0, [r7, #4] BlockLink_t *pxBlock, *pxPreviousBlock, *pxNewBlockLink; void *pvReturn = NULL; 8006574: 2300 movs r3, #0 8006576: 61fb str r3, [r7, #28] vTaskSuspendAll(); 8006578: f7ff fad0 bl 8005b1c { /* If this is the first call to malloc then the heap will require initialisation to setup the list of free blocks. */ if( pxEnd == NULL ) 800657c: 4b5d ldr r3, [pc, #372] @ (80066f4 ) 800657e: 681b ldr r3, [r3, #0] 8006580: 2b00 cmp r3, #0 8006582: d101 bne.n 8006588 { prvHeapInit(); 8006584: f000 f920 bl 80067c8 /* Check the requested block size is not so large that the top bit is set. The top bit of the block size member of the BlockLink_t structure is used to determine who owns the block - the application or the kernel, so it must be free. */ if( ( xWantedSize & xBlockAllocatedBit ) == 0 ) 8006588: 4b5b ldr r3, [pc, #364] @ (80066f8 ) 800658a: 681a ldr r2, [r3, #0] 800658c: 687b ldr r3, [r7, #4] 800658e: 4013 ands r3, r2 8006590: 2b00 cmp r3, #0 8006592: f040 8094 bne.w 80066be { /* The wanted size is increased so it can contain a BlockLink_t structure in addition to the requested amount of bytes. */ if( xWantedSize > 0 ) 8006596: 687b ldr r3, [r7, #4] 8006598: 2b00 cmp r3, #0 800659a: d020 beq.n 80065de { xWantedSize += xHeapStructSize; 800659c: 2208 movs r2, #8 800659e: 687b ldr r3, [r7, #4] 80065a0: 4413 add r3, r2 80065a2: 607b str r3, [r7, #4] /* Ensure that blocks are always aligned to the required number of bytes. */ if( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) != 0x00 ) 80065a4: 687b ldr r3, [r7, #4] 80065a6: f003 0307 and.w r3, r3, #7 80065aa: 2b00 cmp r3, #0 80065ac: d017 beq.n 80065de { /* Byte alignment required. */ xWantedSize += ( portBYTE_ALIGNMENT - ( xWantedSize & portBYTE_ALIGNMENT_MASK ) ); 80065ae: 687b ldr r3, [r7, #4] 80065b0: f023 0307 bic.w r3, r3, #7 80065b4: 3308 adds r3, #8 80065b6: 607b str r3, [r7, #4] configASSERT( ( xWantedSize & portBYTE_ALIGNMENT_MASK ) == 0 ); 80065b8: 687b ldr r3, [r7, #4] 80065ba: f003 0307 and.w r3, r3, #7 80065be: 2b00 cmp r3, #0 80065c0: d00d beq.n 80065de __asm volatile 80065c2: f04f 0350 mov.w r3, #80 @ 0x50 80065c6: b672 cpsid i 80065c8: f383 8811 msr BASEPRI, r3 80065cc: f3bf 8f6f isb sy 80065d0: f3bf 8f4f dsb sy 80065d4: b662 cpsie i 80065d6: 617b str r3, [r7, #20] } 80065d8: bf00 nop 80065da: bf00 nop 80065dc: e7fd b.n 80065da else { mtCOVERAGE_TEST_MARKER(); } if( ( xWantedSize > 0 ) && ( xWantedSize <= xFreeBytesRemaining ) ) 80065de: 687b ldr r3, [r7, #4] 80065e0: 2b00 cmp r3, #0 80065e2: d06c beq.n 80066be 80065e4: 4b45 ldr r3, [pc, #276] @ (80066fc ) 80065e6: 681b ldr r3, [r3, #0] 80065e8: 687a ldr r2, [r7, #4] 80065ea: 429a cmp r2, r3 80065ec: d867 bhi.n 80066be { /* Traverse the list from the start (lowest address) block until one of adequate size is found. */ pxPreviousBlock = &xStart; 80065ee: 4b44 ldr r3, [pc, #272] @ (8006700 ) 80065f0: 623b str r3, [r7, #32] pxBlock = xStart.pxNextFreeBlock; 80065f2: 4b43 ldr r3, [pc, #268] @ (8006700 ) 80065f4: 681b ldr r3, [r3, #0] 80065f6: 627b str r3, [r7, #36] @ 0x24 while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) 80065f8: e004 b.n 8006604 { pxPreviousBlock = pxBlock; 80065fa: 6a7b ldr r3, [r7, #36] @ 0x24 80065fc: 623b str r3, [r7, #32] pxBlock = pxBlock->pxNextFreeBlock; 80065fe: 6a7b ldr r3, [r7, #36] @ 0x24 8006600: 681b ldr r3, [r3, #0] 8006602: 627b str r3, [r7, #36] @ 0x24 while( ( pxBlock->xBlockSize < xWantedSize ) && ( pxBlock->pxNextFreeBlock != NULL ) ) 8006604: 6a7b ldr r3, [r7, #36] @ 0x24 8006606: 685b ldr r3, [r3, #4] 8006608: 687a ldr r2, [r7, #4] 800660a: 429a cmp r2, r3 800660c: d903 bls.n 8006616 800660e: 6a7b ldr r3, [r7, #36] @ 0x24 8006610: 681b ldr r3, [r3, #0] 8006612: 2b00 cmp r3, #0 8006614: d1f1 bne.n 80065fa } /* If the end marker was reached then a block of adequate size was not found. */ if( pxBlock != pxEnd ) 8006616: 4b37 ldr r3, [pc, #220] @ (80066f4 ) 8006618: 681b ldr r3, [r3, #0] 800661a: 6a7a ldr r2, [r7, #36] @ 0x24 800661c: 429a cmp r2, r3 800661e: d04e beq.n 80066be { /* Return the memory space pointed to - jumping over the BlockLink_t structure at its start. */ pvReturn = ( void * ) ( ( ( uint8_t * ) pxPreviousBlock->pxNextFreeBlock ) + xHeapStructSize ); 8006620: 6a3b ldr r3, [r7, #32] 8006622: 681b ldr r3, [r3, #0] 8006624: 2208 movs r2, #8 8006626: 4413 add r3, r2 8006628: 61fb str r3, [r7, #28] /* This block is being returned for use so must be taken out of the list of free blocks. */ pxPreviousBlock->pxNextFreeBlock = pxBlock->pxNextFreeBlock; 800662a: 6a7b ldr r3, [r7, #36] @ 0x24 800662c: 681a ldr r2, [r3, #0] 800662e: 6a3b ldr r3, [r7, #32] 8006630: 601a str r2, [r3, #0] /* If the block is larger than required it can be split into two. */ if( ( pxBlock->xBlockSize - xWantedSize ) > heapMINIMUM_BLOCK_SIZE ) 8006632: 6a7b ldr r3, [r7, #36] @ 0x24 8006634: 685a ldr r2, [r3, #4] 8006636: 687b ldr r3, [r7, #4] 8006638: 1ad2 subs r2, r2, r3 800663a: 2308 movs r3, #8 800663c: 005b lsls r3, r3, #1 800663e: 429a cmp r2, r3 8006640: d922 bls.n 8006688 { /* This block is to be split into two. Create a new block following the number of bytes requested. The void cast is used to prevent byte alignment warnings from the compiler. */ pxNewBlockLink = ( void * ) ( ( ( uint8_t * ) pxBlock ) + xWantedSize ); 8006642: 6a7a ldr r2, [r7, #36] @ 0x24 8006644: 687b ldr r3, [r7, #4] 8006646: 4413 add r3, r2 8006648: 61bb str r3, [r7, #24] configASSERT( ( ( ( size_t ) pxNewBlockLink ) & portBYTE_ALIGNMENT_MASK ) == 0 ); 800664a: 69bb ldr r3, [r7, #24] 800664c: f003 0307 and.w r3, r3, #7 8006650: 2b00 cmp r3, #0 8006652: d00d beq.n 8006670 __asm volatile 8006654: f04f 0350 mov.w r3, #80 @ 0x50 8006658: b672 cpsid i 800665a: f383 8811 msr BASEPRI, r3 800665e: f3bf 8f6f isb sy 8006662: f3bf 8f4f dsb sy 8006666: b662 cpsie i 8006668: 613b str r3, [r7, #16] } 800666a: bf00 nop 800666c: bf00 nop 800666e: e7fd b.n 800666c /* Calculate the sizes of two blocks split from the single block. */ pxNewBlockLink->xBlockSize = pxBlock->xBlockSize - xWantedSize; 8006670: 6a7b ldr r3, [r7, #36] @ 0x24 8006672: 685a ldr r2, [r3, #4] 8006674: 687b ldr r3, [r7, #4] 8006676: 1ad2 subs r2, r2, r3 8006678: 69bb ldr r3, [r7, #24] 800667a: 605a str r2, [r3, #4] pxBlock->xBlockSize = xWantedSize; 800667c: 6a7b ldr r3, [r7, #36] @ 0x24 800667e: 687a ldr r2, [r7, #4] 8006680: 605a str r2, [r3, #4] /* Insert the new block into the list of free blocks. */ prvInsertBlockIntoFreeList( pxNewBlockLink ); 8006682: 69b8 ldr r0, [r7, #24] 8006684: f000 f902 bl 800688c else { mtCOVERAGE_TEST_MARKER(); } xFreeBytesRemaining -= pxBlock->xBlockSize; 8006688: 4b1c ldr r3, [pc, #112] @ (80066fc ) 800668a: 681a ldr r2, [r3, #0] 800668c: 6a7b ldr r3, [r7, #36] @ 0x24 800668e: 685b ldr r3, [r3, #4] 8006690: 1ad3 subs r3, r2, r3 8006692: 4a1a ldr r2, [pc, #104] @ (80066fc ) 8006694: 6013 str r3, [r2, #0] if( xFreeBytesRemaining < xMinimumEverFreeBytesRemaining ) 8006696: 4b19 ldr r3, [pc, #100] @ (80066fc ) 8006698: 681a ldr r2, [r3, #0] 800669a: 4b1a ldr r3, [pc, #104] @ (8006704 ) 800669c: 681b ldr r3, [r3, #0] 800669e: 429a cmp r2, r3 80066a0: d203 bcs.n 80066aa { xMinimumEverFreeBytesRemaining = xFreeBytesRemaining; 80066a2: 4b16 ldr r3, [pc, #88] @ (80066fc ) 80066a4: 681b ldr r3, [r3, #0] 80066a6: 4a17 ldr r2, [pc, #92] @ (8006704 ) 80066a8: 6013 str r3, [r2, #0] mtCOVERAGE_TEST_MARKER(); } /* The block is being returned - it is allocated and owned by the application and has no "next" block. */ pxBlock->xBlockSize |= xBlockAllocatedBit; 80066aa: 6a7b ldr r3, [r7, #36] @ 0x24 80066ac: 685a ldr r2, [r3, #4] 80066ae: 4b12 ldr r3, [pc, #72] @ (80066f8 ) 80066b0: 681b ldr r3, [r3, #0] 80066b2: 431a orrs r2, r3 80066b4: 6a7b ldr r3, [r7, #36] @ 0x24 80066b6: 605a str r2, [r3, #4] pxBlock->pxNextFreeBlock = NULL; 80066b8: 6a7b ldr r3, [r7, #36] @ 0x24 80066ba: 2200 movs r2, #0 80066bc: 601a str r2, [r3, #0] mtCOVERAGE_TEST_MARKER(); } traceMALLOC( pvReturn, xWantedSize ); } ( void ) xTaskResumeAll(); 80066be: f7ff fa3b bl 8005b38 mtCOVERAGE_TEST_MARKER(); } } #endif configASSERT( ( ( ( size_t ) pvReturn ) & ( size_t ) portBYTE_ALIGNMENT_MASK ) == 0 ); 80066c2: 69fb ldr r3, [r7, #28] 80066c4: f003 0307 and.w r3, r3, #7 80066c8: 2b00 cmp r3, #0 80066ca: d00d beq.n 80066e8 __asm volatile 80066cc: f04f 0350 mov.w r3, #80 @ 0x50 80066d0: b672 cpsid i 80066d2: f383 8811 msr BASEPRI, r3 80066d6: f3bf 8f6f isb sy 80066da: f3bf 8f4f dsb sy 80066de: b662 cpsie i 80066e0: 60fb str r3, [r7, #12] } 80066e2: bf00 nop 80066e4: bf00 nop 80066e6: e7fd b.n 80066e4 return pvReturn; 80066e8: 69fb ldr r3, [r7, #28] } 80066ea: 4618 mov r0, r3 80066ec: 3728 adds r7, #40 @ 0x28 80066ee: 46bd mov sp, r7 80066f0: bd80 pop {r7, pc} 80066f2: bf00 nop 80066f4: 20008844 .word 0x20008844 80066f8: 20008850 .word 0x20008850 80066fc: 20008848 .word 0x20008848 8006700: 2000883c .word 0x2000883c 8006704: 2000884c .word 0x2000884c 08006708 : /*-----------------------------------------------------------*/ void vPortFree( void *pv ) { 8006708: b580 push {r7, lr} 800670a: b086 sub sp, #24 800670c: af00 add r7, sp, #0 800670e: 6078 str r0, [r7, #4] uint8_t *puc = ( uint8_t * ) pv; 8006710: 687b ldr r3, [r7, #4] 8006712: 617b str r3, [r7, #20] BlockLink_t *pxLink; if( pv != NULL ) 8006714: 687b ldr r3, [r7, #4] 8006716: 2b00 cmp r3, #0 8006718: d04e beq.n 80067b8 { /* The memory being freed will have an BlockLink_t structure immediately before it. */ puc -= xHeapStructSize; 800671a: 2308 movs r3, #8 800671c: 425b negs r3, r3 800671e: 697a ldr r2, [r7, #20] 8006720: 4413 add r3, r2 8006722: 617b str r3, [r7, #20] /* This casting is to keep the compiler from issuing warnings. */ pxLink = ( void * ) puc; 8006724: 697b ldr r3, [r7, #20] 8006726: 613b str r3, [r7, #16] /* Check the block is actually allocated. */ configASSERT( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ); 8006728: 693b ldr r3, [r7, #16] 800672a: 685a ldr r2, [r3, #4] 800672c: 4b24 ldr r3, [pc, #144] @ (80067c0 ) 800672e: 681b ldr r3, [r3, #0] 8006730: 4013 ands r3, r2 8006732: 2b00 cmp r3, #0 8006734: d10d bne.n 8006752 __asm volatile 8006736: f04f 0350 mov.w r3, #80 @ 0x50 800673a: b672 cpsid i 800673c: f383 8811 msr BASEPRI, r3 8006740: f3bf 8f6f isb sy 8006744: f3bf 8f4f dsb sy 8006748: b662 cpsie i 800674a: 60fb str r3, [r7, #12] } 800674c: bf00 nop 800674e: bf00 nop 8006750: e7fd b.n 800674e configASSERT( pxLink->pxNextFreeBlock == NULL ); 8006752: 693b ldr r3, [r7, #16] 8006754: 681b ldr r3, [r3, #0] 8006756: 2b00 cmp r3, #0 8006758: d00d beq.n 8006776 __asm volatile 800675a: f04f 0350 mov.w r3, #80 @ 0x50 800675e: b672 cpsid i 8006760: f383 8811 msr BASEPRI, r3 8006764: f3bf 8f6f isb sy 8006768: f3bf 8f4f dsb sy 800676c: b662 cpsie i 800676e: 60bb str r3, [r7, #8] } 8006770: bf00 nop 8006772: bf00 nop 8006774: e7fd b.n 8006772 if( ( pxLink->xBlockSize & xBlockAllocatedBit ) != 0 ) 8006776: 693b ldr r3, [r7, #16] 8006778: 685a ldr r2, [r3, #4] 800677a: 4b11 ldr r3, [pc, #68] @ (80067c0 ) 800677c: 681b ldr r3, [r3, #0] 800677e: 4013 ands r3, r2 8006780: 2b00 cmp r3, #0 8006782: d019 beq.n 80067b8 { if( pxLink->pxNextFreeBlock == NULL ) 8006784: 693b ldr r3, [r7, #16] 8006786: 681b ldr r3, [r3, #0] 8006788: 2b00 cmp r3, #0 800678a: d115 bne.n 80067b8 { /* The block is being returned to the heap - it is no longer allocated. */ pxLink->xBlockSize &= ~xBlockAllocatedBit; 800678c: 693b ldr r3, [r7, #16] 800678e: 685a ldr r2, [r3, #4] 8006790: 4b0b ldr r3, [pc, #44] @ (80067c0 ) 8006792: 681b ldr r3, [r3, #0] 8006794: 43db mvns r3, r3 8006796: 401a ands r2, r3 8006798: 693b ldr r3, [r7, #16] 800679a: 605a str r2, [r3, #4] vTaskSuspendAll(); 800679c: f7ff f9be bl 8005b1c { /* Add this block to the list of free blocks. */ xFreeBytesRemaining += pxLink->xBlockSize; 80067a0: 693b ldr r3, [r7, #16] 80067a2: 685a ldr r2, [r3, #4] 80067a4: 4b07 ldr r3, [pc, #28] @ (80067c4 ) 80067a6: 681b ldr r3, [r3, #0] 80067a8: 4413 add r3, r2 80067aa: 4a06 ldr r2, [pc, #24] @ (80067c4 ) 80067ac: 6013 str r3, [r2, #0] traceFREE( pv, pxLink->xBlockSize ); prvInsertBlockIntoFreeList( ( ( BlockLink_t * ) pxLink ) ); 80067ae: 6938 ldr r0, [r7, #16] 80067b0: f000 f86c bl 800688c } ( void ) xTaskResumeAll(); 80067b4: f7ff f9c0 bl 8005b38 else { mtCOVERAGE_TEST_MARKER(); } } } 80067b8: bf00 nop 80067ba: 3718 adds r7, #24 80067bc: 46bd mov sp, r7 80067be: bd80 pop {r7, pc} 80067c0: 20008850 .word 0x20008850 80067c4: 20008848 .word 0x20008848 080067c8 : /* This just exists to keep the linker quiet. */ } /*-----------------------------------------------------------*/ static void prvHeapInit( void ) { 80067c8: b480 push {r7} 80067ca: b085 sub sp, #20 80067cc: af00 add r7, sp, #0 BlockLink_t *pxFirstFreeBlock; uint8_t *pucAlignedHeap; size_t uxAddress; size_t xTotalHeapSize = configTOTAL_HEAP_SIZE; 80067ce: f44f 4300 mov.w r3, #32768 @ 0x8000 80067d2: 60bb str r3, [r7, #8] /* Ensure the heap starts on a correctly aligned boundary. */ uxAddress = ( size_t ) ucHeap; 80067d4: 4b27 ldr r3, [pc, #156] @ (8006874 ) 80067d6: 60fb str r3, [r7, #12] if( ( uxAddress & portBYTE_ALIGNMENT_MASK ) != 0 ) 80067d8: 68fb ldr r3, [r7, #12] 80067da: f003 0307 and.w r3, r3, #7 80067de: 2b00 cmp r3, #0 80067e0: d00c beq.n 80067fc { uxAddress += ( portBYTE_ALIGNMENT - 1 ); 80067e2: 68fb ldr r3, [r7, #12] 80067e4: 3307 adds r3, #7 80067e6: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); 80067e8: 68fb ldr r3, [r7, #12] 80067ea: f023 0307 bic.w r3, r3, #7 80067ee: 60fb str r3, [r7, #12] xTotalHeapSize -= uxAddress - ( size_t ) ucHeap; 80067f0: 68ba ldr r2, [r7, #8] 80067f2: 68fb ldr r3, [r7, #12] 80067f4: 1ad3 subs r3, r2, r3 80067f6: 4a1f ldr r2, [pc, #124] @ (8006874 ) 80067f8: 4413 add r3, r2 80067fa: 60bb str r3, [r7, #8] } pucAlignedHeap = ( uint8_t * ) uxAddress; 80067fc: 68fb ldr r3, [r7, #12] 80067fe: 607b str r3, [r7, #4] /* xStart is used to hold a pointer to the first item in the list of free blocks. The void cast is used to prevent compiler warnings. */ xStart.pxNextFreeBlock = ( void * ) pucAlignedHeap; 8006800: 4a1d ldr r2, [pc, #116] @ (8006878 ) 8006802: 687b ldr r3, [r7, #4] 8006804: 6013 str r3, [r2, #0] xStart.xBlockSize = ( size_t ) 0; 8006806: 4b1c ldr r3, [pc, #112] @ (8006878 ) 8006808: 2200 movs r2, #0 800680a: 605a str r2, [r3, #4] /* pxEnd is used to mark the end of the list of free blocks and is inserted at the end of the heap space. */ uxAddress = ( ( size_t ) pucAlignedHeap ) + xTotalHeapSize; 800680c: 687b ldr r3, [r7, #4] 800680e: 68ba ldr r2, [r7, #8] 8006810: 4413 add r3, r2 8006812: 60fb str r3, [r7, #12] uxAddress -= xHeapStructSize; 8006814: 2208 movs r2, #8 8006816: 68fb ldr r3, [r7, #12] 8006818: 1a9b subs r3, r3, r2 800681a: 60fb str r3, [r7, #12] uxAddress &= ~( ( size_t ) portBYTE_ALIGNMENT_MASK ); 800681c: 68fb ldr r3, [r7, #12] 800681e: f023 0307 bic.w r3, r3, #7 8006822: 60fb str r3, [r7, #12] pxEnd = ( void * ) uxAddress; 8006824: 68fb ldr r3, [r7, #12] 8006826: 4a15 ldr r2, [pc, #84] @ (800687c ) 8006828: 6013 str r3, [r2, #0] pxEnd->xBlockSize = 0; 800682a: 4b14 ldr r3, [pc, #80] @ (800687c ) 800682c: 681b ldr r3, [r3, #0] 800682e: 2200 movs r2, #0 8006830: 605a str r2, [r3, #4] pxEnd->pxNextFreeBlock = NULL; 8006832: 4b12 ldr r3, [pc, #72] @ (800687c ) 8006834: 681b ldr r3, [r3, #0] 8006836: 2200 movs r2, #0 8006838: 601a str r2, [r3, #0] /* To start with there is a single free block that is sized to take up the entire heap space, minus the space taken by pxEnd. */ pxFirstFreeBlock = ( void * ) pucAlignedHeap; 800683a: 687b ldr r3, [r7, #4] 800683c: 603b str r3, [r7, #0] pxFirstFreeBlock->xBlockSize = uxAddress - ( size_t ) pxFirstFreeBlock; 800683e: 683b ldr r3, [r7, #0] 8006840: 68fa ldr r2, [r7, #12] 8006842: 1ad2 subs r2, r2, r3 8006844: 683b ldr r3, [r7, #0] 8006846: 605a str r2, [r3, #4] pxFirstFreeBlock->pxNextFreeBlock = pxEnd; 8006848: 4b0c ldr r3, [pc, #48] @ (800687c ) 800684a: 681a ldr r2, [r3, #0] 800684c: 683b ldr r3, [r7, #0] 800684e: 601a str r2, [r3, #0] /* Only one block exists - and it covers the entire usable heap space. */ xMinimumEverFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; 8006850: 683b ldr r3, [r7, #0] 8006852: 685b ldr r3, [r3, #4] 8006854: 4a0a ldr r2, [pc, #40] @ (8006880 ) 8006856: 6013 str r3, [r2, #0] xFreeBytesRemaining = pxFirstFreeBlock->xBlockSize; 8006858: 683b ldr r3, [r7, #0] 800685a: 685b ldr r3, [r3, #4] 800685c: 4a09 ldr r2, [pc, #36] @ (8006884 ) 800685e: 6013 str r3, [r2, #0] /* Work out the position of the top bit in a size_t variable. */ xBlockAllocatedBit = ( ( size_t ) 1 ) << ( ( sizeof( size_t ) * heapBITS_PER_BYTE ) - 1 ); 8006860: 4b09 ldr r3, [pc, #36] @ (8006888 ) 8006862: f04f 4200 mov.w r2, #2147483648 @ 0x80000000 8006866: 601a str r2, [r3, #0] } 8006868: bf00 nop 800686a: 3714 adds r7, #20 800686c: 46bd mov sp, r7 800686e: f85d 7b04 ldr.w r7, [sp], #4 8006872: 4770 bx lr 8006874: 2000083c .word 0x2000083c 8006878: 2000883c .word 0x2000883c 800687c: 20008844 .word 0x20008844 8006880: 2000884c .word 0x2000884c 8006884: 20008848 .word 0x20008848 8006888: 20008850 .word 0x20008850 0800688c : /*-----------------------------------------------------------*/ static void prvInsertBlockIntoFreeList( BlockLink_t *pxBlockToInsert ) { 800688c: b480 push {r7} 800688e: b085 sub sp, #20 8006890: af00 add r7, sp, #0 8006892: 6078 str r0, [r7, #4] BlockLink_t *pxIterator; uint8_t *puc; /* Iterate through the list until a block is found that has a higher address than the block being inserted. */ for( pxIterator = &xStart; pxIterator->pxNextFreeBlock < pxBlockToInsert; pxIterator = pxIterator->pxNextFreeBlock ) 8006894: 4b28 ldr r3, [pc, #160] @ (8006938 ) 8006896: 60fb str r3, [r7, #12] 8006898: e002 b.n 80068a0 800689a: 68fb ldr r3, [r7, #12] 800689c: 681b ldr r3, [r3, #0] 800689e: 60fb str r3, [r7, #12] 80068a0: 68fb ldr r3, [r7, #12] 80068a2: 681b ldr r3, [r3, #0] 80068a4: 687a ldr r2, [r7, #4] 80068a6: 429a cmp r2, r3 80068a8: d8f7 bhi.n 800689a /* Nothing to do here, just iterate to the right position. */ } /* Do the block being inserted, and the block it is being inserted after make a contiguous block of memory? */ puc = ( uint8_t * ) pxIterator; 80068aa: 68fb ldr r3, [r7, #12] 80068ac: 60bb str r3, [r7, #8] if( ( puc + pxIterator->xBlockSize ) == ( uint8_t * ) pxBlockToInsert ) 80068ae: 68fb ldr r3, [r7, #12] 80068b0: 685b ldr r3, [r3, #4] 80068b2: 68ba ldr r2, [r7, #8] 80068b4: 4413 add r3, r2 80068b6: 687a ldr r2, [r7, #4] 80068b8: 429a cmp r2, r3 80068ba: d108 bne.n 80068ce { pxIterator->xBlockSize += pxBlockToInsert->xBlockSize; 80068bc: 68fb ldr r3, [r7, #12] 80068be: 685a ldr r2, [r3, #4] 80068c0: 687b ldr r3, [r7, #4] 80068c2: 685b ldr r3, [r3, #4] 80068c4: 441a add r2, r3 80068c6: 68fb ldr r3, [r7, #12] 80068c8: 605a str r2, [r3, #4] pxBlockToInsert = pxIterator; 80068ca: 68fb ldr r3, [r7, #12] 80068cc: 607b str r3, [r7, #4] mtCOVERAGE_TEST_MARKER(); } /* Do the block being inserted, and the block it is being inserted before make a contiguous block of memory? */ puc = ( uint8_t * ) pxBlockToInsert; 80068ce: 687b ldr r3, [r7, #4] 80068d0: 60bb str r3, [r7, #8] if( ( puc + pxBlockToInsert->xBlockSize ) == ( uint8_t * ) pxIterator->pxNextFreeBlock ) 80068d2: 687b ldr r3, [r7, #4] 80068d4: 685b ldr r3, [r3, #4] 80068d6: 68ba ldr r2, [r7, #8] 80068d8: 441a add r2, r3 80068da: 68fb ldr r3, [r7, #12] 80068dc: 681b ldr r3, [r3, #0] 80068de: 429a cmp r2, r3 80068e0: d118 bne.n 8006914 { if( pxIterator->pxNextFreeBlock != pxEnd ) 80068e2: 68fb ldr r3, [r7, #12] 80068e4: 681a ldr r2, [r3, #0] 80068e6: 4b15 ldr r3, [pc, #84] @ (800693c ) 80068e8: 681b ldr r3, [r3, #0] 80068ea: 429a cmp r2, r3 80068ec: d00d beq.n 800690a { /* Form one big block from the two blocks. */ pxBlockToInsert->xBlockSize += pxIterator->pxNextFreeBlock->xBlockSize; 80068ee: 687b ldr r3, [r7, #4] 80068f0: 685a ldr r2, [r3, #4] 80068f2: 68fb ldr r3, [r7, #12] 80068f4: 681b ldr r3, [r3, #0] 80068f6: 685b ldr r3, [r3, #4] 80068f8: 441a add r2, r3 80068fa: 687b ldr r3, [r7, #4] 80068fc: 605a str r2, [r3, #4] pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock->pxNextFreeBlock; 80068fe: 68fb ldr r3, [r7, #12] 8006900: 681b ldr r3, [r3, #0] 8006902: 681a ldr r2, [r3, #0] 8006904: 687b ldr r3, [r7, #4] 8006906: 601a str r2, [r3, #0] 8006908: e008 b.n 800691c } else { pxBlockToInsert->pxNextFreeBlock = pxEnd; 800690a: 4b0c ldr r3, [pc, #48] @ (800693c ) 800690c: 681a ldr r2, [r3, #0] 800690e: 687b ldr r3, [r7, #4] 8006910: 601a str r2, [r3, #0] 8006912: e003 b.n 800691c } } else { pxBlockToInsert->pxNextFreeBlock = pxIterator->pxNextFreeBlock; 8006914: 68fb ldr r3, [r7, #12] 8006916: 681a ldr r2, [r3, #0] 8006918: 687b ldr r3, [r7, #4] 800691a: 601a str r2, [r3, #0] /* If the block being inserted plugged a gab, so was merged with the block before and the block after, then it's pxNextFreeBlock pointer will have already been set, and should not be set here as that would make it point to itself. */ if( pxIterator != pxBlockToInsert ) 800691c: 68fa ldr r2, [r7, #12] 800691e: 687b ldr r3, [r7, #4] 8006920: 429a cmp r2, r3 8006922: d002 beq.n 800692a { pxIterator->pxNextFreeBlock = pxBlockToInsert; 8006924: 68fb ldr r3, [r7, #12] 8006926: 687a ldr r2, [r7, #4] 8006928: 601a str r2, [r3, #0] } else { mtCOVERAGE_TEST_MARKER(); } } 800692a: bf00 nop 800692c: 3714 adds r7, #20 800692e: 46bd mov sp, r7 8006930: f85d 7b04 ldr.w r7, [sp], #4 8006934: 4770 bx lr 8006936: bf00 nop 8006938: 2000883c .word 0x2000883c 800693c: 20008844 .word 0x20008844 08006940 : 8006940: 2300 movs r3, #0 8006942: b510 push {r4, lr} 8006944: 4604 mov r4, r0 8006946: e9c0 3300 strd r3, r3, [r0] 800694a: e9c0 3304 strd r3, r3, [r0, #16] 800694e: 6083 str r3, [r0, #8] 8006950: 8181 strh r1, [r0, #12] 8006952: 6643 str r3, [r0, #100] @ 0x64 8006954: 81c2 strh r2, [r0, #14] 8006956: 6183 str r3, [r0, #24] 8006958: 4619 mov r1, r3 800695a: 2208 movs r2, #8 800695c: 305c adds r0, #92 @ 0x5c 800695e: f000 fa23 bl 8006da8 8006962: 4b0d ldr r3, [pc, #52] @ (8006998 ) 8006964: 6263 str r3, [r4, #36] @ 0x24 8006966: 4b0d ldr r3, [pc, #52] @ (800699c ) 8006968: 62a3 str r3, [r4, #40] @ 0x28 800696a: 4b0d ldr r3, [pc, #52] @ (80069a0 ) 800696c: 62e3 str r3, [r4, #44] @ 0x2c 800696e: 4b0d ldr r3, [pc, #52] @ (80069a4 ) 8006970: 6323 str r3, [r4, #48] @ 0x30 8006972: 4b0d ldr r3, [pc, #52] @ (80069a8 ) 8006974: 6224 str r4, [r4, #32] 8006976: 429c cmp r4, r3 8006978: d006 beq.n 8006988 800697a: f103 0268 add.w r2, r3, #104 @ 0x68 800697e: 4294 cmp r4, r2 8006980: d002 beq.n 8006988 8006982: 33d0 adds r3, #208 @ 0xd0 8006984: 429c cmp r4, r3 8006986: d105 bne.n 8006994 8006988: f104 0058 add.w r0, r4, #88 @ 0x58 800698c: e8bd 4010 ldmia.w sp!, {r4, lr} 8006990: f000 bae0 b.w 8006f54 <__retarget_lock_init_recursive> 8006994: bd10 pop {r4, pc} 8006996: bf00 nop 8006998: 08006b81 .word 0x08006b81 800699c: 08006ba3 .word 0x08006ba3 80069a0: 08006bdb .word 0x08006bdb 80069a4: 08006bff .word 0x08006bff 80069a8: 20008854 .word 0x20008854 080069ac : 80069ac: 4a02 ldr r2, [pc, #8] @ (80069b8 ) 80069ae: 4903 ldr r1, [pc, #12] @ (80069bc ) 80069b0: 4803 ldr r0, [pc, #12] @ (80069c0 ) 80069b2: f000 b869 b.w 8006a88 <_fwalk_sglue> 80069b6: bf00 nop 80069b8: 20000018 .word 0x20000018 80069bc: 08007839 .word 0x08007839 80069c0: 20000028 .word 0x20000028 080069c4 : 80069c4: 6841 ldr r1, [r0, #4] 80069c6: 4b0c ldr r3, [pc, #48] @ (80069f8 ) 80069c8: 4299 cmp r1, r3 80069ca: b510 push {r4, lr} 80069cc: 4604 mov r4, r0 80069ce: d001 beq.n 80069d4 80069d0: f000 ff32 bl 8007838 <_fflush_r> 80069d4: 68a1 ldr r1, [r4, #8] 80069d6: 4b09 ldr r3, [pc, #36] @ (80069fc ) 80069d8: 4299 cmp r1, r3 80069da: d002 beq.n 80069e2 80069dc: 4620 mov r0, r4 80069de: f000 ff2b bl 8007838 <_fflush_r> 80069e2: 68e1 ldr r1, [r4, #12] 80069e4: 4b06 ldr r3, [pc, #24] @ (8006a00 ) 80069e6: 4299 cmp r1, r3 80069e8: d004 beq.n 80069f4 80069ea: 4620 mov r0, r4 80069ec: e8bd 4010 ldmia.w sp!, {r4, lr} 80069f0: f000 bf22 b.w 8007838 <_fflush_r> 80069f4: bd10 pop {r4, pc} 80069f6: bf00 nop 80069f8: 20008854 .word 0x20008854 80069fc: 200088bc .word 0x200088bc 8006a00: 20008924 .word 0x20008924 08006a04 : 8006a04: b510 push {r4, lr} 8006a06: 4b0b ldr r3, [pc, #44] @ (8006a34 ) 8006a08: 4c0b ldr r4, [pc, #44] @ (8006a38 ) 8006a0a: 4a0c ldr r2, [pc, #48] @ (8006a3c ) 8006a0c: 601a str r2, [r3, #0] 8006a0e: 4620 mov r0, r4 8006a10: 2200 movs r2, #0 8006a12: 2104 movs r1, #4 8006a14: f7ff ff94 bl 8006940 8006a18: f104 0068 add.w r0, r4, #104 @ 0x68 8006a1c: 2201 movs r2, #1 8006a1e: 2109 movs r1, #9 8006a20: f7ff ff8e bl 8006940 8006a24: f104 00d0 add.w r0, r4, #208 @ 0xd0 8006a28: 2202 movs r2, #2 8006a2a: e8bd 4010 ldmia.w sp!, {r4, lr} 8006a2e: 2112 movs r1, #18 8006a30: f7ff bf86 b.w 8006940 8006a34: 2000898c .word 0x2000898c 8006a38: 20008854 .word 0x20008854 8006a3c: 080069ad .word 0x080069ad 08006a40 <__sfp_lock_acquire>: 8006a40: 4801 ldr r0, [pc, #4] @ (8006a48 <__sfp_lock_acquire+0x8>) 8006a42: f000 ba88 b.w 8006f56 <__retarget_lock_acquire_recursive> 8006a46: bf00 nop 8006a48: 20008995 .word 0x20008995 08006a4c <__sfp_lock_release>: 8006a4c: 4801 ldr r0, [pc, #4] @ (8006a54 <__sfp_lock_release+0x8>) 8006a4e: f000 ba83 b.w 8006f58 <__retarget_lock_release_recursive> 8006a52: bf00 nop 8006a54: 20008995 .word 0x20008995 08006a58 <__sinit>: 8006a58: b510 push {r4, lr} 8006a5a: 4604 mov r4, r0 8006a5c: f7ff fff0 bl 8006a40 <__sfp_lock_acquire> 8006a60: 6a23 ldr r3, [r4, #32] 8006a62: b11b cbz r3, 8006a6c <__sinit+0x14> 8006a64: e8bd 4010 ldmia.w sp!, {r4, lr} 8006a68: f7ff bff0 b.w 8006a4c <__sfp_lock_release> 8006a6c: 4b04 ldr r3, [pc, #16] @ (8006a80 <__sinit+0x28>) 8006a6e: 6223 str r3, [r4, #32] 8006a70: 4b04 ldr r3, [pc, #16] @ (8006a84 <__sinit+0x2c>) 8006a72: 681b ldr r3, [r3, #0] 8006a74: 2b00 cmp r3, #0 8006a76: d1f5 bne.n 8006a64 <__sinit+0xc> 8006a78: f7ff ffc4 bl 8006a04 8006a7c: e7f2 b.n 8006a64 <__sinit+0xc> 8006a7e: bf00 nop 8006a80: 080069c5 .word 0x080069c5 8006a84: 2000898c .word 0x2000898c 08006a88 <_fwalk_sglue>: 8006a88: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8006a8c: 4607 mov r7, r0 8006a8e: 4688 mov r8, r1 8006a90: 4614 mov r4, r2 8006a92: 2600 movs r6, #0 8006a94: e9d4 9501 ldrd r9, r5, [r4, #4] 8006a98: f1b9 0901 subs.w r9, r9, #1 8006a9c: d505 bpl.n 8006aaa <_fwalk_sglue+0x22> 8006a9e: 6824 ldr r4, [r4, #0] 8006aa0: 2c00 cmp r4, #0 8006aa2: d1f7 bne.n 8006a94 <_fwalk_sglue+0xc> 8006aa4: 4630 mov r0, r6 8006aa6: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8006aaa: 89ab ldrh r3, [r5, #12] 8006aac: 2b01 cmp r3, #1 8006aae: d907 bls.n 8006ac0 <_fwalk_sglue+0x38> 8006ab0: f9b5 300e ldrsh.w r3, [r5, #14] 8006ab4: 3301 adds r3, #1 8006ab6: d003 beq.n 8006ac0 <_fwalk_sglue+0x38> 8006ab8: 4629 mov r1, r5 8006aba: 4638 mov r0, r7 8006abc: 47c0 blx r8 8006abe: 4306 orrs r6, r0 8006ac0: 3568 adds r5, #104 @ 0x68 8006ac2: e7e9 b.n 8006a98 <_fwalk_sglue+0x10> 08006ac4 <_puts_r>: 8006ac4: 6a03 ldr r3, [r0, #32] 8006ac6: b570 push {r4, r5, r6, lr} 8006ac8: 6884 ldr r4, [r0, #8] 8006aca: 4605 mov r5, r0 8006acc: 460e mov r6, r1 8006ace: b90b cbnz r3, 8006ad4 <_puts_r+0x10> 8006ad0: f7ff ffc2 bl 8006a58 <__sinit> 8006ad4: 6e63 ldr r3, [r4, #100] @ 0x64 8006ad6: 07db lsls r3, r3, #31 8006ad8: d405 bmi.n 8006ae6 <_puts_r+0x22> 8006ada: 89a3 ldrh r3, [r4, #12] 8006adc: 0598 lsls r0, r3, #22 8006ade: d402 bmi.n 8006ae6 <_puts_r+0x22> 8006ae0: 6da0 ldr r0, [r4, #88] @ 0x58 8006ae2: f000 fa38 bl 8006f56 <__retarget_lock_acquire_recursive> 8006ae6: 89a3 ldrh r3, [r4, #12] 8006ae8: 0719 lsls r1, r3, #28 8006aea: d502 bpl.n 8006af2 <_puts_r+0x2e> 8006aec: 6923 ldr r3, [r4, #16] 8006aee: 2b00 cmp r3, #0 8006af0: d135 bne.n 8006b5e <_puts_r+0x9a> 8006af2: 4621 mov r1, r4 8006af4: 4628 mov r0, r5 8006af6: f000 f901 bl 8006cfc <__swsetup_r> 8006afa: b380 cbz r0, 8006b5e <_puts_r+0x9a> 8006afc: f04f 35ff mov.w r5, #4294967295 @ 0xffffffff 8006b00: 6e63 ldr r3, [r4, #100] @ 0x64 8006b02: 07da lsls r2, r3, #31 8006b04: d405 bmi.n 8006b12 <_puts_r+0x4e> 8006b06: 89a3 ldrh r3, [r4, #12] 8006b08: 059b lsls r3, r3, #22 8006b0a: d402 bmi.n 8006b12 <_puts_r+0x4e> 8006b0c: 6da0 ldr r0, [r4, #88] @ 0x58 8006b0e: f000 fa23 bl 8006f58 <__retarget_lock_release_recursive> 8006b12: 4628 mov r0, r5 8006b14: bd70 pop {r4, r5, r6, pc} 8006b16: 2b00 cmp r3, #0 8006b18: da04 bge.n 8006b24 <_puts_r+0x60> 8006b1a: 69a2 ldr r2, [r4, #24] 8006b1c: 429a cmp r2, r3 8006b1e: dc17 bgt.n 8006b50 <_puts_r+0x8c> 8006b20: 290a cmp r1, #10 8006b22: d015 beq.n 8006b50 <_puts_r+0x8c> 8006b24: 6823 ldr r3, [r4, #0] 8006b26: 1c5a adds r2, r3, #1 8006b28: 6022 str r2, [r4, #0] 8006b2a: 7019 strb r1, [r3, #0] 8006b2c: 68a3 ldr r3, [r4, #8] 8006b2e: f816 1f01 ldrb.w r1, [r6, #1]! 8006b32: 3b01 subs r3, #1 8006b34: 60a3 str r3, [r4, #8] 8006b36: 2900 cmp r1, #0 8006b38: d1ed bne.n 8006b16 <_puts_r+0x52> 8006b3a: 2b00 cmp r3, #0 8006b3c: da11 bge.n 8006b62 <_puts_r+0x9e> 8006b3e: 4622 mov r2, r4 8006b40: 210a movs r1, #10 8006b42: 4628 mov r0, r5 8006b44: f000 f89c bl 8006c80 <__swbuf_r> 8006b48: 3001 adds r0, #1 8006b4a: d0d7 beq.n 8006afc <_puts_r+0x38> 8006b4c: 250a movs r5, #10 8006b4e: e7d7 b.n 8006b00 <_puts_r+0x3c> 8006b50: 4622 mov r2, r4 8006b52: 4628 mov r0, r5 8006b54: f000 f894 bl 8006c80 <__swbuf_r> 8006b58: 3001 adds r0, #1 8006b5a: d1e7 bne.n 8006b2c <_puts_r+0x68> 8006b5c: e7ce b.n 8006afc <_puts_r+0x38> 8006b5e: 3e01 subs r6, #1 8006b60: e7e4 b.n 8006b2c <_puts_r+0x68> 8006b62: 6823 ldr r3, [r4, #0] 8006b64: 1c5a adds r2, r3, #1 8006b66: 6022 str r2, [r4, #0] 8006b68: 220a movs r2, #10 8006b6a: 701a strb r2, [r3, #0] 8006b6c: e7ee b.n 8006b4c <_puts_r+0x88> ... 08006b70 : 8006b70: 4b02 ldr r3, [pc, #8] @ (8006b7c ) 8006b72: 4601 mov r1, r0 8006b74: 6818 ldr r0, [r3, #0] 8006b76: f7ff bfa5 b.w 8006ac4 <_puts_r> 8006b7a: bf00 nop 8006b7c: 20000024 .word 0x20000024 08006b80 <__sread>: 8006b80: b510 push {r4, lr} 8006b82: 460c mov r4, r1 8006b84: f9b1 100e ldrsh.w r1, [r1, #14] 8006b88: f000 f996 bl 8006eb8 <_read_r> 8006b8c: 2800 cmp r0, #0 8006b8e: bfab itete ge 8006b90: 6d63 ldrge r3, [r4, #84] @ 0x54 8006b92: 89a3 ldrhlt r3, [r4, #12] 8006b94: 181b addge r3, r3, r0 8006b96: f423 5380 biclt.w r3, r3, #4096 @ 0x1000 8006b9a: bfac ite ge 8006b9c: 6563 strge r3, [r4, #84] @ 0x54 8006b9e: 81a3 strhlt r3, [r4, #12] 8006ba0: bd10 pop {r4, pc} 08006ba2 <__swrite>: 8006ba2: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8006ba6: 461f mov r7, r3 8006ba8: 898b ldrh r3, [r1, #12] 8006baa: 05db lsls r3, r3, #23 8006bac: 4605 mov r5, r0 8006bae: 460c mov r4, r1 8006bb0: 4616 mov r6, r2 8006bb2: d505 bpl.n 8006bc0 <__swrite+0x1e> 8006bb4: f9b1 100e ldrsh.w r1, [r1, #14] 8006bb8: 2302 movs r3, #2 8006bba: 2200 movs r2, #0 8006bbc: f000 f96a bl 8006e94 <_lseek_r> 8006bc0: 89a3 ldrh r3, [r4, #12] 8006bc2: f9b4 100e ldrsh.w r1, [r4, #14] 8006bc6: f423 5380 bic.w r3, r3, #4096 @ 0x1000 8006bca: 81a3 strh r3, [r4, #12] 8006bcc: 4632 mov r2, r6 8006bce: 463b mov r3, r7 8006bd0: 4628 mov r0, r5 8006bd2: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 8006bd6: f000 b981 b.w 8006edc <_write_r> 08006bda <__sseek>: 8006bda: b510 push {r4, lr} 8006bdc: 460c mov r4, r1 8006bde: f9b1 100e ldrsh.w r1, [r1, #14] 8006be2: f000 f957 bl 8006e94 <_lseek_r> 8006be6: 1c43 adds r3, r0, #1 8006be8: 89a3 ldrh r3, [r4, #12] 8006bea: bf15 itete ne 8006bec: 6560 strne r0, [r4, #84] @ 0x54 8006bee: f423 5380 biceq.w r3, r3, #4096 @ 0x1000 8006bf2: f443 5380 orrne.w r3, r3, #4096 @ 0x1000 8006bf6: 81a3 strheq r3, [r4, #12] 8006bf8: bf18 it ne 8006bfa: 81a3 strhne r3, [r4, #12] 8006bfc: bd10 pop {r4, pc} 08006bfe <__sclose>: 8006bfe: f9b1 100e ldrsh.w r1, [r1, #14] 8006c02: f000 b8d9 b.w 8006db8 <_close_r> 08006c06 <_vsniprintf_r>: 8006c06: b530 push {r4, r5, lr} 8006c08: 4614 mov r4, r2 8006c0a: 2c00 cmp r4, #0 8006c0c: b09b sub sp, #108 @ 0x6c 8006c0e: 4605 mov r5, r0 8006c10: 461a mov r2, r3 8006c12: da05 bge.n 8006c20 <_vsniprintf_r+0x1a> 8006c14: 238b movs r3, #139 @ 0x8b 8006c16: 6003 str r3, [r0, #0] 8006c18: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8006c1c: b01b add sp, #108 @ 0x6c 8006c1e: bd30 pop {r4, r5, pc} 8006c20: f44f 7302 mov.w r3, #520 @ 0x208 8006c24: f8ad 300c strh.w r3, [sp, #12] 8006c28: f04f 0300 mov.w r3, #0 8006c2c: 9319 str r3, [sp, #100] @ 0x64 8006c2e: bf14 ite ne 8006c30: f104 33ff addne.w r3, r4, #4294967295 @ 0xffffffff 8006c34: 4623 moveq r3, r4 8006c36: 9302 str r3, [sp, #8] 8006c38: 9305 str r3, [sp, #20] 8006c3a: f64f 73ff movw r3, #65535 @ 0xffff 8006c3e: 9100 str r1, [sp, #0] 8006c40: 9104 str r1, [sp, #16] 8006c42: f8ad 300e strh.w r3, [sp, #14] 8006c46: 4669 mov r1, sp 8006c48: 9b1e ldr r3, [sp, #120] @ 0x78 8006c4a: f000 fae9 bl 8007220 <_svfiprintf_r> 8006c4e: 1c43 adds r3, r0, #1 8006c50: bfbc itt lt 8006c52: 238b movlt r3, #139 @ 0x8b 8006c54: 602b strlt r3, [r5, #0] 8006c56: 2c00 cmp r4, #0 8006c58: d0e0 beq.n 8006c1c <_vsniprintf_r+0x16> 8006c5a: 9b00 ldr r3, [sp, #0] 8006c5c: 2200 movs r2, #0 8006c5e: 701a strb r2, [r3, #0] 8006c60: e7dc b.n 8006c1c <_vsniprintf_r+0x16> ... 08006c64 : 8006c64: b507 push {r0, r1, r2, lr} 8006c66: 9300 str r3, [sp, #0] 8006c68: 4613 mov r3, r2 8006c6a: 460a mov r2, r1 8006c6c: 4601 mov r1, r0 8006c6e: 4803 ldr r0, [pc, #12] @ (8006c7c ) 8006c70: 6800 ldr r0, [r0, #0] 8006c72: f7ff ffc8 bl 8006c06 <_vsniprintf_r> 8006c76: b003 add sp, #12 8006c78: f85d fb04 ldr.w pc, [sp], #4 8006c7c: 20000024 .word 0x20000024 08006c80 <__swbuf_r>: 8006c80: b5f8 push {r3, r4, r5, r6, r7, lr} 8006c82: 460e mov r6, r1 8006c84: 4614 mov r4, r2 8006c86: 4605 mov r5, r0 8006c88: b118 cbz r0, 8006c92 <__swbuf_r+0x12> 8006c8a: 6a03 ldr r3, [r0, #32] 8006c8c: b90b cbnz r3, 8006c92 <__swbuf_r+0x12> 8006c8e: f7ff fee3 bl 8006a58 <__sinit> 8006c92: 69a3 ldr r3, [r4, #24] 8006c94: 60a3 str r3, [r4, #8] 8006c96: 89a3 ldrh r3, [r4, #12] 8006c98: 071a lsls r2, r3, #28 8006c9a: d501 bpl.n 8006ca0 <__swbuf_r+0x20> 8006c9c: 6923 ldr r3, [r4, #16] 8006c9e: b943 cbnz r3, 8006cb2 <__swbuf_r+0x32> 8006ca0: 4621 mov r1, r4 8006ca2: 4628 mov r0, r5 8006ca4: f000 f82a bl 8006cfc <__swsetup_r> 8006ca8: b118 cbz r0, 8006cb2 <__swbuf_r+0x32> 8006caa: f04f 37ff mov.w r7, #4294967295 @ 0xffffffff 8006cae: 4638 mov r0, r7 8006cb0: bdf8 pop {r3, r4, r5, r6, r7, pc} 8006cb2: 6823 ldr r3, [r4, #0] 8006cb4: 6922 ldr r2, [r4, #16] 8006cb6: 1a98 subs r0, r3, r2 8006cb8: 6963 ldr r3, [r4, #20] 8006cba: b2f6 uxtb r6, r6 8006cbc: 4283 cmp r3, r0 8006cbe: 4637 mov r7, r6 8006cc0: dc05 bgt.n 8006cce <__swbuf_r+0x4e> 8006cc2: 4621 mov r1, r4 8006cc4: 4628 mov r0, r5 8006cc6: f000 fdb7 bl 8007838 <_fflush_r> 8006cca: 2800 cmp r0, #0 8006ccc: d1ed bne.n 8006caa <__swbuf_r+0x2a> 8006cce: 68a3 ldr r3, [r4, #8] 8006cd0: 3b01 subs r3, #1 8006cd2: 60a3 str r3, [r4, #8] 8006cd4: 6823 ldr r3, [r4, #0] 8006cd6: 1c5a adds r2, r3, #1 8006cd8: 6022 str r2, [r4, #0] 8006cda: 701e strb r6, [r3, #0] 8006cdc: 6962 ldr r2, [r4, #20] 8006cde: 1c43 adds r3, r0, #1 8006ce0: 429a cmp r2, r3 8006ce2: d004 beq.n 8006cee <__swbuf_r+0x6e> 8006ce4: 89a3 ldrh r3, [r4, #12] 8006ce6: 07db lsls r3, r3, #31 8006ce8: d5e1 bpl.n 8006cae <__swbuf_r+0x2e> 8006cea: 2e0a cmp r6, #10 8006cec: d1df bne.n 8006cae <__swbuf_r+0x2e> 8006cee: 4621 mov r1, r4 8006cf0: 4628 mov r0, r5 8006cf2: f000 fda1 bl 8007838 <_fflush_r> 8006cf6: 2800 cmp r0, #0 8006cf8: d0d9 beq.n 8006cae <__swbuf_r+0x2e> 8006cfa: e7d6 b.n 8006caa <__swbuf_r+0x2a> 08006cfc <__swsetup_r>: 8006cfc: b538 push {r3, r4, r5, lr} 8006cfe: 4b29 ldr r3, [pc, #164] @ (8006da4 <__swsetup_r+0xa8>) 8006d00: 4605 mov r5, r0 8006d02: 6818 ldr r0, [r3, #0] 8006d04: 460c mov r4, r1 8006d06: b118 cbz r0, 8006d10 <__swsetup_r+0x14> 8006d08: 6a03 ldr r3, [r0, #32] 8006d0a: b90b cbnz r3, 8006d10 <__swsetup_r+0x14> 8006d0c: f7ff fea4 bl 8006a58 <__sinit> 8006d10: f9b4 300c ldrsh.w r3, [r4, #12] 8006d14: 0719 lsls r1, r3, #28 8006d16: d422 bmi.n 8006d5e <__swsetup_r+0x62> 8006d18: 06da lsls r2, r3, #27 8006d1a: d407 bmi.n 8006d2c <__swsetup_r+0x30> 8006d1c: 2209 movs r2, #9 8006d1e: 602a str r2, [r5, #0] 8006d20: f043 0340 orr.w r3, r3, #64 @ 0x40 8006d24: 81a3 strh r3, [r4, #12] 8006d26: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8006d2a: e033 b.n 8006d94 <__swsetup_r+0x98> 8006d2c: 0758 lsls r0, r3, #29 8006d2e: d512 bpl.n 8006d56 <__swsetup_r+0x5a> 8006d30: 6b61 ldr r1, [r4, #52] @ 0x34 8006d32: b141 cbz r1, 8006d46 <__swsetup_r+0x4a> 8006d34: f104 0344 add.w r3, r4, #68 @ 0x44 8006d38: 4299 cmp r1, r3 8006d3a: d002 beq.n 8006d42 <__swsetup_r+0x46> 8006d3c: 4628 mov r0, r5 8006d3e: f000 f91b bl 8006f78 <_free_r> 8006d42: 2300 movs r3, #0 8006d44: 6363 str r3, [r4, #52] @ 0x34 8006d46: 89a3 ldrh r3, [r4, #12] 8006d48: f023 0324 bic.w r3, r3, #36 @ 0x24 8006d4c: 81a3 strh r3, [r4, #12] 8006d4e: 2300 movs r3, #0 8006d50: 6063 str r3, [r4, #4] 8006d52: 6923 ldr r3, [r4, #16] 8006d54: 6023 str r3, [r4, #0] 8006d56: 89a3 ldrh r3, [r4, #12] 8006d58: f043 0308 orr.w r3, r3, #8 8006d5c: 81a3 strh r3, [r4, #12] 8006d5e: 6923 ldr r3, [r4, #16] 8006d60: b94b cbnz r3, 8006d76 <__swsetup_r+0x7a> 8006d62: 89a3 ldrh r3, [r4, #12] 8006d64: f403 7320 and.w r3, r3, #640 @ 0x280 8006d68: f5b3 7f00 cmp.w r3, #512 @ 0x200 8006d6c: d003 beq.n 8006d76 <__swsetup_r+0x7a> 8006d6e: 4621 mov r1, r4 8006d70: 4628 mov r0, r5 8006d72: f000 fdaf bl 80078d4 <__smakebuf_r> 8006d76: f9b4 300c ldrsh.w r3, [r4, #12] 8006d7a: f013 0201 ands.w r2, r3, #1 8006d7e: d00a beq.n 8006d96 <__swsetup_r+0x9a> 8006d80: 2200 movs r2, #0 8006d82: 60a2 str r2, [r4, #8] 8006d84: 6962 ldr r2, [r4, #20] 8006d86: 4252 negs r2, r2 8006d88: 61a2 str r2, [r4, #24] 8006d8a: 6922 ldr r2, [r4, #16] 8006d8c: b942 cbnz r2, 8006da0 <__swsetup_r+0xa4> 8006d8e: f013 0080 ands.w r0, r3, #128 @ 0x80 8006d92: d1c5 bne.n 8006d20 <__swsetup_r+0x24> 8006d94: bd38 pop {r3, r4, r5, pc} 8006d96: 0799 lsls r1, r3, #30 8006d98: bf58 it pl 8006d9a: 6962 ldrpl r2, [r4, #20] 8006d9c: 60a2 str r2, [r4, #8] 8006d9e: e7f4 b.n 8006d8a <__swsetup_r+0x8e> 8006da0: 2000 movs r0, #0 8006da2: e7f7 b.n 8006d94 <__swsetup_r+0x98> 8006da4: 20000024 .word 0x20000024 08006da8 : 8006da8: 4402 add r2, r0 8006daa: 4603 mov r3, r0 8006dac: 4293 cmp r3, r2 8006dae: d100 bne.n 8006db2 8006db0: 4770 bx lr 8006db2: f803 1b01 strb.w r1, [r3], #1 8006db6: e7f9 b.n 8006dac 08006db8 <_close_r>: 8006db8: b538 push {r3, r4, r5, lr} 8006dba: 4d06 ldr r5, [pc, #24] @ (8006dd4 <_close_r+0x1c>) 8006dbc: 2300 movs r3, #0 8006dbe: 4604 mov r4, r0 8006dc0: 4608 mov r0, r1 8006dc2: 602b str r3, [r5, #0] 8006dc4: f7fb f92b bl 800201e <_close> 8006dc8: 1c43 adds r3, r0, #1 8006dca: d102 bne.n 8006dd2 <_close_r+0x1a> 8006dcc: 682b ldr r3, [r5, #0] 8006dce: b103 cbz r3, 8006dd2 <_close_r+0x1a> 8006dd0: 6023 str r3, [r4, #0] 8006dd2: bd38 pop {r3, r4, r5, pc} 8006dd4: 20008990 .word 0x20008990 08006dd8 <_reclaim_reent>: 8006dd8: 4b2d ldr r3, [pc, #180] @ (8006e90 <_reclaim_reent+0xb8>) 8006dda: 681b ldr r3, [r3, #0] 8006ddc: 4283 cmp r3, r0 8006dde: b570 push {r4, r5, r6, lr} 8006de0: 4604 mov r4, r0 8006de2: d053 beq.n 8006e8c <_reclaim_reent+0xb4> 8006de4: 69c3 ldr r3, [r0, #28] 8006de6: b31b cbz r3, 8006e30 <_reclaim_reent+0x58> 8006de8: 68db ldr r3, [r3, #12] 8006dea: b163 cbz r3, 8006e06 <_reclaim_reent+0x2e> 8006dec: 2500 movs r5, #0 8006dee: 69e3 ldr r3, [r4, #28] 8006df0: 68db ldr r3, [r3, #12] 8006df2: 5959 ldr r1, [r3, r5] 8006df4: b9b1 cbnz r1, 8006e24 <_reclaim_reent+0x4c> 8006df6: 3504 adds r5, #4 8006df8: 2d80 cmp r5, #128 @ 0x80 8006dfa: d1f8 bne.n 8006dee <_reclaim_reent+0x16> 8006dfc: 69e3 ldr r3, [r4, #28] 8006dfe: 4620 mov r0, r4 8006e00: 68d9 ldr r1, [r3, #12] 8006e02: f000 f8b9 bl 8006f78 <_free_r> 8006e06: 69e3 ldr r3, [r4, #28] 8006e08: 6819 ldr r1, [r3, #0] 8006e0a: b111 cbz r1, 8006e12 <_reclaim_reent+0x3a> 8006e0c: 4620 mov r0, r4 8006e0e: f000 f8b3 bl 8006f78 <_free_r> 8006e12: 69e3 ldr r3, [r4, #28] 8006e14: 689d ldr r5, [r3, #8] 8006e16: b15d cbz r5, 8006e30 <_reclaim_reent+0x58> 8006e18: 4629 mov r1, r5 8006e1a: 4620 mov r0, r4 8006e1c: 682d ldr r5, [r5, #0] 8006e1e: f000 f8ab bl 8006f78 <_free_r> 8006e22: e7f8 b.n 8006e16 <_reclaim_reent+0x3e> 8006e24: 680e ldr r6, [r1, #0] 8006e26: 4620 mov r0, r4 8006e28: f000 f8a6 bl 8006f78 <_free_r> 8006e2c: 4631 mov r1, r6 8006e2e: e7e1 b.n 8006df4 <_reclaim_reent+0x1c> 8006e30: 6961 ldr r1, [r4, #20] 8006e32: b111 cbz r1, 8006e3a <_reclaim_reent+0x62> 8006e34: 4620 mov r0, r4 8006e36: f000 f89f bl 8006f78 <_free_r> 8006e3a: 69e1 ldr r1, [r4, #28] 8006e3c: b111 cbz r1, 8006e44 <_reclaim_reent+0x6c> 8006e3e: 4620 mov r0, r4 8006e40: f000 f89a bl 8006f78 <_free_r> 8006e44: 6b21 ldr r1, [r4, #48] @ 0x30 8006e46: b111 cbz r1, 8006e4e <_reclaim_reent+0x76> 8006e48: 4620 mov r0, r4 8006e4a: f000 f895 bl 8006f78 <_free_r> 8006e4e: 6b61 ldr r1, [r4, #52] @ 0x34 8006e50: b111 cbz r1, 8006e58 <_reclaim_reent+0x80> 8006e52: 4620 mov r0, r4 8006e54: f000 f890 bl 8006f78 <_free_r> 8006e58: 6ba1 ldr r1, [r4, #56] @ 0x38 8006e5a: b111 cbz r1, 8006e62 <_reclaim_reent+0x8a> 8006e5c: 4620 mov r0, r4 8006e5e: f000 f88b bl 8006f78 <_free_r> 8006e62: 6ca1 ldr r1, [r4, #72] @ 0x48 8006e64: b111 cbz r1, 8006e6c <_reclaim_reent+0x94> 8006e66: 4620 mov r0, r4 8006e68: f000 f886 bl 8006f78 <_free_r> 8006e6c: 6c61 ldr r1, [r4, #68] @ 0x44 8006e6e: b111 cbz r1, 8006e76 <_reclaim_reent+0x9e> 8006e70: 4620 mov r0, r4 8006e72: f000 f881 bl 8006f78 <_free_r> 8006e76: 6ae1 ldr r1, [r4, #44] @ 0x2c 8006e78: b111 cbz r1, 8006e80 <_reclaim_reent+0xa8> 8006e7a: 4620 mov r0, r4 8006e7c: f000 f87c bl 8006f78 <_free_r> 8006e80: 6a23 ldr r3, [r4, #32] 8006e82: b11b cbz r3, 8006e8c <_reclaim_reent+0xb4> 8006e84: 4620 mov r0, r4 8006e86: e8bd 4070 ldmia.w sp!, {r4, r5, r6, lr} 8006e8a: 4718 bx r3 8006e8c: bd70 pop {r4, r5, r6, pc} 8006e8e: bf00 nop 8006e90: 20000024 .word 0x20000024 08006e94 <_lseek_r>: 8006e94: b538 push {r3, r4, r5, lr} 8006e96: 4d07 ldr r5, [pc, #28] @ (8006eb4 <_lseek_r+0x20>) 8006e98: 4604 mov r4, r0 8006e9a: 4608 mov r0, r1 8006e9c: 4611 mov r1, r2 8006e9e: 2200 movs r2, #0 8006ea0: 602a str r2, [r5, #0] 8006ea2: 461a mov r2, r3 8006ea4: f7fb f8e2 bl 800206c <_lseek> 8006ea8: 1c43 adds r3, r0, #1 8006eaa: d102 bne.n 8006eb2 <_lseek_r+0x1e> 8006eac: 682b ldr r3, [r5, #0] 8006eae: b103 cbz r3, 8006eb2 <_lseek_r+0x1e> 8006eb0: 6023 str r3, [r4, #0] 8006eb2: bd38 pop {r3, r4, r5, pc} 8006eb4: 20008990 .word 0x20008990 08006eb8 <_read_r>: 8006eb8: b538 push {r3, r4, r5, lr} 8006eba: 4d07 ldr r5, [pc, #28] @ (8006ed8 <_read_r+0x20>) 8006ebc: 4604 mov r4, r0 8006ebe: 4608 mov r0, r1 8006ec0: 4611 mov r1, r2 8006ec2: 2200 movs r2, #0 8006ec4: 602a str r2, [r5, #0] 8006ec6: 461a mov r2, r3 8006ec8: f7fb f88c bl 8001fe4 <_read> 8006ecc: 1c43 adds r3, r0, #1 8006ece: d102 bne.n 8006ed6 <_read_r+0x1e> 8006ed0: 682b ldr r3, [r5, #0] 8006ed2: b103 cbz r3, 8006ed6 <_read_r+0x1e> 8006ed4: 6023 str r3, [r4, #0] 8006ed6: bd38 pop {r3, r4, r5, pc} 8006ed8: 20008990 .word 0x20008990 08006edc <_write_r>: 8006edc: b538 push {r3, r4, r5, lr} 8006ede: 4d07 ldr r5, [pc, #28] @ (8006efc <_write_r+0x20>) 8006ee0: 4604 mov r4, r0 8006ee2: 4608 mov r0, r1 8006ee4: 4611 mov r1, r2 8006ee6: 2200 movs r2, #0 8006ee8: 602a str r2, [r5, #0] 8006eea: 461a mov r2, r3 8006eec: f7f9 ffca bl 8000e84 <_write> 8006ef0: 1c43 adds r3, r0, #1 8006ef2: d102 bne.n 8006efa <_write_r+0x1e> 8006ef4: 682b ldr r3, [r5, #0] 8006ef6: b103 cbz r3, 8006efa <_write_r+0x1e> 8006ef8: 6023 str r3, [r4, #0] 8006efa: bd38 pop {r3, r4, r5, pc} 8006efc: 20008990 .word 0x20008990 08006f00 <__errno>: 8006f00: 4b01 ldr r3, [pc, #4] @ (8006f08 <__errno+0x8>) 8006f02: 6818 ldr r0, [r3, #0] 8006f04: 4770 bx lr 8006f06: bf00 nop 8006f08: 20000024 .word 0x20000024 08006f0c <__libc_init_array>: 8006f0c: b570 push {r4, r5, r6, lr} 8006f0e: 4d0d ldr r5, [pc, #52] @ (8006f44 <__libc_init_array+0x38>) 8006f10: 4c0d ldr r4, [pc, #52] @ (8006f48 <__libc_init_array+0x3c>) 8006f12: 1b64 subs r4, r4, r5 8006f14: 10a4 asrs r4, r4, #2 8006f16: 2600 movs r6, #0 8006f18: 42a6 cmp r6, r4 8006f1a: d109 bne.n 8006f30 <__libc_init_array+0x24> 8006f1c: 4d0b ldr r5, [pc, #44] @ (8006f4c <__libc_init_array+0x40>) 8006f1e: 4c0c ldr r4, [pc, #48] @ (8006f50 <__libc_init_array+0x44>) 8006f20: f000 fd96 bl 8007a50 <_init> 8006f24: 1b64 subs r4, r4, r5 8006f26: 10a4 asrs r4, r4, #2 8006f28: 2600 movs r6, #0 8006f2a: 42a6 cmp r6, r4 8006f2c: d105 bne.n 8006f3a <__libc_init_array+0x2e> 8006f2e: bd70 pop {r4, r5, r6, pc} 8006f30: f855 3b04 ldr.w r3, [r5], #4 8006f34: 4798 blx r3 8006f36: 3601 adds r6, #1 8006f38: e7ee b.n 8006f18 <__libc_init_array+0xc> 8006f3a: f855 3b04 ldr.w r3, [r5], #4 8006f3e: 4798 blx r3 8006f40: 3601 adds r6, #1 8006f42: e7f2 b.n 8006f2a <__libc_init_array+0x1e> 8006f44: 08009628 .word 0x08009628 8006f48: 08009628 .word 0x08009628 8006f4c: 08009628 .word 0x08009628 8006f50: 0800962c .word 0x0800962c 08006f54 <__retarget_lock_init_recursive>: 8006f54: 4770 bx lr 08006f56 <__retarget_lock_acquire_recursive>: 8006f56: 4770 bx lr 08006f58 <__retarget_lock_release_recursive>: 8006f58: 4770 bx lr 08006f5a : 8006f5a: 440a add r2, r1 8006f5c: 4291 cmp r1, r2 8006f5e: f100 33ff add.w r3, r0, #4294967295 @ 0xffffffff 8006f62: d100 bne.n 8006f66 8006f64: 4770 bx lr 8006f66: b510 push {r4, lr} 8006f68: f811 4b01 ldrb.w r4, [r1], #1 8006f6c: f803 4f01 strb.w r4, [r3, #1]! 8006f70: 4291 cmp r1, r2 8006f72: d1f9 bne.n 8006f68 8006f74: bd10 pop {r4, pc} ... 08006f78 <_free_r>: 8006f78: b538 push {r3, r4, r5, lr} 8006f7a: 4605 mov r5, r0 8006f7c: 2900 cmp r1, #0 8006f7e: d041 beq.n 8007004 <_free_r+0x8c> 8006f80: f851 3c04 ldr.w r3, [r1, #-4] 8006f84: 1f0c subs r4, r1, #4 8006f86: 2b00 cmp r3, #0 8006f88: bfb8 it lt 8006f8a: 18e4 addlt r4, r4, r3 8006f8c: f000 f8e0 bl 8007150 <__malloc_lock> 8006f90: 4a1d ldr r2, [pc, #116] @ (8007008 <_free_r+0x90>) 8006f92: 6813 ldr r3, [r2, #0] 8006f94: b933 cbnz r3, 8006fa4 <_free_r+0x2c> 8006f96: 6063 str r3, [r4, #4] 8006f98: 6014 str r4, [r2, #0] 8006f9a: 4628 mov r0, r5 8006f9c: e8bd 4038 ldmia.w sp!, {r3, r4, r5, lr} 8006fa0: f000 b8dc b.w 800715c <__malloc_unlock> 8006fa4: 42a3 cmp r3, r4 8006fa6: d908 bls.n 8006fba <_free_r+0x42> 8006fa8: 6820 ldr r0, [r4, #0] 8006faa: 1821 adds r1, r4, r0 8006fac: 428b cmp r3, r1 8006fae: bf01 itttt eq 8006fb0: 6819 ldreq r1, [r3, #0] 8006fb2: 685b ldreq r3, [r3, #4] 8006fb4: 1809 addeq r1, r1, r0 8006fb6: 6021 streq r1, [r4, #0] 8006fb8: e7ed b.n 8006f96 <_free_r+0x1e> 8006fba: 461a mov r2, r3 8006fbc: 685b ldr r3, [r3, #4] 8006fbe: b10b cbz r3, 8006fc4 <_free_r+0x4c> 8006fc0: 42a3 cmp r3, r4 8006fc2: d9fa bls.n 8006fba <_free_r+0x42> 8006fc4: 6811 ldr r1, [r2, #0] 8006fc6: 1850 adds r0, r2, r1 8006fc8: 42a0 cmp r0, r4 8006fca: d10b bne.n 8006fe4 <_free_r+0x6c> 8006fcc: 6820 ldr r0, [r4, #0] 8006fce: 4401 add r1, r0 8006fd0: 1850 adds r0, r2, r1 8006fd2: 4283 cmp r3, r0 8006fd4: 6011 str r1, [r2, #0] 8006fd6: d1e0 bne.n 8006f9a <_free_r+0x22> 8006fd8: 6818 ldr r0, [r3, #0] 8006fda: 685b ldr r3, [r3, #4] 8006fdc: 6053 str r3, [r2, #4] 8006fde: 4408 add r0, r1 8006fe0: 6010 str r0, [r2, #0] 8006fe2: e7da b.n 8006f9a <_free_r+0x22> 8006fe4: d902 bls.n 8006fec <_free_r+0x74> 8006fe6: 230c movs r3, #12 8006fe8: 602b str r3, [r5, #0] 8006fea: e7d6 b.n 8006f9a <_free_r+0x22> 8006fec: 6820 ldr r0, [r4, #0] 8006fee: 1821 adds r1, r4, r0 8006ff0: 428b cmp r3, r1 8006ff2: bf04 itt eq 8006ff4: 6819 ldreq r1, [r3, #0] 8006ff6: 685b ldreq r3, [r3, #4] 8006ff8: 6063 str r3, [r4, #4] 8006ffa: bf04 itt eq 8006ffc: 1809 addeq r1, r1, r0 8006ffe: 6021 streq r1, [r4, #0] 8007000: 6054 str r4, [r2, #4] 8007002: e7ca b.n 8006f9a <_free_r+0x22> 8007004: bd38 pop {r3, r4, r5, pc} 8007006: bf00 nop 8007008: 2000899c .word 0x2000899c 0800700c : 800700c: b570 push {r4, r5, r6, lr} 800700e: 4e0f ldr r6, [pc, #60] @ (800704c ) 8007010: 460c mov r4, r1 8007012: 6831 ldr r1, [r6, #0] 8007014: 4605 mov r5, r0 8007016: b911 cbnz r1, 800701e 8007018: f000 fcd4 bl 80079c4 <_sbrk_r> 800701c: 6030 str r0, [r6, #0] 800701e: 4621 mov r1, r4 8007020: 4628 mov r0, r5 8007022: f000 fccf bl 80079c4 <_sbrk_r> 8007026: 1c43 adds r3, r0, #1 8007028: d103 bne.n 8007032 800702a: f04f 34ff mov.w r4, #4294967295 @ 0xffffffff 800702e: 4620 mov r0, r4 8007030: bd70 pop {r4, r5, r6, pc} 8007032: 1cc4 adds r4, r0, #3 8007034: f024 0403 bic.w r4, r4, #3 8007038: 42a0 cmp r0, r4 800703a: d0f8 beq.n 800702e 800703c: 1a21 subs r1, r4, r0 800703e: 4628 mov r0, r5 8007040: f000 fcc0 bl 80079c4 <_sbrk_r> 8007044: 3001 adds r0, #1 8007046: d1f2 bne.n 800702e 8007048: e7ef b.n 800702a 800704a: bf00 nop 800704c: 20008998 .word 0x20008998 08007050 <_malloc_r>: 8007050: e92d 43f8 stmdb sp!, {r3, r4, r5, r6, r7, r8, r9, lr} 8007054: 1ccd adds r5, r1, #3 8007056: f025 0503 bic.w r5, r5, #3 800705a: 3508 adds r5, #8 800705c: 2d0c cmp r5, #12 800705e: bf38 it cc 8007060: 250c movcc r5, #12 8007062: 2d00 cmp r5, #0 8007064: 4606 mov r6, r0 8007066: db01 blt.n 800706c <_malloc_r+0x1c> 8007068: 42a9 cmp r1, r5 800706a: d904 bls.n 8007076 <_malloc_r+0x26> 800706c: 230c movs r3, #12 800706e: 6033 str r3, [r6, #0] 8007070: 2000 movs r0, #0 8007072: e8bd 83f8 ldmia.w sp!, {r3, r4, r5, r6, r7, r8, r9, pc} 8007076: f8df 80d4 ldr.w r8, [pc, #212] @ 800714c <_malloc_r+0xfc> 800707a: f000 f869 bl 8007150 <__malloc_lock> 800707e: f8d8 3000 ldr.w r3, [r8] 8007082: 461c mov r4, r3 8007084: bb44 cbnz r4, 80070d8 <_malloc_r+0x88> 8007086: 4629 mov r1, r5 8007088: 4630 mov r0, r6 800708a: f7ff ffbf bl 800700c 800708e: 1c43 adds r3, r0, #1 8007090: 4604 mov r4, r0 8007092: d158 bne.n 8007146 <_malloc_r+0xf6> 8007094: f8d8 4000 ldr.w r4, [r8] 8007098: 4627 mov r7, r4 800709a: 2f00 cmp r7, #0 800709c: d143 bne.n 8007126 <_malloc_r+0xd6> 800709e: 2c00 cmp r4, #0 80070a0: d04b beq.n 800713a <_malloc_r+0xea> 80070a2: 6823 ldr r3, [r4, #0] 80070a4: 4639 mov r1, r7 80070a6: 4630 mov r0, r6 80070a8: eb04 0903 add.w r9, r4, r3 80070ac: f000 fc8a bl 80079c4 <_sbrk_r> 80070b0: 4581 cmp r9, r0 80070b2: d142 bne.n 800713a <_malloc_r+0xea> 80070b4: 6821 ldr r1, [r4, #0] 80070b6: 1a6d subs r5, r5, r1 80070b8: 4629 mov r1, r5 80070ba: 4630 mov r0, r6 80070bc: f7ff ffa6 bl 800700c 80070c0: 3001 adds r0, #1 80070c2: d03a beq.n 800713a <_malloc_r+0xea> 80070c4: 6823 ldr r3, [r4, #0] 80070c6: 442b add r3, r5 80070c8: 6023 str r3, [r4, #0] 80070ca: f8d8 3000 ldr.w r3, [r8] 80070ce: 685a ldr r2, [r3, #4] 80070d0: bb62 cbnz r2, 800712c <_malloc_r+0xdc> 80070d2: f8c8 7000 str.w r7, [r8] 80070d6: e00f b.n 80070f8 <_malloc_r+0xa8> 80070d8: 6822 ldr r2, [r4, #0] 80070da: 1b52 subs r2, r2, r5 80070dc: d420 bmi.n 8007120 <_malloc_r+0xd0> 80070de: 2a0b cmp r2, #11 80070e0: d917 bls.n 8007112 <_malloc_r+0xc2> 80070e2: 1961 adds r1, r4, r5 80070e4: 42a3 cmp r3, r4 80070e6: 6025 str r5, [r4, #0] 80070e8: bf18 it ne 80070ea: 6059 strne r1, [r3, #4] 80070ec: 6863 ldr r3, [r4, #4] 80070ee: bf08 it eq 80070f0: f8c8 1000 streq.w r1, [r8] 80070f4: 5162 str r2, [r4, r5] 80070f6: 604b str r3, [r1, #4] 80070f8: 4630 mov r0, r6 80070fa: f000 f82f bl 800715c <__malloc_unlock> 80070fe: f104 000b add.w r0, r4, #11 8007102: 1d23 adds r3, r4, #4 8007104: f020 0007 bic.w r0, r0, #7 8007108: 1ac2 subs r2, r0, r3 800710a: bf1c itt ne 800710c: 1a1b subne r3, r3, r0 800710e: 50a3 strne r3, [r4, r2] 8007110: e7af b.n 8007072 <_malloc_r+0x22> 8007112: 6862 ldr r2, [r4, #4] 8007114: 42a3 cmp r3, r4 8007116: bf0c ite eq 8007118: f8c8 2000 streq.w r2, [r8] 800711c: 605a strne r2, [r3, #4] 800711e: e7eb b.n 80070f8 <_malloc_r+0xa8> 8007120: 4623 mov r3, r4 8007122: 6864 ldr r4, [r4, #4] 8007124: e7ae b.n 8007084 <_malloc_r+0x34> 8007126: 463c mov r4, r7 8007128: 687f ldr r7, [r7, #4] 800712a: e7b6 b.n 800709a <_malloc_r+0x4a> 800712c: 461a mov r2, r3 800712e: 685b ldr r3, [r3, #4] 8007130: 42a3 cmp r3, r4 8007132: d1fb bne.n 800712c <_malloc_r+0xdc> 8007134: 2300 movs r3, #0 8007136: 6053 str r3, [r2, #4] 8007138: e7de b.n 80070f8 <_malloc_r+0xa8> 800713a: 230c movs r3, #12 800713c: 6033 str r3, [r6, #0] 800713e: 4630 mov r0, r6 8007140: f000 f80c bl 800715c <__malloc_unlock> 8007144: e794 b.n 8007070 <_malloc_r+0x20> 8007146: 6005 str r5, [r0, #0] 8007148: e7d6 b.n 80070f8 <_malloc_r+0xa8> 800714a: bf00 nop 800714c: 2000899c .word 0x2000899c 08007150 <__malloc_lock>: 8007150: 4801 ldr r0, [pc, #4] @ (8007158 <__malloc_lock+0x8>) 8007152: f7ff bf00 b.w 8006f56 <__retarget_lock_acquire_recursive> 8007156: bf00 nop 8007158: 20008994 .word 0x20008994 0800715c <__malloc_unlock>: 800715c: 4801 ldr r0, [pc, #4] @ (8007164 <__malloc_unlock+0x8>) 800715e: f7ff befb b.w 8006f58 <__retarget_lock_release_recursive> 8007162: bf00 nop 8007164: 20008994 .word 0x20008994 08007168 <__ssputs_r>: 8007168: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800716c: 688e ldr r6, [r1, #8] 800716e: 461f mov r7, r3 8007170: 42be cmp r6, r7 8007172: 680b ldr r3, [r1, #0] 8007174: 4682 mov sl, r0 8007176: 460c mov r4, r1 8007178: 4690 mov r8, r2 800717a: d82d bhi.n 80071d8 <__ssputs_r+0x70> 800717c: f9b1 200c ldrsh.w r2, [r1, #12] 8007180: f412 6f90 tst.w r2, #1152 @ 0x480 8007184: d026 beq.n 80071d4 <__ssputs_r+0x6c> 8007186: 6965 ldr r5, [r4, #20] 8007188: 6909 ldr r1, [r1, #16] 800718a: eb05 0545 add.w r5, r5, r5, lsl #1 800718e: eba3 0901 sub.w r9, r3, r1 8007192: eb05 75d5 add.w r5, r5, r5, lsr #31 8007196: 1c7b adds r3, r7, #1 8007198: 444b add r3, r9 800719a: 106d asrs r5, r5, #1 800719c: 429d cmp r5, r3 800719e: bf38 it cc 80071a0: 461d movcc r5, r3 80071a2: 0553 lsls r3, r2, #21 80071a4: d527 bpl.n 80071f6 <__ssputs_r+0x8e> 80071a6: 4629 mov r1, r5 80071a8: f7ff ff52 bl 8007050 <_malloc_r> 80071ac: 4606 mov r6, r0 80071ae: b360 cbz r0, 800720a <__ssputs_r+0xa2> 80071b0: 6921 ldr r1, [r4, #16] 80071b2: 464a mov r2, r9 80071b4: f7ff fed1 bl 8006f5a 80071b8: 89a3 ldrh r3, [r4, #12] 80071ba: f423 6390 bic.w r3, r3, #1152 @ 0x480 80071be: f043 0380 orr.w r3, r3, #128 @ 0x80 80071c2: 81a3 strh r3, [r4, #12] 80071c4: 6126 str r6, [r4, #16] 80071c6: 6165 str r5, [r4, #20] 80071c8: 444e add r6, r9 80071ca: eba5 0509 sub.w r5, r5, r9 80071ce: 6026 str r6, [r4, #0] 80071d0: 60a5 str r5, [r4, #8] 80071d2: 463e mov r6, r7 80071d4: 42be cmp r6, r7 80071d6: d900 bls.n 80071da <__ssputs_r+0x72> 80071d8: 463e mov r6, r7 80071da: 6820 ldr r0, [r4, #0] 80071dc: 4632 mov r2, r6 80071de: 4641 mov r1, r8 80071e0: f000 fbb4 bl 800794c 80071e4: 68a3 ldr r3, [r4, #8] 80071e6: 1b9b subs r3, r3, r6 80071e8: 60a3 str r3, [r4, #8] 80071ea: 6823 ldr r3, [r4, #0] 80071ec: 4433 add r3, r6 80071ee: 6023 str r3, [r4, #0] 80071f0: 2000 movs r0, #0 80071f2: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80071f6: 462a mov r2, r5 80071f8: f000 fbf4 bl 80079e4 <_realloc_r> 80071fc: 4606 mov r6, r0 80071fe: 2800 cmp r0, #0 8007200: d1e0 bne.n 80071c4 <__ssputs_r+0x5c> 8007202: 6921 ldr r1, [r4, #16] 8007204: 4650 mov r0, sl 8007206: f7ff feb7 bl 8006f78 <_free_r> 800720a: 230c movs r3, #12 800720c: f8ca 3000 str.w r3, [sl] 8007210: 89a3 ldrh r3, [r4, #12] 8007212: f043 0340 orr.w r3, r3, #64 @ 0x40 8007216: 81a3 strh r3, [r4, #12] 8007218: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800721c: e7e9 b.n 80071f2 <__ssputs_r+0x8a> ... 08007220 <_svfiprintf_r>: 8007220: e92d 4ff0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, fp, lr} 8007224: 4698 mov r8, r3 8007226: 898b ldrh r3, [r1, #12] 8007228: 061b lsls r3, r3, #24 800722a: b09d sub sp, #116 @ 0x74 800722c: 4607 mov r7, r0 800722e: 460d mov r5, r1 8007230: 4614 mov r4, r2 8007232: d510 bpl.n 8007256 <_svfiprintf_r+0x36> 8007234: 690b ldr r3, [r1, #16] 8007236: b973 cbnz r3, 8007256 <_svfiprintf_r+0x36> 8007238: 2140 movs r1, #64 @ 0x40 800723a: f7ff ff09 bl 8007050 <_malloc_r> 800723e: 6028 str r0, [r5, #0] 8007240: 6128 str r0, [r5, #16] 8007242: b930 cbnz r0, 8007252 <_svfiprintf_r+0x32> 8007244: 230c movs r3, #12 8007246: 603b str r3, [r7, #0] 8007248: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 800724c: b01d add sp, #116 @ 0x74 800724e: e8bd 8ff0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, fp, pc} 8007252: 2340 movs r3, #64 @ 0x40 8007254: 616b str r3, [r5, #20] 8007256: 2300 movs r3, #0 8007258: 9309 str r3, [sp, #36] @ 0x24 800725a: 2320 movs r3, #32 800725c: f88d 3029 strb.w r3, [sp, #41] @ 0x29 8007260: f8cd 800c str.w r8, [sp, #12] 8007264: 2330 movs r3, #48 @ 0x30 8007266: f8df 819c ldr.w r8, [pc, #412] @ 8007404 <_svfiprintf_r+0x1e4> 800726a: f88d 302a strb.w r3, [sp, #42] @ 0x2a 800726e: f04f 0901 mov.w r9, #1 8007272: 4623 mov r3, r4 8007274: 469a mov sl, r3 8007276: f813 2b01 ldrb.w r2, [r3], #1 800727a: b10a cbz r2, 8007280 <_svfiprintf_r+0x60> 800727c: 2a25 cmp r2, #37 @ 0x25 800727e: d1f9 bne.n 8007274 <_svfiprintf_r+0x54> 8007280: ebba 0b04 subs.w fp, sl, r4 8007284: d00b beq.n 800729e <_svfiprintf_r+0x7e> 8007286: 465b mov r3, fp 8007288: 4622 mov r2, r4 800728a: 4629 mov r1, r5 800728c: 4638 mov r0, r7 800728e: f7ff ff6b bl 8007168 <__ssputs_r> 8007292: 3001 adds r0, #1 8007294: f000 80a7 beq.w 80073e6 <_svfiprintf_r+0x1c6> 8007298: 9a09 ldr r2, [sp, #36] @ 0x24 800729a: 445a add r2, fp 800729c: 9209 str r2, [sp, #36] @ 0x24 800729e: f89a 3000 ldrb.w r3, [sl] 80072a2: 2b00 cmp r3, #0 80072a4: f000 809f beq.w 80073e6 <_svfiprintf_r+0x1c6> 80072a8: 2300 movs r3, #0 80072aa: f04f 32ff mov.w r2, #4294967295 @ 0xffffffff 80072ae: e9cd 2305 strd r2, r3, [sp, #20] 80072b2: f10a 0a01 add.w sl, sl, #1 80072b6: 9304 str r3, [sp, #16] 80072b8: 9307 str r3, [sp, #28] 80072ba: f88d 3053 strb.w r3, [sp, #83] @ 0x53 80072be: 931a str r3, [sp, #104] @ 0x68 80072c0: 4654 mov r4, sl 80072c2: 2205 movs r2, #5 80072c4: f814 1b01 ldrb.w r1, [r4], #1 80072c8: 484e ldr r0, [pc, #312] @ (8007404 <_svfiprintf_r+0x1e4>) 80072ca: f7f8 ffb1 bl 8000230 80072ce: 9a04 ldr r2, [sp, #16] 80072d0: b9d8 cbnz r0, 800730a <_svfiprintf_r+0xea> 80072d2: 06d0 lsls r0, r2, #27 80072d4: bf44 itt mi 80072d6: 2320 movmi r3, #32 80072d8: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80072dc: 0711 lsls r1, r2, #28 80072de: bf44 itt mi 80072e0: 232b movmi r3, #43 @ 0x2b 80072e2: f88d 3053 strbmi.w r3, [sp, #83] @ 0x53 80072e6: f89a 3000 ldrb.w r3, [sl] 80072ea: 2b2a cmp r3, #42 @ 0x2a 80072ec: d015 beq.n 800731a <_svfiprintf_r+0xfa> 80072ee: 9a07 ldr r2, [sp, #28] 80072f0: 4654 mov r4, sl 80072f2: 2000 movs r0, #0 80072f4: f04f 0c0a mov.w ip, #10 80072f8: 4621 mov r1, r4 80072fa: f811 3b01 ldrb.w r3, [r1], #1 80072fe: 3b30 subs r3, #48 @ 0x30 8007300: 2b09 cmp r3, #9 8007302: d94b bls.n 800739c <_svfiprintf_r+0x17c> 8007304: b1b0 cbz r0, 8007334 <_svfiprintf_r+0x114> 8007306: 9207 str r2, [sp, #28] 8007308: e014 b.n 8007334 <_svfiprintf_r+0x114> 800730a: eba0 0308 sub.w r3, r0, r8 800730e: fa09 f303 lsl.w r3, r9, r3 8007312: 4313 orrs r3, r2 8007314: 9304 str r3, [sp, #16] 8007316: 46a2 mov sl, r4 8007318: e7d2 b.n 80072c0 <_svfiprintf_r+0xa0> 800731a: 9b03 ldr r3, [sp, #12] 800731c: 1d19 adds r1, r3, #4 800731e: 681b ldr r3, [r3, #0] 8007320: 9103 str r1, [sp, #12] 8007322: 2b00 cmp r3, #0 8007324: bfbb ittet lt 8007326: 425b neglt r3, r3 8007328: f042 0202 orrlt.w r2, r2, #2 800732c: 9307 strge r3, [sp, #28] 800732e: 9307 strlt r3, [sp, #28] 8007330: bfb8 it lt 8007332: 9204 strlt r2, [sp, #16] 8007334: 7823 ldrb r3, [r4, #0] 8007336: 2b2e cmp r3, #46 @ 0x2e 8007338: d10a bne.n 8007350 <_svfiprintf_r+0x130> 800733a: 7863 ldrb r3, [r4, #1] 800733c: 2b2a cmp r3, #42 @ 0x2a 800733e: d132 bne.n 80073a6 <_svfiprintf_r+0x186> 8007340: 9b03 ldr r3, [sp, #12] 8007342: 1d1a adds r2, r3, #4 8007344: 681b ldr r3, [r3, #0] 8007346: 9203 str r2, [sp, #12] 8007348: ea43 73e3 orr.w r3, r3, r3, asr #31 800734c: 3402 adds r4, #2 800734e: 9305 str r3, [sp, #20] 8007350: f8df a0c0 ldr.w sl, [pc, #192] @ 8007414 <_svfiprintf_r+0x1f4> 8007354: 7821 ldrb r1, [r4, #0] 8007356: 2203 movs r2, #3 8007358: 4650 mov r0, sl 800735a: f7f8 ff69 bl 8000230 800735e: b138 cbz r0, 8007370 <_svfiprintf_r+0x150> 8007360: 9b04 ldr r3, [sp, #16] 8007362: eba0 000a sub.w r0, r0, sl 8007366: 2240 movs r2, #64 @ 0x40 8007368: 4082 lsls r2, r0 800736a: 4313 orrs r3, r2 800736c: 3401 adds r4, #1 800736e: 9304 str r3, [sp, #16] 8007370: f814 1b01 ldrb.w r1, [r4], #1 8007374: 4824 ldr r0, [pc, #144] @ (8007408 <_svfiprintf_r+0x1e8>) 8007376: f88d 1028 strb.w r1, [sp, #40] @ 0x28 800737a: 2206 movs r2, #6 800737c: f7f8 ff58 bl 8000230 8007380: 2800 cmp r0, #0 8007382: d036 beq.n 80073f2 <_svfiprintf_r+0x1d2> 8007384: 4b21 ldr r3, [pc, #132] @ (800740c <_svfiprintf_r+0x1ec>) 8007386: bb1b cbnz r3, 80073d0 <_svfiprintf_r+0x1b0> 8007388: 9b03 ldr r3, [sp, #12] 800738a: 3307 adds r3, #7 800738c: f023 0307 bic.w r3, r3, #7 8007390: 3308 adds r3, #8 8007392: 9303 str r3, [sp, #12] 8007394: 9b09 ldr r3, [sp, #36] @ 0x24 8007396: 4433 add r3, r6 8007398: 9309 str r3, [sp, #36] @ 0x24 800739a: e76a b.n 8007272 <_svfiprintf_r+0x52> 800739c: fb0c 3202 mla r2, ip, r2, r3 80073a0: 460c mov r4, r1 80073a2: 2001 movs r0, #1 80073a4: e7a8 b.n 80072f8 <_svfiprintf_r+0xd8> 80073a6: 2300 movs r3, #0 80073a8: 3401 adds r4, #1 80073aa: 9305 str r3, [sp, #20] 80073ac: 4619 mov r1, r3 80073ae: f04f 0c0a mov.w ip, #10 80073b2: 4620 mov r0, r4 80073b4: f810 2b01 ldrb.w r2, [r0], #1 80073b8: 3a30 subs r2, #48 @ 0x30 80073ba: 2a09 cmp r2, #9 80073bc: d903 bls.n 80073c6 <_svfiprintf_r+0x1a6> 80073be: 2b00 cmp r3, #0 80073c0: d0c6 beq.n 8007350 <_svfiprintf_r+0x130> 80073c2: 9105 str r1, [sp, #20] 80073c4: e7c4 b.n 8007350 <_svfiprintf_r+0x130> 80073c6: fb0c 2101 mla r1, ip, r1, r2 80073ca: 4604 mov r4, r0 80073cc: 2301 movs r3, #1 80073ce: e7f0 b.n 80073b2 <_svfiprintf_r+0x192> 80073d0: ab03 add r3, sp, #12 80073d2: 9300 str r3, [sp, #0] 80073d4: 462a mov r2, r5 80073d6: 4b0e ldr r3, [pc, #56] @ (8007410 <_svfiprintf_r+0x1f0>) 80073d8: a904 add r1, sp, #16 80073da: 4638 mov r0, r7 80073dc: f3af 8000 nop.w 80073e0: 1c42 adds r2, r0, #1 80073e2: 4606 mov r6, r0 80073e4: d1d6 bne.n 8007394 <_svfiprintf_r+0x174> 80073e6: 89ab ldrh r3, [r5, #12] 80073e8: 065b lsls r3, r3, #25 80073ea: f53f af2d bmi.w 8007248 <_svfiprintf_r+0x28> 80073ee: 9809 ldr r0, [sp, #36] @ 0x24 80073f0: e72c b.n 800724c <_svfiprintf_r+0x2c> 80073f2: ab03 add r3, sp, #12 80073f4: 9300 str r3, [sp, #0] 80073f6: 462a mov r2, r5 80073f8: 4b05 ldr r3, [pc, #20] @ (8007410 <_svfiprintf_r+0x1f0>) 80073fa: a904 add r1, sp, #16 80073fc: 4638 mov r0, r7 80073fe: f000 f879 bl 80074f4 <_printf_i> 8007402: e7ed b.n 80073e0 <_svfiprintf_r+0x1c0> 8007404: 080095ec .word 0x080095ec 8007408: 080095f6 .word 0x080095f6 800740c: 00000000 .word 0x00000000 8007410: 08007169 .word 0x08007169 8007414: 080095f2 .word 0x080095f2 08007418 <_printf_common>: 8007418: e92d 47f0 stmdb sp!, {r4, r5, r6, r7, r8, r9, sl, lr} 800741c: 4616 mov r6, r2 800741e: 4698 mov r8, r3 8007420: 688a ldr r2, [r1, #8] 8007422: 690b ldr r3, [r1, #16] 8007424: f8dd 9020 ldr.w r9, [sp, #32] 8007428: 4293 cmp r3, r2 800742a: bfb8 it lt 800742c: 4613 movlt r3, r2 800742e: 6033 str r3, [r6, #0] 8007430: f891 2043 ldrb.w r2, [r1, #67] @ 0x43 8007434: 4607 mov r7, r0 8007436: 460c mov r4, r1 8007438: b10a cbz r2, 800743e <_printf_common+0x26> 800743a: 3301 adds r3, #1 800743c: 6033 str r3, [r6, #0] 800743e: 6823 ldr r3, [r4, #0] 8007440: 0699 lsls r1, r3, #26 8007442: bf42 ittt mi 8007444: 6833 ldrmi r3, [r6, #0] 8007446: 3302 addmi r3, #2 8007448: 6033 strmi r3, [r6, #0] 800744a: 6825 ldr r5, [r4, #0] 800744c: f015 0506 ands.w r5, r5, #6 8007450: d106 bne.n 8007460 <_printf_common+0x48> 8007452: f104 0a19 add.w sl, r4, #25 8007456: 68e3 ldr r3, [r4, #12] 8007458: 6832 ldr r2, [r6, #0] 800745a: 1a9b subs r3, r3, r2 800745c: 42ab cmp r3, r5 800745e: dc26 bgt.n 80074ae <_printf_common+0x96> 8007460: f894 3043 ldrb.w r3, [r4, #67] @ 0x43 8007464: 6822 ldr r2, [r4, #0] 8007466: 3b00 subs r3, #0 8007468: bf18 it ne 800746a: 2301 movne r3, #1 800746c: 0692 lsls r2, r2, #26 800746e: d42b bmi.n 80074c8 <_printf_common+0xb0> 8007470: f104 0243 add.w r2, r4, #67 @ 0x43 8007474: 4641 mov r1, r8 8007476: 4638 mov r0, r7 8007478: 47c8 blx r9 800747a: 3001 adds r0, #1 800747c: d01e beq.n 80074bc <_printf_common+0xa4> 800747e: 6823 ldr r3, [r4, #0] 8007480: 6922 ldr r2, [r4, #16] 8007482: f003 0306 and.w r3, r3, #6 8007486: 2b04 cmp r3, #4 8007488: bf02 ittt eq 800748a: 68e5 ldreq r5, [r4, #12] 800748c: 6833 ldreq r3, [r6, #0] 800748e: 1aed subeq r5, r5, r3 8007490: 68a3 ldr r3, [r4, #8] 8007492: bf0c ite eq 8007494: ea25 75e5 biceq.w r5, r5, r5, asr #31 8007498: 2500 movne r5, #0 800749a: 4293 cmp r3, r2 800749c: bfc4 itt gt 800749e: 1a9b subgt r3, r3, r2 80074a0: 18ed addgt r5, r5, r3 80074a2: 2600 movs r6, #0 80074a4: 341a adds r4, #26 80074a6: 42b5 cmp r5, r6 80074a8: d11a bne.n 80074e0 <_printf_common+0xc8> 80074aa: 2000 movs r0, #0 80074ac: e008 b.n 80074c0 <_printf_common+0xa8> 80074ae: 2301 movs r3, #1 80074b0: 4652 mov r2, sl 80074b2: 4641 mov r1, r8 80074b4: 4638 mov r0, r7 80074b6: 47c8 blx r9 80074b8: 3001 adds r0, #1 80074ba: d103 bne.n 80074c4 <_printf_common+0xac> 80074bc: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 80074c0: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 80074c4: 3501 adds r5, #1 80074c6: e7c6 b.n 8007456 <_printf_common+0x3e> 80074c8: 18e1 adds r1, r4, r3 80074ca: 1c5a adds r2, r3, #1 80074cc: 2030 movs r0, #48 @ 0x30 80074ce: f881 0043 strb.w r0, [r1, #67] @ 0x43 80074d2: 4422 add r2, r4 80074d4: f894 1045 ldrb.w r1, [r4, #69] @ 0x45 80074d8: f882 1043 strb.w r1, [r2, #67] @ 0x43 80074dc: 3302 adds r3, #2 80074de: e7c7 b.n 8007470 <_printf_common+0x58> 80074e0: 2301 movs r3, #1 80074e2: 4622 mov r2, r4 80074e4: 4641 mov r1, r8 80074e6: 4638 mov r0, r7 80074e8: 47c8 blx r9 80074ea: 3001 adds r0, #1 80074ec: d0e6 beq.n 80074bc <_printf_common+0xa4> 80074ee: 3601 adds r6, #1 80074f0: e7d9 b.n 80074a6 <_printf_common+0x8e> ... 080074f4 <_printf_i>: 80074f4: e92d 47ff stmdb sp!, {r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, sl, lr} 80074f8: 7e0f ldrb r7, [r1, #24] 80074fa: 9e0c ldr r6, [sp, #48] @ 0x30 80074fc: 2f78 cmp r7, #120 @ 0x78 80074fe: 4691 mov r9, r2 8007500: 4680 mov r8, r0 8007502: 460c mov r4, r1 8007504: 469a mov sl, r3 8007506: f101 0243 add.w r2, r1, #67 @ 0x43 800750a: d807 bhi.n 800751c <_printf_i+0x28> 800750c: 2f62 cmp r7, #98 @ 0x62 800750e: d80a bhi.n 8007526 <_printf_i+0x32> 8007510: 2f00 cmp r7, #0 8007512: f000 80d1 beq.w 80076b8 <_printf_i+0x1c4> 8007516: 2f58 cmp r7, #88 @ 0x58 8007518: f000 80b8 beq.w 800768c <_printf_i+0x198> 800751c: f104 0642 add.w r6, r4, #66 @ 0x42 8007520: f884 7042 strb.w r7, [r4, #66] @ 0x42 8007524: e03a b.n 800759c <_printf_i+0xa8> 8007526: f1a7 0363 sub.w r3, r7, #99 @ 0x63 800752a: 2b15 cmp r3, #21 800752c: d8f6 bhi.n 800751c <_printf_i+0x28> 800752e: a101 add r1, pc, #4 @ (adr r1, 8007534 <_printf_i+0x40>) 8007530: f851 f023 ldr.w pc, [r1, r3, lsl #2] 8007534: 0800758d .word 0x0800758d 8007538: 080075a1 .word 0x080075a1 800753c: 0800751d .word 0x0800751d 8007540: 0800751d .word 0x0800751d 8007544: 0800751d .word 0x0800751d 8007548: 0800751d .word 0x0800751d 800754c: 080075a1 .word 0x080075a1 8007550: 0800751d .word 0x0800751d 8007554: 0800751d .word 0x0800751d 8007558: 0800751d .word 0x0800751d 800755c: 0800751d .word 0x0800751d 8007560: 0800769f .word 0x0800769f 8007564: 080075cb .word 0x080075cb 8007568: 08007659 .word 0x08007659 800756c: 0800751d .word 0x0800751d 8007570: 0800751d .word 0x0800751d 8007574: 080076c1 .word 0x080076c1 8007578: 0800751d .word 0x0800751d 800757c: 080075cb .word 0x080075cb 8007580: 0800751d .word 0x0800751d 8007584: 0800751d .word 0x0800751d 8007588: 08007661 .word 0x08007661 800758c: 6833 ldr r3, [r6, #0] 800758e: 1d1a adds r2, r3, #4 8007590: 681b ldr r3, [r3, #0] 8007592: 6032 str r2, [r6, #0] 8007594: f104 0642 add.w r6, r4, #66 @ 0x42 8007598: f884 3042 strb.w r3, [r4, #66] @ 0x42 800759c: 2301 movs r3, #1 800759e: e09c b.n 80076da <_printf_i+0x1e6> 80075a0: 6833 ldr r3, [r6, #0] 80075a2: 6820 ldr r0, [r4, #0] 80075a4: 1d19 adds r1, r3, #4 80075a6: 6031 str r1, [r6, #0] 80075a8: 0606 lsls r6, r0, #24 80075aa: d501 bpl.n 80075b0 <_printf_i+0xbc> 80075ac: 681d ldr r5, [r3, #0] 80075ae: e003 b.n 80075b8 <_printf_i+0xc4> 80075b0: 0645 lsls r5, r0, #25 80075b2: d5fb bpl.n 80075ac <_printf_i+0xb8> 80075b4: f9b3 5000 ldrsh.w r5, [r3] 80075b8: 2d00 cmp r5, #0 80075ba: da03 bge.n 80075c4 <_printf_i+0xd0> 80075bc: 232d movs r3, #45 @ 0x2d 80075be: 426d negs r5, r5 80075c0: f884 3043 strb.w r3, [r4, #67] @ 0x43 80075c4: 4858 ldr r0, [pc, #352] @ (8007728 <_printf_i+0x234>) 80075c6: 230a movs r3, #10 80075c8: e011 b.n 80075ee <_printf_i+0xfa> 80075ca: 6821 ldr r1, [r4, #0] 80075cc: 6833 ldr r3, [r6, #0] 80075ce: 0608 lsls r0, r1, #24 80075d0: f853 5b04 ldr.w r5, [r3], #4 80075d4: d402 bmi.n 80075dc <_printf_i+0xe8> 80075d6: 0649 lsls r1, r1, #25 80075d8: bf48 it mi 80075da: b2ad uxthmi r5, r5 80075dc: 2f6f cmp r7, #111 @ 0x6f 80075de: 4852 ldr r0, [pc, #328] @ (8007728 <_printf_i+0x234>) 80075e0: 6033 str r3, [r6, #0] 80075e2: bf14 ite ne 80075e4: 230a movne r3, #10 80075e6: 2308 moveq r3, #8 80075e8: 2100 movs r1, #0 80075ea: f884 1043 strb.w r1, [r4, #67] @ 0x43 80075ee: 6866 ldr r6, [r4, #4] 80075f0: 60a6 str r6, [r4, #8] 80075f2: 2e00 cmp r6, #0 80075f4: db05 blt.n 8007602 <_printf_i+0x10e> 80075f6: 6821 ldr r1, [r4, #0] 80075f8: 432e orrs r6, r5 80075fa: f021 0104 bic.w r1, r1, #4 80075fe: 6021 str r1, [r4, #0] 8007600: d04b beq.n 800769a <_printf_i+0x1a6> 8007602: 4616 mov r6, r2 8007604: fbb5 f1f3 udiv r1, r5, r3 8007608: fb03 5711 mls r7, r3, r1, r5 800760c: 5dc7 ldrb r7, [r0, r7] 800760e: f806 7d01 strb.w r7, [r6, #-1]! 8007612: 462f mov r7, r5 8007614: 42bb cmp r3, r7 8007616: 460d mov r5, r1 8007618: d9f4 bls.n 8007604 <_printf_i+0x110> 800761a: 2b08 cmp r3, #8 800761c: d10b bne.n 8007636 <_printf_i+0x142> 800761e: 6823 ldr r3, [r4, #0] 8007620: 07df lsls r7, r3, #31 8007622: d508 bpl.n 8007636 <_printf_i+0x142> 8007624: 6923 ldr r3, [r4, #16] 8007626: 6861 ldr r1, [r4, #4] 8007628: 4299 cmp r1, r3 800762a: bfde ittt le 800762c: 2330 movle r3, #48 @ 0x30 800762e: f806 3c01 strble.w r3, [r6, #-1] 8007632: f106 36ff addle.w r6, r6, #4294967295 @ 0xffffffff 8007636: 1b92 subs r2, r2, r6 8007638: 6122 str r2, [r4, #16] 800763a: f8cd a000 str.w sl, [sp] 800763e: 464b mov r3, r9 8007640: aa03 add r2, sp, #12 8007642: 4621 mov r1, r4 8007644: 4640 mov r0, r8 8007646: f7ff fee7 bl 8007418 <_printf_common> 800764a: 3001 adds r0, #1 800764c: d14a bne.n 80076e4 <_printf_i+0x1f0> 800764e: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8007652: b004 add sp, #16 8007654: e8bd 87f0 ldmia.w sp!, {r4, r5, r6, r7, r8, r9, sl, pc} 8007658: 6823 ldr r3, [r4, #0] 800765a: f043 0320 orr.w r3, r3, #32 800765e: 6023 str r3, [r4, #0] 8007660: 4832 ldr r0, [pc, #200] @ (800772c <_printf_i+0x238>) 8007662: 2778 movs r7, #120 @ 0x78 8007664: f884 7045 strb.w r7, [r4, #69] @ 0x45 8007668: 6823 ldr r3, [r4, #0] 800766a: 6831 ldr r1, [r6, #0] 800766c: 061f lsls r7, r3, #24 800766e: f851 5b04 ldr.w r5, [r1], #4 8007672: d402 bmi.n 800767a <_printf_i+0x186> 8007674: 065f lsls r7, r3, #25 8007676: bf48 it mi 8007678: b2ad uxthmi r5, r5 800767a: 6031 str r1, [r6, #0] 800767c: 07d9 lsls r1, r3, #31 800767e: bf44 itt mi 8007680: f043 0320 orrmi.w r3, r3, #32 8007684: 6023 strmi r3, [r4, #0] 8007686: b11d cbz r5, 8007690 <_printf_i+0x19c> 8007688: 2310 movs r3, #16 800768a: e7ad b.n 80075e8 <_printf_i+0xf4> 800768c: 4826 ldr r0, [pc, #152] @ (8007728 <_printf_i+0x234>) 800768e: e7e9 b.n 8007664 <_printf_i+0x170> 8007690: 6823 ldr r3, [r4, #0] 8007692: f023 0320 bic.w r3, r3, #32 8007696: 6023 str r3, [r4, #0] 8007698: e7f6 b.n 8007688 <_printf_i+0x194> 800769a: 4616 mov r6, r2 800769c: e7bd b.n 800761a <_printf_i+0x126> 800769e: 6833 ldr r3, [r6, #0] 80076a0: 6825 ldr r5, [r4, #0] 80076a2: 6961 ldr r1, [r4, #20] 80076a4: 1d18 adds r0, r3, #4 80076a6: 6030 str r0, [r6, #0] 80076a8: 062e lsls r6, r5, #24 80076aa: 681b ldr r3, [r3, #0] 80076ac: d501 bpl.n 80076b2 <_printf_i+0x1be> 80076ae: 6019 str r1, [r3, #0] 80076b0: e002 b.n 80076b8 <_printf_i+0x1c4> 80076b2: 0668 lsls r0, r5, #25 80076b4: d5fb bpl.n 80076ae <_printf_i+0x1ba> 80076b6: 8019 strh r1, [r3, #0] 80076b8: 2300 movs r3, #0 80076ba: 6123 str r3, [r4, #16] 80076bc: 4616 mov r6, r2 80076be: e7bc b.n 800763a <_printf_i+0x146> 80076c0: 6833 ldr r3, [r6, #0] 80076c2: 1d1a adds r2, r3, #4 80076c4: 6032 str r2, [r6, #0] 80076c6: 681e ldr r6, [r3, #0] 80076c8: 6862 ldr r2, [r4, #4] 80076ca: 2100 movs r1, #0 80076cc: 4630 mov r0, r6 80076ce: f7f8 fdaf bl 8000230 80076d2: b108 cbz r0, 80076d8 <_printf_i+0x1e4> 80076d4: 1b80 subs r0, r0, r6 80076d6: 6060 str r0, [r4, #4] 80076d8: 6863 ldr r3, [r4, #4] 80076da: 6123 str r3, [r4, #16] 80076dc: 2300 movs r3, #0 80076de: f884 3043 strb.w r3, [r4, #67] @ 0x43 80076e2: e7aa b.n 800763a <_printf_i+0x146> 80076e4: 6923 ldr r3, [r4, #16] 80076e6: 4632 mov r2, r6 80076e8: 4649 mov r1, r9 80076ea: 4640 mov r0, r8 80076ec: 47d0 blx sl 80076ee: 3001 adds r0, #1 80076f0: d0ad beq.n 800764e <_printf_i+0x15a> 80076f2: 6823 ldr r3, [r4, #0] 80076f4: 079b lsls r3, r3, #30 80076f6: d413 bmi.n 8007720 <_printf_i+0x22c> 80076f8: 68e0 ldr r0, [r4, #12] 80076fa: 9b03 ldr r3, [sp, #12] 80076fc: 4298 cmp r0, r3 80076fe: bfb8 it lt 8007700: 4618 movlt r0, r3 8007702: e7a6 b.n 8007652 <_printf_i+0x15e> 8007704: 2301 movs r3, #1 8007706: 4632 mov r2, r6 8007708: 4649 mov r1, r9 800770a: 4640 mov r0, r8 800770c: 47d0 blx sl 800770e: 3001 adds r0, #1 8007710: d09d beq.n 800764e <_printf_i+0x15a> 8007712: 3501 adds r5, #1 8007714: 68e3 ldr r3, [r4, #12] 8007716: 9903 ldr r1, [sp, #12] 8007718: 1a5b subs r3, r3, r1 800771a: 42ab cmp r3, r5 800771c: dcf2 bgt.n 8007704 <_printf_i+0x210> 800771e: e7eb b.n 80076f8 <_printf_i+0x204> 8007720: 2500 movs r5, #0 8007722: f104 0619 add.w r6, r4, #25 8007726: e7f5 b.n 8007714 <_printf_i+0x220> 8007728: 080095fd .word 0x080095fd 800772c: 0800960e .word 0x0800960e 08007730 <__sflush_r>: 8007730: f9b1 200c ldrsh.w r2, [r1, #12] 8007734: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 8007738: 0716 lsls r6, r2, #28 800773a: 4605 mov r5, r0 800773c: 460c mov r4, r1 800773e: d454 bmi.n 80077ea <__sflush_r+0xba> 8007740: 684b ldr r3, [r1, #4] 8007742: 2b00 cmp r3, #0 8007744: dc02 bgt.n 800774c <__sflush_r+0x1c> 8007746: 6c0b ldr r3, [r1, #64] @ 0x40 8007748: 2b00 cmp r3, #0 800774a: dd48 ble.n 80077de <__sflush_r+0xae> 800774c: 6ae6 ldr r6, [r4, #44] @ 0x2c 800774e: 2e00 cmp r6, #0 8007750: d045 beq.n 80077de <__sflush_r+0xae> 8007752: 2300 movs r3, #0 8007754: f412 5280 ands.w r2, r2, #4096 @ 0x1000 8007758: 682f ldr r7, [r5, #0] 800775a: 6a21 ldr r1, [r4, #32] 800775c: 602b str r3, [r5, #0] 800775e: d030 beq.n 80077c2 <__sflush_r+0x92> 8007760: 6d62 ldr r2, [r4, #84] @ 0x54 8007762: 89a3 ldrh r3, [r4, #12] 8007764: 0759 lsls r1, r3, #29 8007766: d505 bpl.n 8007774 <__sflush_r+0x44> 8007768: 6863 ldr r3, [r4, #4] 800776a: 1ad2 subs r2, r2, r3 800776c: 6b63 ldr r3, [r4, #52] @ 0x34 800776e: b10b cbz r3, 8007774 <__sflush_r+0x44> 8007770: 6c23 ldr r3, [r4, #64] @ 0x40 8007772: 1ad2 subs r2, r2, r3 8007774: 2300 movs r3, #0 8007776: 6ae6 ldr r6, [r4, #44] @ 0x2c 8007778: 6a21 ldr r1, [r4, #32] 800777a: 4628 mov r0, r5 800777c: 47b0 blx r6 800777e: 1c43 adds r3, r0, #1 8007780: 89a3 ldrh r3, [r4, #12] 8007782: d106 bne.n 8007792 <__sflush_r+0x62> 8007784: 6829 ldr r1, [r5, #0] 8007786: 291d cmp r1, #29 8007788: d82b bhi.n 80077e2 <__sflush_r+0xb2> 800778a: 4a2a ldr r2, [pc, #168] @ (8007834 <__sflush_r+0x104>) 800778c: 40ca lsrs r2, r1 800778e: 07d6 lsls r6, r2, #31 8007790: d527 bpl.n 80077e2 <__sflush_r+0xb2> 8007792: 2200 movs r2, #0 8007794: 6062 str r2, [r4, #4] 8007796: 04d9 lsls r1, r3, #19 8007798: 6922 ldr r2, [r4, #16] 800779a: 6022 str r2, [r4, #0] 800779c: d504 bpl.n 80077a8 <__sflush_r+0x78> 800779e: 1c42 adds r2, r0, #1 80077a0: d101 bne.n 80077a6 <__sflush_r+0x76> 80077a2: 682b ldr r3, [r5, #0] 80077a4: b903 cbnz r3, 80077a8 <__sflush_r+0x78> 80077a6: 6560 str r0, [r4, #84] @ 0x54 80077a8: 6b61 ldr r1, [r4, #52] @ 0x34 80077aa: 602f str r7, [r5, #0] 80077ac: b1b9 cbz r1, 80077de <__sflush_r+0xae> 80077ae: f104 0344 add.w r3, r4, #68 @ 0x44 80077b2: 4299 cmp r1, r3 80077b4: d002 beq.n 80077bc <__sflush_r+0x8c> 80077b6: 4628 mov r0, r5 80077b8: f7ff fbde bl 8006f78 <_free_r> 80077bc: 2300 movs r3, #0 80077be: 6363 str r3, [r4, #52] @ 0x34 80077c0: e00d b.n 80077de <__sflush_r+0xae> 80077c2: 2301 movs r3, #1 80077c4: 4628 mov r0, r5 80077c6: 47b0 blx r6 80077c8: 4602 mov r2, r0 80077ca: 1c50 adds r0, r2, #1 80077cc: d1c9 bne.n 8007762 <__sflush_r+0x32> 80077ce: 682b ldr r3, [r5, #0] 80077d0: 2b00 cmp r3, #0 80077d2: d0c6 beq.n 8007762 <__sflush_r+0x32> 80077d4: 2b1d cmp r3, #29 80077d6: d001 beq.n 80077dc <__sflush_r+0xac> 80077d8: 2b16 cmp r3, #22 80077da: d11e bne.n 800781a <__sflush_r+0xea> 80077dc: 602f str r7, [r5, #0] 80077de: 2000 movs r0, #0 80077e0: e022 b.n 8007828 <__sflush_r+0xf8> 80077e2: f043 0340 orr.w r3, r3, #64 @ 0x40 80077e6: b21b sxth r3, r3 80077e8: e01b b.n 8007822 <__sflush_r+0xf2> 80077ea: 690f ldr r7, [r1, #16] 80077ec: 2f00 cmp r7, #0 80077ee: d0f6 beq.n 80077de <__sflush_r+0xae> 80077f0: 0793 lsls r3, r2, #30 80077f2: 680e ldr r6, [r1, #0] 80077f4: bf08 it eq 80077f6: 694b ldreq r3, [r1, #20] 80077f8: 600f str r7, [r1, #0] 80077fa: bf18 it ne 80077fc: 2300 movne r3, #0 80077fe: eba6 0807 sub.w r8, r6, r7 8007802: 608b str r3, [r1, #8] 8007804: f1b8 0f00 cmp.w r8, #0 8007808: dde9 ble.n 80077de <__sflush_r+0xae> 800780a: 6a21 ldr r1, [r4, #32] 800780c: 6aa6 ldr r6, [r4, #40] @ 0x28 800780e: 4643 mov r3, r8 8007810: 463a mov r2, r7 8007812: 4628 mov r0, r5 8007814: 47b0 blx r6 8007816: 2800 cmp r0, #0 8007818: dc08 bgt.n 800782c <__sflush_r+0xfc> 800781a: f9b4 300c ldrsh.w r3, [r4, #12] 800781e: f043 0340 orr.w r3, r3, #64 @ 0x40 8007822: 81a3 strh r3, [r4, #12] 8007824: f04f 30ff mov.w r0, #4294967295 @ 0xffffffff 8007828: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 800782c: 4407 add r7, r0 800782e: eba8 0800 sub.w r8, r8, r0 8007832: e7e7 b.n 8007804 <__sflush_r+0xd4> 8007834: 20400001 .word 0x20400001 08007838 <_fflush_r>: 8007838: b538 push {r3, r4, r5, lr} 800783a: 690b ldr r3, [r1, #16] 800783c: 4605 mov r5, r0 800783e: 460c mov r4, r1 8007840: b913 cbnz r3, 8007848 <_fflush_r+0x10> 8007842: 2500 movs r5, #0 8007844: 4628 mov r0, r5 8007846: bd38 pop {r3, r4, r5, pc} 8007848: b118 cbz r0, 8007852 <_fflush_r+0x1a> 800784a: 6a03 ldr r3, [r0, #32] 800784c: b90b cbnz r3, 8007852 <_fflush_r+0x1a> 800784e: f7ff f903 bl 8006a58 <__sinit> 8007852: f9b4 300c ldrsh.w r3, [r4, #12] 8007856: 2b00 cmp r3, #0 8007858: d0f3 beq.n 8007842 <_fflush_r+0xa> 800785a: 6e62 ldr r2, [r4, #100] @ 0x64 800785c: 07d0 lsls r0, r2, #31 800785e: d404 bmi.n 800786a <_fflush_r+0x32> 8007860: 0599 lsls r1, r3, #22 8007862: d402 bmi.n 800786a <_fflush_r+0x32> 8007864: 6da0 ldr r0, [r4, #88] @ 0x58 8007866: f7ff fb76 bl 8006f56 <__retarget_lock_acquire_recursive> 800786a: 4628 mov r0, r5 800786c: 4621 mov r1, r4 800786e: f7ff ff5f bl 8007730 <__sflush_r> 8007872: 6e63 ldr r3, [r4, #100] @ 0x64 8007874: 07da lsls r2, r3, #31 8007876: 4605 mov r5, r0 8007878: d4e4 bmi.n 8007844 <_fflush_r+0xc> 800787a: 89a3 ldrh r3, [r4, #12] 800787c: 059b lsls r3, r3, #22 800787e: d4e1 bmi.n 8007844 <_fflush_r+0xc> 8007880: 6da0 ldr r0, [r4, #88] @ 0x58 8007882: f7ff fb69 bl 8006f58 <__retarget_lock_release_recursive> 8007886: e7dd b.n 8007844 <_fflush_r+0xc> 08007888 <__swhatbuf_r>: 8007888: b570 push {r4, r5, r6, lr} 800788a: 460c mov r4, r1 800788c: f9b1 100e ldrsh.w r1, [r1, #14] 8007890: 2900 cmp r1, #0 8007892: b096 sub sp, #88 @ 0x58 8007894: 4615 mov r5, r2 8007896: 461e mov r6, r3 8007898: da0d bge.n 80078b6 <__swhatbuf_r+0x2e> 800789a: 89a3 ldrh r3, [r4, #12] 800789c: f013 0f80 tst.w r3, #128 @ 0x80 80078a0: f04f 0100 mov.w r1, #0 80078a4: bf14 ite ne 80078a6: 2340 movne r3, #64 @ 0x40 80078a8: f44f 6380 moveq.w r3, #1024 @ 0x400 80078ac: 2000 movs r0, #0 80078ae: 6031 str r1, [r6, #0] 80078b0: 602b str r3, [r5, #0] 80078b2: b016 add sp, #88 @ 0x58 80078b4: bd70 pop {r4, r5, r6, pc} 80078b6: 466a mov r2, sp 80078b8: f000 f862 bl 8007980 <_fstat_r> 80078bc: 2800 cmp r0, #0 80078be: dbec blt.n 800789a <__swhatbuf_r+0x12> 80078c0: 9901 ldr r1, [sp, #4] 80078c2: f401 4170 and.w r1, r1, #61440 @ 0xf000 80078c6: f5a1 5300 sub.w r3, r1, #8192 @ 0x2000 80078ca: 4259 negs r1, r3 80078cc: 4159 adcs r1, r3 80078ce: f44f 6380 mov.w r3, #1024 @ 0x400 80078d2: e7eb b.n 80078ac <__swhatbuf_r+0x24> 080078d4 <__smakebuf_r>: 80078d4: 898b ldrh r3, [r1, #12] 80078d6: b5f7 push {r0, r1, r2, r4, r5, r6, r7, lr} 80078d8: 079d lsls r5, r3, #30 80078da: 4606 mov r6, r0 80078dc: 460c mov r4, r1 80078de: d507 bpl.n 80078f0 <__smakebuf_r+0x1c> 80078e0: f104 0347 add.w r3, r4, #71 @ 0x47 80078e4: 6023 str r3, [r4, #0] 80078e6: 6123 str r3, [r4, #16] 80078e8: 2301 movs r3, #1 80078ea: 6163 str r3, [r4, #20] 80078ec: b003 add sp, #12 80078ee: bdf0 pop {r4, r5, r6, r7, pc} 80078f0: ab01 add r3, sp, #4 80078f2: 466a mov r2, sp 80078f4: f7ff ffc8 bl 8007888 <__swhatbuf_r> 80078f8: 9f00 ldr r7, [sp, #0] 80078fa: 4605 mov r5, r0 80078fc: 4639 mov r1, r7 80078fe: 4630 mov r0, r6 8007900: f7ff fba6 bl 8007050 <_malloc_r> 8007904: b948 cbnz r0, 800791a <__smakebuf_r+0x46> 8007906: f9b4 300c ldrsh.w r3, [r4, #12] 800790a: 059a lsls r2, r3, #22 800790c: d4ee bmi.n 80078ec <__smakebuf_r+0x18> 800790e: f023 0303 bic.w r3, r3, #3 8007912: f043 0302 orr.w r3, r3, #2 8007916: 81a3 strh r3, [r4, #12] 8007918: e7e2 b.n 80078e0 <__smakebuf_r+0xc> 800791a: 89a3 ldrh r3, [r4, #12] 800791c: 6020 str r0, [r4, #0] 800791e: f043 0380 orr.w r3, r3, #128 @ 0x80 8007922: 81a3 strh r3, [r4, #12] 8007924: 9b01 ldr r3, [sp, #4] 8007926: e9c4 0704 strd r0, r7, [r4, #16] 800792a: b15b cbz r3, 8007944 <__smakebuf_r+0x70> 800792c: f9b4 100e ldrsh.w r1, [r4, #14] 8007930: 4630 mov r0, r6 8007932: f000 f837 bl 80079a4 <_isatty_r> 8007936: b128 cbz r0, 8007944 <__smakebuf_r+0x70> 8007938: 89a3 ldrh r3, [r4, #12] 800793a: f023 0303 bic.w r3, r3, #3 800793e: f043 0301 orr.w r3, r3, #1 8007942: 81a3 strh r3, [r4, #12] 8007944: 89a3 ldrh r3, [r4, #12] 8007946: 431d orrs r5, r3 8007948: 81a5 strh r5, [r4, #12] 800794a: e7cf b.n 80078ec <__smakebuf_r+0x18> 0800794c : 800794c: 4288 cmp r0, r1 800794e: b510 push {r4, lr} 8007950: eb01 0402 add.w r4, r1, r2 8007954: d902 bls.n 800795c 8007956: 4284 cmp r4, r0 8007958: 4623 mov r3, r4 800795a: d807 bhi.n 800796c 800795c: 1e43 subs r3, r0, #1 800795e: 42a1 cmp r1, r4 8007960: d008 beq.n 8007974 8007962: f811 2b01 ldrb.w r2, [r1], #1 8007966: f803 2f01 strb.w r2, [r3, #1]! 800796a: e7f8 b.n 800795e 800796c: 4402 add r2, r0 800796e: 4601 mov r1, r0 8007970: 428a cmp r2, r1 8007972: d100 bne.n 8007976 8007974: bd10 pop {r4, pc} 8007976: f813 4d01 ldrb.w r4, [r3, #-1]! 800797a: f802 4d01 strb.w r4, [r2, #-1]! 800797e: e7f7 b.n 8007970 08007980 <_fstat_r>: 8007980: b538 push {r3, r4, r5, lr} 8007982: 4d07 ldr r5, [pc, #28] @ (80079a0 <_fstat_r+0x20>) 8007984: 2300 movs r3, #0 8007986: 4604 mov r4, r0 8007988: 4608 mov r0, r1 800798a: 4611 mov r1, r2 800798c: 602b str r3, [r5, #0] 800798e: f7fa fb52 bl 8002036 <_fstat> 8007992: 1c43 adds r3, r0, #1 8007994: d102 bne.n 800799c <_fstat_r+0x1c> 8007996: 682b ldr r3, [r5, #0] 8007998: b103 cbz r3, 800799c <_fstat_r+0x1c> 800799a: 6023 str r3, [r4, #0] 800799c: bd38 pop {r3, r4, r5, pc} 800799e: bf00 nop 80079a0: 20008990 .word 0x20008990 080079a4 <_isatty_r>: 80079a4: b538 push {r3, r4, r5, lr} 80079a6: 4d06 ldr r5, [pc, #24] @ (80079c0 <_isatty_r+0x1c>) 80079a8: 2300 movs r3, #0 80079aa: 4604 mov r4, r0 80079ac: 4608 mov r0, r1 80079ae: 602b str r3, [r5, #0] 80079b0: f7fa fb51 bl 8002056 <_isatty> 80079b4: 1c43 adds r3, r0, #1 80079b6: d102 bne.n 80079be <_isatty_r+0x1a> 80079b8: 682b ldr r3, [r5, #0] 80079ba: b103 cbz r3, 80079be <_isatty_r+0x1a> 80079bc: 6023 str r3, [r4, #0] 80079be: bd38 pop {r3, r4, r5, pc} 80079c0: 20008990 .word 0x20008990 080079c4 <_sbrk_r>: 80079c4: b538 push {r3, r4, r5, lr} 80079c6: 4d06 ldr r5, [pc, #24] @ (80079e0 <_sbrk_r+0x1c>) 80079c8: 2300 movs r3, #0 80079ca: 4604 mov r4, r0 80079cc: 4608 mov r0, r1 80079ce: 602b str r3, [r5, #0] 80079d0: f7fa fb5a bl 8002088 <_sbrk> 80079d4: 1c43 adds r3, r0, #1 80079d6: d102 bne.n 80079de <_sbrk_r+0x1a> 80079d8: 682b ldr r3, [r5, #0] 80079da: b103 cbz r3, 80079de <_sbrk_r+0x1a> 80079dc: 6023 str r3, [r4, #0] 80079de: bd38 pop {r3, r4, r5, pc} 80079e0: 20008990 .word 0x20008990 080079e4 <_realloc_r>: 80079e4: e92d 41f0 stmdb sp!, {r4, r5, r6, r7, r8, lr} 80079e8: 4607 mov r7, r0 80079ea: 4614 mov r4, r2 80079ec: 460d mov r5, r1 80079ee: b921 cbnz r1, 80079fa <_realloc_r+0x16> 80079f0: e8bd 41f0 ldmia.w sp!, {r4, r5, r6, r7, r8, lr} 80079f4: 4611 mov r1, r2 80079f6: f7ff bb2b b.w 8007050 <_malloc_r> 80079fa: b92a cbnz r2, 8007a08 <_realloc_r+0x24> 80079fc: f7ff fabc bl 8006f78 <_free_r> 8007a00: 4625 mov r5, r4 8007a02: 4628 mov r0, r5 8007a04: e8bd 81f0 ldmia.w sp!, {r4, r5, r6, r7, r8, pc} 8007a08: f000 f81a bl 8007a40 <_malloc_usable_size_r> 8007a0c: 4284 cmp r4, r0 8007a0e: 4606 mov r6, r0 8007a10: d802 bhi.n 8007a18 <_realloc_r+0x34> 8007a12: ebb4 0f50 cmp.w r4, r0, lsr #1 8007a16: d8f4 bhi.n 8007a02 <_realloc_r+0x1e> 8007a18: 4621 mov r1, r4 8007a1a: 4638 mov r0, r7 8007a1c: f7ff fb18 bl 8007050 <_malloc_r> 8007a20: 4680 mov r8, r0 8007a22: b908 cbnz r0, 8007a28 <_realloc_r+0x44> 8007a24: 4645 mov r5, r8 8007a26: e7ec b.n 8007a02 <_realloc_r+0x1e> 8007a28: 42b4 cmp r4, r6 8007a2a: 4622 mov r2, r4 8007a2c: 4629 mov r1, r5 8007a2e: bf28 it cs 8007a30: 4632 movcs r2, r6 8007a32: f7ff fa92 bl 8006f5a 8007a36: 4629 mov r1, r5 8007a38: 4638 mov r0, r7 8007a3a: f7ff fa9d bl 8006f78 <_free_r> 8007a3e: e7f1 b.n 8007a24 <_realloc_r+0x40> 08007a40 <_malloc_usable_size_r>: 8007a40: f851 3c04 ldr.w r3, [r1, #-4] 8007a44: 1f18 subs r0, r3, #4 8007a46: 2b00 cmp r3, #0 8007a48: bfbc itt lt 8007a4a: 580b ldrlt r3, [r1, r0] 8007a4c: 18c0 addlt r0, r0, r3 8007a4e: 4770 bx lr 08007a50 <_init>: 8007a50: b5f8 push {r3, r4, r5, r6, r7, lr} 8007a52: bf00 nop 8007a54: bcf8 pop {r3, r4, r5, r6, r7} 8007a56: bc08 pop {r3} 8007a58: 469e mov lr, r3 8007a5a: 4770 bx lr 08007a5c <_fini>: 8007a5c: b5f8 push {r3, r4, r5, r6, r7, lr} 8007a5e: bf00 nop 8007a60: bcf8 pop {r3, r4, r5, r6, r7} 8007a62: bc08 pop {r3} 8007a64: 469e mov lr, r3 8007a66: 4770 bx lr